From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Carlos Santa <carlos.santa@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Michel Thierry <michel.thierry@intel.com>
Subject: Re: drm/i915: Watchdog timeout: DRM kernel interface to set the timeout
Date: Mon, 7 Jan 2019 17:00:01 +0000 [thread overview]
Message-ID: <0d24c67a-6a70-8bfd-bbd3-d61a18ff0003@linux.intel.com> (raw)
In-Reply-To: <f08b7a49-cc6c-9266-240a-40d85be94fe5@linux.intel.com>
On 07/01/2019 12:38, Tvrtko Ursulin wrote:
[snip]
>> +#define GEN8_TIMESTAMP_CNTS_PER_USEC 12
>> +#define GEN9_LP_TIMESTAMP_CNTS_PER_USEC 19
>> +static inline u32 cs_timestamp_in_us(struct drm_i915_private *dev_priv)
>> +{
>> + u32 cs_timestamp_base = dev_priv->cs_timestamp_base;
>> +
>> + if (cs_timestamp_base)
>> + return cs_timestamp_base;
>> +
>> + switch (INTEL_GEN(dev_priv)) {
>> + default:
>> + MISSING_CASE(INTEL_GEN(dev_priv));
>> + /* fall through */
>> + case 9:
>> + cs_timestamp_base = IS_GEN9_LP(dev_priv) ?
>> + GEN9_LP_TIMESTAMP_CNTS_PER_USEC :
>> + GEN8_TIMESTAMP_CNTS_PER_USEC;
>> + break;
>> + case 8:
>> + cs_timestamp_base = GEN8_TIMESTAMP_CNTS_PER_USEC;
>> + break;
>> + }
>> +
>> + dev_priv->cs_timestamp_base = cs_timestamp_base;
>> + return cs_timestamp_base;
>> +}
>
> We already have RUNTIME_INFO(i915)->cs_timestamp_frequency_khz and
> read_timestamp_frequency which sets it.
Here I missed the mark, please ignore.
Regards,
Tvrtko
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next prev parent reply other threads:[~2019-01-07 17:00 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-05 2:39 Gen8+ engine-reset Carlos Santa
2019-01-05 2:39 ` drm/i915: Add engine reset count in get-reset-stats ioctl Carlos Santa
2019-01-05 2:39 ` drm/i915: Watchdog timeout: IRQ handler for gen8+ Carlos Santa
2019-01-07 11:58 ` Tvrtko Ursulin
2019-01-07 12:16 ` Chris Wilson
2019-01-07 12:58 ` Tvrtko Ursulin
2019-01-07 13:02 ` Chris Wilson
2019-01-07 13:12 ` Tvrtko Ursulin
2019-01-07 13:43 ` Tvrtko Ursulin
2019-01-07 13:57 ` Chris Wilson
2019-01-07 16:58 ` Tvrtko Ursulin
2019-01-07 18:31 ` Chris Wilson
2019-01-11 0:47 ` Antonio Argenziano
2019-01-11 8:22 ` Tvrtko Ursulin
2019-01-11 17:31 ` Antonio Argenziano
2019-01-11 21:28 ` John Harrison
2019-01-16 16:15 ` Tvrtko Ursulin
2019-01-16 17:42 ` Antonio Argenziano
2019-01-16 17:59 ` Antonio Argenziano
2019-01-11 2:58 ` Carlos Santa
2019-01-24 0:13 ` Carlos Santa
2019-01-05 2:39 ` drm/i915: Watchdog timeout: Ringbuffer command emission " Carlos Santa
2019-01-07 12:21 ` Tvrtko Ursulin
2019-01-05 2:39 ` drm/i915: Watchdog timeout: DRM kernel interface to set the timeout Carlos Santa
2019-01-07 12:38 ` Tvrtko Ursulin
2019-01-07 12:50 ` Chris Wilson
2019-01-07 13:39 ` Tvrtko Ursulin
2019-01-07 13:51 ` Chris Wilson
2019-01-07 17:00 ` Tvrtko Ursulin [this message]
2019-01-07 17:20 ` Tvrtko Ursulin
2019-01-05 2:39 ` drm/i915: Watchdog timeout: Include threshold value in error state Carlos Santa
2019-01-05 4:19 ` kbuild test robot
2019-01-05 4:39 ` kbuild test robot
2019-01-05 2:39 ` drm/i915: Only process VCS2 only when supported Carlos Santa
2019-01-07 12:40 ` Tvrtko Ursulin
2019-01-24 0:20 ` Carlos Santa
2019-01-05 2:40 ` drm/i915/watchdog: move emit_stop_watchdog until the very end of the ring commands Carlos Santa
2019-01-07 12:50 ` Tvrtko Ursulin
2019-01-07 12:54 ` Chris Wilson
2019-01-07 13:01 ` Tvrtko Ursulin
2019-01-11 2:25 ` Carlos Santa
2019-01-05 2:40 ` drm/i915: Watchdog timeout: Blindly trust watchdog timeout for reset? Carlos Santa
2019-01-05 4:15 ` kbuild test robot
2019-01-05 13:32 ` kbuild test robot
2019-01-05 2:57 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-01-05 3:21 ` ✓ Fi.CI.BAT: success " Patchwork
2019-01-05 4:41 ` ✓ Fi.CI.IGT: " Patchwork
2019-01-07 10:11 ` Gen8+ engine-reset Tvrtko Ursulin
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