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* [PATCH i-g-t v7 0/3] tests/intel/xe_pmu: Add PMU tests
@ 2025-01-30 21:30 Vinay Belgaumkar
  2025-01-30 21:30 ` [PATCH i-g-t v7 1/3] lib/igt_core: Add tolerance and measured_usleep utils Vinay Belgaumkar
                   ` (2 more replies)
  0 siblings, 3 replies; 8+ messages in thread
From: Vinay Belgaumkar @ 2025-01-30 21:30 UTC (permalink / raw)
  To: intel-gfx, igt-dev
  Cc: Vinay Belgaumkar, Riana Tauro, Rodrigo Vivi, Lucas De Marchi

Add utils and gt-c6 tests that utilize PMU counters.

Cc: Riana Tauro <riana.tauro@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>

Vinay Belgaumkar (3):
  lib/igt_core: Add tolerance and measured_usleep utils
  lib/igt_perf: Add utils to extract PMU event info
  tests/xe/pmu: Add pmu tests for gt-c6

 lib/igt_core.c                         |  20 ++++
 lib/igt_core.h                         |  20 ++++
 lib/igt_perf.c                         |  70 ++++++++++++
 lib/igt_perf.h                         |   2 +
 tests/intel/drm_fdinfo.c               |  55 ++-------
 tests/intel/gem_exec_nop.c             |   6 -
 tests/intel/gem_spin_batch.c           |   6 -
 tests/intel/i915_pm_rc6_residency.c    |  42 ++-----
 tests/intel/perf_pmu.c                 |  15 +--
 tests/intel/sysfs_heartbeat_interval.c |  17 +--
 tests/intel/xe_pm_residency.c          |  29 +----
 tests/intel/xe_pmu.c                   | 149 +++++++++++++++++++++++++
 tests/meson.build                      |   1 +
 13 files changed, 284 insertions(+), 148 deletions(-)
 create mode 100644 tests/intel/xe_pmu.c

-- 
2.38.1


^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH i-g-t v7 1/3] lib/igt_core: Add tolerance and measured_usleep utils
  2025-01-30 21:30 [PATCH i-g-t v7 0/3] tests/intel/xe_pmu: Add PMU tests Vinay Belgaumkar
@ 2025-01-30 21:30 ` Vinay Belgaumkar
  2025-01-30 21:30 ` [PATCH i-g-t v7 2/3] lib/igt_perf: Add utils to extract PMU event info Vinay Belgaumkar
  2025-01-30 21:30 ` [PATCH i-g-t v7 3/3] tests/xe/pmu: Add pmu tests for gt-c6 Vinay Belgaumkar
  2 siblings, 0 replies; 8+ messages in thread
From: Vinay Belgaumkar @ 2025-01-30 21:30 UTC (permalink / raw)
  To: intel-gfx, igt-dev; +Cc: Vinay Belgaumkar

Add these redundant utils to core lib. Also fix the bug in
measured_usleep, it was returning nsec slept not usec.

The only test which now uses the local version of measured_usleep
is perf_pmu. Patch for that will be sent separately since it
also needs some test changes.

Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 lib/igt_core.c                         | 20 ++++++++++
 lib/igt_core.h                         | 20 ++++++++++
 tests/intel/drm_fdinfo.c               | 55 +++++---------------------
 tests/intel/gem_exec_nop.c             |  6 ---
 tests/intel/gem_spin_batch.c           |  6 ---
 tests/intel/i915_pm_rc6_residency.c    | 42 ++++----------------
 tests/intel/perf_pmu.c                 | 15 +------
 tests/intel/sysfs_heartbeat_interval.c | 17 +-------
 tests/intel/xe_pm_residency.c          | 29 ++------------
 9 files changed, 62 insertions(+), 148 deletions(-)

diff --git a/lib/igt_core.c b/lib/igt_core.c
index 407f7b551..b95db1b25 100644
--- a/lib/igt_core.c
+++ b/lib/igt_core.c
@@ -3553,3 +3553,23 @@ void igt_emit_ignore_dmesg_regex(const char *ignore_dmesg_regex)
 	g_regex_unref(re);
 	igt_kmsg(KMSG_INFO "%s%s\n", mark_ignore_dmesg, ignore_dmesg_regex);
 }
+
+/**
+ * @igt_measured_usleep: Helper to model accurate sleep time for tests
+ * @usec: usec to sleep
+ * Return: usec slept
+ */
+unsigned int igt_measured_usleep(unsigned int usec)
+{
+	struct timespec ts = { };
+	unsigned int slept_usec;
+
+	slept_usec = igt_nsec_elapsed(&ts) / NSEC_PER_USEC;
+	igt_assert(slept_usec == 0);
+	do {
+		usleep(usec - slept_usec);
+		slept_usec = igt_nsec_elapsed(&ts) / NSEC_PER_USEC;
+	} while (slept_usec < usec);
+
+	return igt_nsec_elapsed(&ts) / NSEC_PER_USEC;
+}
diff --git a/lib/igt_core.h b/lib/igt_core.h
index f0ba1a381..0f2af950b 100644
--- a/lib/igt_core.h
+++ b/lib/igt_core.h
@@ -1524,9 +1524,11 @@ void igt_kmsg(const char *format, ...);
 #if __WORDSIZE == 64
 #define MSEC_PER_SEC (1000ul)
 #define USEC_PER_MSEC (1000ul)
+#define NSEC_PER_USEC (1000ul)
 #else
 #define MSEC_PER_SEC (1000ull)
 #define USEC_PER_MSEC (1000ull)
+#define NSEC_PER_USEC (1000ull)
 #endif
 
 #define USEC_PER_SEC (1000u * MSEC_PER_SEC)
@@ -1536,6 +1538,23 @@ void igt_kmsg(const char *format, ...);
 
 #define for_if(expr__) if (!(expr__)) {} else
 
+#define __assert_within_epsilon(x, ref, tol_up, tol_down, debug_data) \
+	igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \
+		     (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \
+		     "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n%s\n",\
+		     #x, #ref, (double)(x), \
+		     (tol_up) * 100.0, (tol_down) * 100.0, \
+		     (double)(ref), debug_data)
+
+#define assert_within_epsilon(x, ref, tolerance) \
+	__assert_within_epsilon(x, ref, tolerance, tolerance, "\0")
+
+#define assert_within_epsilon_up_down(x, ref, tol_up, tol_down) \
+	__assert_within_epsilon(x, ref, tol_up, tol_down, "\0")
+
+#define assert_within_epsilon_debug(x, ref, tolerance, debug_data) \
+	__assert_within_epsilon(x, ref, tolerance, tolerance, debug_data)
+
 /**
  * igt_pci_system_init:
  * IGT wrapper around pci_system_init()
@@ -1578,4 +1597,5 @@ void igt_pci_system_cleanup(void);
 
 void igt_emit_ignore_dmesg_regex(const char *ignore_dmesg_regex);
 
+unsigned int igt_measured_usleep(unsigned int usec);
 #endif /* IGT_CORE_H */
diff --git a/tests/intel/drm_fdinfo.c b/tests/intel/drm_fdinfo.c
index b66ac9e1b..6a3d92008 100644
--- a/tests/intel/drm_fdinfo.c
+++ b/tests/intel/drm_fdinfo.c
@@ -106,23 +106,6 @@ static const char *engine_map[] = {
 	"compute",
 };
 
-#define __assert_within_epsilon(x, ref, tol_up, tol_down) \
-	do { \
-		igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \
-			     (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \
-			     "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n",\
-			     #x, #ref, (double)(x), \
-			     (tol_up) * 100.0, (tol_down) * 100.0, \
-			     (double)(ref)); \
-		igt_debug("%f within +%.1f%%/-%.1f%% tolerance of %f\n",\
-			  (double)(x), \
-			  (tol_up) * 100.0, (tol_down) * 100.0, \
-			  (double)(ref)); \
-	} while (0)
-
-#define assert_within_epsilon(x, ref, tolerance) \
-	__assert_within_epsilon(x, ref, tolerance, tolerance)
-
 static void basics(int i915, unsigned int num_classes)
 {
 	struct drm_client_fdinfo info = { };
@@ -137,26 +120,6 @@ static void basics(int i915, unsigned int num_classes)
 	igt_assert_eq(info.num_engines, num_classes);
 }
 
-/*
- * Helper for cases where we assert on time spent sleeping (directly or
- * indirectly), so make it more robust by ensuring the system sleep time
- * is within test tolerance to start with.
- */
-static unsigned int measured_usleep(unsigned int usec)
-{
-	struct timespec ts = { };
-	unsigned int slept;
-
-	slept = igt_nsec_elapsed(&ts);
-	igt_assert(slept == 0);
-	do {
-		usleep(usec - slept);
-		slept = igt_nsec_elapsed(&ts) / 1000;
-	} while (slept < usec);
-
-	return igt_nsec_elapsed(&ts);
-}
-
 #define TEST_BUSY (1)
 #define FLAG_SYNC (2)
 #define TEST_TRAILING_IDLE (4)
@@ -239,7 +202,7 @@ single(int gem_fd, const intel_ctx_t *ctx,
 		spin = NULL;
 
 	val = read_engine_time(gem_fd, e->class);
-	slept = measured_usleep(batch_duration_ns / 1000);
+	slept = igt_measured_usleep(batch_duration_ns / 1000);
 	if (flags & TEST_TRAILING_IDLE)
 		end_spin(spin_fd, spin, flags);
 	val = read_engine_time(gem_fd, e->class) - val;
@@ -258,7 +221,7 @@ single(int gem_fd, const intel_ctx_t *ctx,
 		igt_assert(!gem_bo_busy(spin_fd, spin->handle));
 
 		val = read_engine_time(gem_fd, e->class);
-		slept = measured_usleep(batch_duration_ns / 1000);
+		slept = igt_measured_usleep(batch_duration_ns / 1000);
 		val = read_engine_time(gem_fd, e->class) - val;
 
 		assert_within_epsilon(slept - val, slept, tolerance);
@@ -320,7 +283,7 @@ busy_check_all(int gem_fd, const intel_ctx_t *ctx,
 	spin = igt_sync_spin(gem_fd, ahnd, ctx, e);
 
 	read_engine_time_all(gem_fd, tval[0]);
-	slept = measured_usleep(batch_duration_ns / 1000);
+	slept = igt_measured_usleep(batch_duration_ns / 1000);
 	if (flags & TEST_TRAILING_IDLE)
 		end_spin(gem_fd, spin, flags);
 	read_engine_time_all(gem_fd, tval[1]);
@@ -395,7 +358,7 @@ most_busy_check_all(int gem_fd, const intel_ctx_t *ctx,
 	usleep(__igt_sync_spin_wait(gem_fd, spin) * num_engines / 1e3);
 
 	read_engine_time_all(gem_fd, tval[0]);
-	slept = measured_usleep(batch_duration_ns / 1000);
+	slept = igt_measured_usleep(batch_duration_ns / 1000);
 	if (flags & TEST_TRAILING_IDLE)
 		end_spin(gem_fd, spin, flags);
 	read_engine_time_all(gem_fd, tval[1]);
@@ -450,7 +413,7 @@ all_busy_check_all(int gem_fd, const intel_ctx_t *ctx,
 	usleep(__igt_sync_spin_wait(gem_fd, spin) * num_engines / 1e3);
 
 	read_engine_time_all(gem_fd, tval[0]);
-	slept = measured_usleep(batch_duration_ns / 1000);
+	slept = igt_measured_usleep(batch_duration_ns / 1000);
 	if (flags & TEST_TRAILING_IDLE)
 		end_spin(gem_fd, spin, flags);
 	read_engine_time_all(gem_fd, tval[1]);
@@ -596,7 +559,7 @@ virtual(int i915, const intel_ctx_cfg_t *base_cfg, unsigned int flags)
 				spin = NULL;
 
 			val = read_engine_time(i915, class);
-			slept = measured_usleep(batch_duration_ns / 1000);
+			slept = igt_measured_usleep(batch_duration_ns / 1000);
 			if (flags & TEST_TRAILING_IDLE)
 				end_spin(i915, spin, flags);
 			val = read_engine_time(i915, class) - val;
@@ -615,7 +578,7 @@ virtual(int i915, const intel_ctx_cfg_t *base_cfg, unsigned int flags)
 				igt_assert(!gem_bo_busy(i915, spin->handle));
 
 				val = read_engine_time(i915, class);
-				slept = measured_usleep(batch_duration_ns /
+				slept = igt_measured_usleep(batch_duration_ns /
 							1000);
 				val = read_engine_time(i915, class) - val;
 
@@ -705,7 +668,7 @@ virtual_all(int i915, const intel_ctx_cfg_t *base_cfg, unsigned int flags)
 		usleep(__igt_sync_spin_wait(i915, spin) * count / 1e3);
 
 		val = read_engine_time(i915, class);
-		slept = measured_usleep(batch_duration_ns / 1000);
+		slept = igt_measured_usleep(batch_duration_ns / 1000);
 		if (flags & TEST_TRAILING_IDLE)
 			end_spin(i915, spin, flags);
 		val = read_engine_time(i915, class) - val;
@@ -723,7 +686,7 @@ virtual_all(int i915, const intel_ctx_cfg_t *base_cfg, unsigned int flags)
 			igt_assert(!gem_bo_busy(i915, spin->handle));
 
 			val = read_engine_time(i915, class);
-			slept = measured_usleep(batch_duration_ns /
+			slept = igt_measured_usleep(batch_duration_ns /
 						1000);
 			val = read_engine_time(i915, class) - val;
 
diff --git a/tests/intel/gem_exec_nop.c b/tests/intel/gem_exec_nop.c
index 652f8deff..74593c085 100644
--- a/tests/intel/gem_exec_nop.c
+++ b/tests/intel/gem_exec_nop.c
@@ -434,12 +434,6 @@ stable_nop_on_ring(int fd, uint32_t handle, const intel_ctx_t *ctx,
 	return n;
 }
 
-#define assert_within_epsilon(x, ref, tolerance) \
-        igt_assert_f((x) <= (1.0 + tolerance) * ref && \
-                     (x) >= (1.0 - tolerance) * ref, \
-                     "'%s' != '%s' (%f not within %f%% tolerance of %f)\n",\
-                     #x, #ref, x, tolerance * 100.0, ref)
-
 static void headless(int fd, uint32_t handle, const intel_ctx_t *ctx,
 		     const struct intel_execution_engine2 *e)
 {
diff --git a/tests/intel/gem_spin_batch.c b/tests/intel/gem_spin_batch.c
index 85408a4c0..dee892411 100644
--- a/tests/intel/gem_spin_batch.c
+++ b/tests/intel/gem_spin_batch.c
@@ -51,12 +51,6 @@
 
 #define MAX_ERROR 5 /* % */
 
-#define assert_within_epsilon(x, ref, tolerance) \
-	igt_assert_f(100 * x <= (100 + tolerance) * ref && \
-		     100 * x >= (100 - tolerance) * ref, \
-		     "'%s' != '%s' (%lld not within %d%% tolerance of %lld)\n",\
-		     #x, #ref, (long long)x, tolerance, (long long)ref)
-
 static void spin(int fd, const intel_ctx_t *ctx_id,
 		 unsigned int engine,
 		 unsigned int flags,
diff --git a/tests/intel/i915_pm_rc6_residency.c b/tests/intel/i915_pm_rc6_residency.c
index 7942d46d3..d4489d0f7 100644
--- a/tests/intel/i915_pm_rc6_residency.c
+++ b/tests/intel/i915_pm_rc6_residency.c
@@ -234,17 +234,6 @@ static uint64_t pmu_read_single(int fd)
 	return __pmu_read_single(fd, NULL);
 }
 
-#define __assert_within_epsilon(x, ref, tol_up, tol_down, debug_data) \
-	igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \
-		     (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \
-		     "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n %s\n",\
-		     #x, #ref, (double)(x), \
-		     (tol_up) * 100.0, (tol_down) * 100.0, \
-		     (double)(ref), debug_data)
-
-#define assert_within_epsilon(x, ref, tolerance, debug_data) \
-	__assert_within_epsilon(x, ref, tolerance, tolerance, debug_data)
-
 static char *get_drpc(int i915, int gt_id)
 {
 	int gt_dir;
@@ -275,21 +264,6 @@ static bool __pmu_wait_for_rc6(int fd)
 	return false;
 }
 
-static unsigned int measured_usleep(unsigned int usec)
-{
-	struct timespec ts = { };
-	unsigned int slept;
-
-	slept = igt_nsec_elapsed(&ts);
-	igt_assert(slept == 0);
-	do {
-		usleep(usec - slept);
-		slept = igt_nsec_elapsed(&ts) / 1000;
-	} while (slept < usec);
-
-	return igt_nsec_elapsed(&ts);
-}
-
 static uint32_t batch_create(int fd)
 {
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
@@ -416,7 +390,7 @@ static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags, unsigned int gt)
 	/* While idle check full RC6. */
 	igt_power_get_energy(&gpu, &sample[0]);
 	rc6 = -__pmu_read_single(fd, &ts[0]);
-	slept = measured_usleep(duration_ns / 1000);
+	slept = igt_measured_usleep(duration_ns / 1000);
 	rc6 += __pmu_read_single(fd, &ts[1]);
 	igt_debug("slept=%lu perf=%"PRIu64", rc6=%"PRIu64"\n",
 		  slept, ts[1] - ts[0], rc6);
@@ -431,7 +405,7 @@ static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags, unsigned int gt)
 	}
 	drpc = get_drpc(i915, gt);
 
-	assert_within_epsilon(rc6, ts[1] - ts[0], 5, drpc);
+	assert_within_epsilon_debug(rc6, ts[1] - ts[0], 5, drpc);
 
 	done = mmap(0, 4096, PROT_WRITE, MAP_SHARED | MAP_ANON, -1, 0);
 
@@ -443,7 +417,7 @@ static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags, unsigned int gt)
 		igt_power_get_energy(&gpu, &sample[0]);
 		cycles = -READ_ONCE(done[1]);
 		rc6 = -__pmu_read_single(fd, &ts[0]);
-		slept = measured_usleep(duration_ns / 1000);
+		slept = igt_measured_usleep(duration_ns / 1000);
 		rc6 += __pmu_read_single(fd, &ts[1]);
 		cycles += READ_ONCE(done[1]);
 		igt_debug("%s: slept=%lu perf=%"PRIu64", cycles=%lu, rc6=%"PRIu64"\n",
@@ -469,7 +443,7 @@ static void rc6_idle(int i915, uint32_t ctx_id, uint64_t flags, unsigned int gt)
 		/* While very nearly idle, expect full RC6 */
 		drpc = get_drpc(i915, gt);
 
-		assert_within_epsilon(rc6, ts[1] - ts[0], tolerance, drpc);
+		assert_within_epsilon_debug(rc6, ts[1] - ts[0], tolerance, drpc);
 
 		free(drpc);
 		drpc = NULL;
@@ -512,7 +486,7 @@ static void rc6_fence(int i915, unsigned int gt)
 	/* While idle check full RC6. */
 	igt_power_get_energy(&gpu, &sample[0]);
 	rc6 = -__pmu_read_single(fd, &ts[0]);
-	slept = measured_usleep(duration_ns / 1000);
+	slept = igt_measured_usleep(duration_ns / 1000);
 	rc6 += __pmu_read_single(fd, &ts[1]);
 	igt_debug("slept=%lu perf=%"PRIu64", rc6=%"PRIu64"\n",
 		  slept, ts[1] - ts[0], rc6);
@@ -527,7 +501,7 @@ static void rc6_fence(int i915, unsigned int gt)
 	}
 	drpc = get_drpc(i915, gt);
 
-	assert_within_epsilon(rc6, ts[1] - ts[0], 5, drpc);
+	assert_within_epsilon_debug(rc6, ts[1] - ts[0], 5, drpc);
 
 	/* Submit but delay execution, we should be idle and conserving power */
 	ctx = intel_ctx_create_for_gt(i915, gt);
@@ -549,7 +523,7 @@ static void rc6_fence(int i915, unsigned int gt)
 
 		igt_power_get_energy(&gpu, &sample[0]);
 		rc6 = -__pmu_read_single(fd, &ts[0]);
-		slept = measured_usleep(duration_ns / 1000);
+		slept = igt_measured_usleep(duration_ns / 1000);
 		rc6 += __pmu_read_single(fd, &ts[1]);
 		igt_debug("%s: slept=%lu perf=%"PRIu64", rc6=%"PRIu64"\n",
 			  e->name, slept, ts[1] - ts[0], rc6);
@@ -570,7 +544,7 @@ static void rc6_fence(int i915, unsigned int gt)
 
 		drpc = get_drpc(i915, gt);
 
-		assert_within_epsilon(rc6, ts[1] - ts[0], tolerance, drpc);
+		assert_within_epsilon_debug(rc6, ts[1] - ts[0], tolerance, drpc);
 		gem_quiescent_gpu(i915);
 
 		free(drpc);
diff --git a/tests/intel/perf_pmu.c b/tests/intel/perf_pmu.c
index 5d0467c02..87de062cb 100644
--- a/tests/intel/perf_pmu.c
+++ b/tests/intel/perf_pmu.c
@@ -284,19 +284,6 @@ static uint64_t pmu_read_multi(int fd, unsigned int num, uint64_t *val)
 	return buf[1];
 }
 
-#define __assert_within_epsilon(x, ref, tol_up, tol_down, debug_data) \
-	igt_assert_f((double)(x) <= (1.0 + (tol_up)) * (double)(ref) && \
-		     (double)(x) >= (1.0 - (tol_down)) * (double)(ref), \
-		     "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n%s\n",\
-		     #x, #ref, (double)(x), \
-		     (tol_up) * 100.0, (tol_down) * 100.0, \
-		     (double)(ref), debug_data)
-
-#define assert_within_epsilon(x, ref, tolerance) \
-	__assert_within_epsilon(x, ref, tolerance, tolerance, no_debug_data)
-
-#define assert_within_epsilon_debug(x, ref, tolerance, debug_data) \
-	__assert_within_epsilon(x, ref, tolerance, tolerance, debug_data)
 /*
  * Helper for cases where we assert on time spent sleeping (directly or
  * indirectly), so make it more robust by ensuring the system sleep time
@@ -1772,7 +1759,7 @@ test_frequency(int gem_fd, unsigned int gt)
 	 * On thermally throttled devices we cannot be sure maximum frequency
 	 * can be reached so use larger tolerance downards.
 	 */
-	__assert_within_epsilon(max[0], max_freq, tolerance, 0.15f, no_debug_data);
+	assert_within_epsilon_up_down(max[0], max_freq, tolerance, 0.15f);
 }
 
 static void
diff --git a/tests/intel/sysfs_heartbeat_interval.c b/tests/intel/sysfs_heartbeat_interval.c
index 486a1514d..56fb1b499 100644
--- a/tests/intel/sysfs_heartbeat_interval.c
+++ b/tests/intel/sysfs_heartbeat_interval.c
@@ -307,21 +307,6 @@ static void test_nopreempt(int i915, int engine)
 	set_heartbeat(engine, saved);
 }
 
-static unsigned int measured_usleep(unsigned int usec)
-{
-	struct timespec ts = { };
-	unsigned int slept;
-
-	slept = igt_nsec_elapsed(&ts);
-	igt_assert(slept == 0);
-	do {
-		usleep(usec - slept);
-		slept = igt_nsec_elapsed(&ts) / 1000;
-	} while (slept < usec);
-
-	return igt_nsec_elapsed(&ts);
-}
-
 static void client(int i915, int engine, int *ctl, int duration, int expect)
 {
 	unsigned int class, inst;
@@ -352,7 +337,7 @@ static void client(int i915, int engine, int *ctl, int duration, int expect)
 			continue;
 		}
 
-		elapsed = measured_usleep(duration * 1000);
+		elapsed = igt_measured_usleep(duration * 1000);
 		igt_spin_end(spin);
 
 		sync_fence_wait(spin->out_fence, -1);
diff --git a/tests/intel/xe_pm_residency.c b/tests/intel/xe_pm_residency.c
index f9e96d608..3432077cc 100644
--- a/tests/intel/xe_pm_residency.c
+++ b/tests/intel/xe_pm_residency.c
@@ -32,14 +32,6 @@
 const double tolerance = 0.1;
 int fw_handle = -1;
 
-#define assert_within_epsilon(x, ref, tol) \
-	igt_assert_f((double)(x) <= (1.0 + (tol)) * (double)(ref) && \
-		     (double)(x) >= (1.0 - (tol)) * (double)(ref), \
-		     "'%s' != '%s' (%f not within +%.1f%%/-%.1f%% tolerance of %f)\n",\
-		     #x, #ref, (double)(x), \
-		     (tol) * 100.0, (tol) * 100.0, \
-		     (double)(ref))
-
 enum test_type {
 	TEST_S2IDLE,
 	TEST_IDLE,
@@ -177,21 +169,6 @@ static void exec_load(int fd, struct drm_xe_engine_class_instance *hwe, unsigned
 	xe_vm_destroy(fd, vm);
 }
 
-static unsigned int measured_usleep(unsigned int usec)
-{
-	struct timespec ts = { };
-	unsigned int slept;
-
-	slept = igt_nsec_elapsed(&ts);
-	igt_assert(slept == 0);
-	do {
-		usleep(usec - slept);
-		slept = igt_nsec_elapsed(&ts) / 1000;
-	} while (slept < usec);
-
-	return igt_nsec_elapsed(&ts) / 1000;
-}
-
 static unsigned long read_idle_residency(int fd, int gt)
 {
 	unsigned long residency = 0;
@@ -224,7 +201,7 @@ static void test_idle_residency(int fd, int gt, enum test_type flag)
 
 	if (flag == TEST_IDLE) {
 		residency_start = read_idle_residency(fd, gt);
-		elapsed_ms = measured_usleep(SLEEP_DURATION * USEC_PER_SEC) / 1000;
+		elapsed_ms = igt_measured_usleep(SLEEP_DURATION * USEC_PER_SEC) / 1000;
 		residency_end = read_idle_residency(fd, gt);
 	}
 
@@ -260,7 +237,7 @@ static void idle_residency_on_exec(int fd, struct drm_xe_engine_class_instance *
 
 	start = READ_ONCE(done[1]);
 	residency_start = read_idle_residency(fd, hwe->gt_id);
-	elapsed_ms = measured_usleep(SLEEP_DURATION * USEC_PER_SEC) / 1000;
+	elapsed_ms = igt_measured_usleep(SLEEP_DURATION * USEC_PER_SEC) / 1000;
 	residency_end = read_idle_residency(fd, hwe->gt_id);
 	end = READ_ONCE(done[1]);
 	*done = 1;
@@ -281,7 +258,7 @@ static void measure_power(struct igt_power *gpu, double *power)
 	struct power_sample power_sample[2];
 
 	igt_power_get_energy(gpu, &power_sample[0]);
-	measured_usleep(SLEEP_DURATION * USEC_PER_SEC);
+	igt_measured_usleep(SLEEP_DURATION * USEC_PER_SEC);
 	igt_power_get_energy(gpu, &power_sample[1]);
 	*power = igt_power_get_mW(gpu, &power_sample[0], &power_sample[1]);
 }
-- 
2.38.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH i-g-t v7 2/3] lib/igt_perf: Add utils to extract PMU event info
  2025-01-30 21:30 [PATCH i-g-t v7 0/3] tests/intel/xe_pmu: Add PMU tests Vinay Belgaumkar
  2025-01-30 21:30 ` [PATCH i-g-t v7 1/3] lib/igt_core: Add tolerance and measured_usleep utils Vinay Belgaumkar
@ 2025-01-30 21:30 ` Vinay Belgaumkar
  2025-01-31  8:01   ` Riana Tauro
  2025-01-30 21:30 ` [PATCH i-g-t v7 3/3] tests/xe/pmu: Add pmu tests for gt-c6 Vinay Belgaumkar
  2 siblings, 1 reply; 8+ messages in thread
From: Vinay Belgaumkar @ 2025-01-30 21:30 UTC (permalink / raw)
  To: intel-gfx, igt-dev
  Cc: Vinay Belgaumkar, Riana Tauro, Lucas De Marchi, Kamil Konieczny,
	Rodrigo Vivi

Functions to parse event ID and GT bit shift for PMU events.

v2: Review comments (Riana)
v3: Review comments (Lucas)

Cc: Riana Tauro <riana.tauro@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 lib/igt_perf.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++
 lib/igt_perf.h |  2 ++
 2 files changed, 72 insertions(+)

diff --git a/lib/igt_perf.c b/lib/igt_perf.c
index 3866c6d77..f021fc3ec 100644
--- a/lib/igt_perf.c
+++ b/lib/igt_perf.c
@@ -92,6 +92,76 @@ const char *xe_perf_device(int xe, char *buf, int buflen)
 	return buf;
 }
 
+/**
+ * perf_event_format: Returns the start/end positions of an event format param
+ * @device: PMU device
+ * @param: Parameter for which you need the format start/end bits
+ * Returns: 0 on success or negative error code
+ */
+int perf_event_format(const char *device, const char *param, uint32_t *start, uint32_t *end)
+{
+	char buf[NAME_MAX];
+	ssize_t bytes;
+	int ret;
+	int fd;
+
+	snprintf(buf, sizeof(buf),
+		 "/sys/bus/event_source/devices/%s/format/%s",
+		 device, param);
+
+	fd = open(buf, O_RDONLY | O_CLOEXEC);
+	if (fd < 0)
+		return -EINVAL;
+
+	bytes = read(fd, buf, sizeof(buf) - 1);
+	close(fd);
+	if (bytes < 1)
+		return -EINVAL;
+
+	buf[bytes] = '\0';
+	ret = sscanf(buf, "config:%u-%u", start, end);
+	if (ret != 2)
+		return -EINVAL;
+
+	return ret;
+}
+
+/**
+ * perf_event_config:
+ * @device: Device string in driver:pci format
+ * @event: The event name
+ * @config: Pointer to the config
+ * Returns: 0 for success, negative value on error
+ */
+int perf_event_config(const char *device, const char *event, uint64_t *config)
+{
+	char buf[NAME_MAX];
+	ssize_t bytes;
+	int ret;
+	int fd;
+
+	snprintf(buf, sizeof(buf),
+		 "/sys/bus/event_source/devices/%s/events/%s",
+		 device,
+		 event);
+
+	fd = open(buf, O_RDONLY);
+	if (fd < 0)
+		return -EINVAL;
+
+	bytes = read(fd, buf, sizeof(buf) - 1);
+	close(fd);
+	if (bytes < 1)
+		return ret;
+
+	buf[bytes] = '\0';
+	ret = sscanf(buf, "event=0x%lx", config);
+	if (ret != 1)
+		return -EINVAL;
+
+	return 0;
+}
+
 uint64_t xe_perf_type_id(int xe)
 {
 	char buf[80];
diff --git a/lib/igt_perf.h b/lib/igt_perf.h
index 3d9ba2917..69f7a3d74 100644
--- a/lib/igt_perf.h
+++ b/lib/igt_perf.h
@@ -71,5 +71,7 @@ int perf_i915_open(int i915, uint64_t config);
 int perf_i915_open_group(int i915, uint64_t config, int group);
 
 int perf_xe_open(int xe, uint64_t config);
+int perf_event_config(const char *device, const char *event, uint64_t *config);
+int perf_event_format(const char *device, const char *param, uint32_t *start, uint32_t *end);
 
 #endif /* I915_PERF_H */
-- 
2.38.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH i-g-t v7 3/3] tests/xe/pmu: Add pmu tests for gt-c6
  2025-01-30 21:30 [PATCH i-g-t v7 0/3] tests/intel/xe_pmu: Add PMU tests Vinay Belgaumkar
  2025-01-30 21:30 ` [PATCH i-g-t v7 1/3] lib/igt_core: Add tolerance and measured_usleep utils Vinay Belgaumkar
  2025-01-30 21:30 ` [PATCH i-g-t v7 2/3] lib/igt_perf: Add utils to extract PMU event info Vinay Belgaumkar
@ 2025-01-30 21:30 ` Vinay Belgaumkar
  2025-01-30 22:42   ` Belgaumkar, Vinay
                     ` (2 more replies)
  2 siblings, 3 replies; 8+ messages in thread
From: Vinay Belgaumkar @ 2025-01-30 21:30 UTC (permalink / raw)
  To: intel-gfx, igt-dev
  Cc: Vinay Belgaumkar, Lucas De Marchi, Riana Tauro, Rodrigo Vivi

Simple tests for validating the PMU implementation for GT C6
residencies.

v2: Rename rc6-residency-* to gt-c6-residency and remove freq tests.
v3: Keep just gt-c6 tests, add frequency tests later.
v4: Review comments (Riana)
v5: Review comments (Lucas)

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Riana Tauro <riana.tauro@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
---
 tests/intel/xe_pmu.c | 149 +++++++++++++++++++++++++++++++++++++++++++
 tests/meson.build    |   1 +
 2 files changed, 150 insertions(+)
 create mode 100644 tests/intel/xe_pmu.c

diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c
new file mode 100644
index 000000000..44589cb86
--- /dev/null
+++ b/tests/intel/xe_pmu.c
@@ -0,0 +1,149 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+/**
+ * TEST: Test Xe PMU functionality
+ * Category: Perf Monitoring Unit
+ * Mega feature: Perf Monitoring Unit
+ * Sub-category: Telemetry
+ * Functionality: Power/Perf
+ * Test category: Functional tests
+ */
+
+#include <fcntl.h>
+#include <limits.h>
+#include <time.h>
+#include <errno.h>
+#include <dirent.h>
+#include <string.h>
+#include <sys/time.h>
+
+#include "igt.h"
+#include "igt_device.h"
+#include "igt_power.h"
+#include "igt_sysfs.h"
+#include "igt_perf.h"
+
+#include "lib/igt_syncobj.h"
+#include "xe/xe_ioctl.h"
+#include "xe/xe_gt.h"
+#include "xe/xe_query.h"
+#include "xe/xe_spin.h"
+#include "xe/xe_util.h"
+
+#define SLEEP_DURATION 2 /* in seconds */
+const double tolerance = 0.1;
+const char *no_debug_data = "\0";
+
+static int open_pmu(int xe, uint64_t config)
+{
+	int fd;
+
+	fd = perf_xe_open(xe, config);
+	igt_skip_on(fd < 0 && errno == ENODEV);
+	igt_assert(fd >= 0);
+
+	return fd;
+}
+
+static uint64_t __pmu_read_single(int fd, uint64_t *ts)
+{
+	uint64_t data[2];
+
+	igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data));
+	if (ts)
+		*ts = data[1];
+
+	return data[0];
+}
+
+static unsigned long read_idle_residency(int fd, int gt)
+{
+	unsigned long residency = 0;
+	int gt_fd;
+
+	gt_fd = xe_sysfs_gt_open(fd, gt);
+	igt_assert(gt_fd >= 0);
+	igt_assert(igt_sysfs_scanf(gt_fd, "gtidle/idle_residency_ms", "%lu", &residency) == 1);
+	close(gt_fd);
+
+	return residency;
+}
+
+static u64 get_event_config(int xe, unsigned int gt, char *event)
+{
+	int ret;
+	char xe_device[100];
+	u64 pmu_config;
+	u32 start, end;
+
+	xe_perf_device(xe, xe_device, sizeof(xe_device));
+	ret = perf_event_config(xe_device, event, &pmu_config);
+	igt_assert(ret >= 0);
+	ret = perf_event_format(xe_device, "gt", &start, &end);
+	igt_assert(ret >= 0);
+	pmu_config |= (u64) gt << start;
+
+	return pmu_config;
+}
+
+/**
+ * SUBTEST: gt-c6-idle
+ * Description: Basic residency test to validate idle residency
+ *		measured over a time interval is within the tolerance
+ */
+static void test_gt_c6_idle(int xe, unsigned int gt)
+{
+	int pmu_fd;
+	u64 pmu_config;
+	char event[100];
+	uint64_t ts[2];
+	unsigned long slept, start, end;
+	uint64_t val;
+
+	/* Get the PMU config for the gt-c6 event */
+	sprintf(event, "gt-c6-residency");
+	pmu_config = get_event_config(xe, gt, event);
+
+	pmu_fd = open_pmu(xe, pmu_config);
+
+	igt_require_f(igt_wait(xe_gt_is_in_c6(xe, gt), 1000, 10), "GT %d should be in C6\n", gt);
+
+	/* While idle check full RC6. */
+	start = read_idle_residency(xe, gt);
+	val = __pmu_read_single(pmu_fd, &ts[0]);
+	slept = igt_measured_usleep(SLEEP_DURATION * USEC_PER_SEC) / 1000;
+	end = read_idle_residency(xe, gt);
+	val = __pmu_read_single(pmu_fd, &ts[1]) - val;
+
+	igt_debug("gt%u: slept=%lu, perf=%"PRIu64"\n",
+		  gt, slept,  val);
+
+	igt_debug("Start res: %lu, end_res: %lu", start, end);
+
+	assert_within_epsilon(val,
+			      (ts[1] - ts[0])/USEC_PER_SEC,
+			      tolerance);
+	close(pmu_fd);
+}
+
+igt_main
+{
+	int fd, gt;
+
+	igt_fixture {
+		fd = drm_open_driver(DRIVER_XE);
+		igt_require(!IS_PONTEVECCHIO(xe_dev_id(fd)));
+	}
+
+	igt_describe("Validate PMU gt-c6 residency counters when idle");
+	igt_subtest("gt-c6-idle")
+		xe_for_each_gt(fd, gt)
+			test_gt_c6_idle(fd, gt);
+
+	igt_fixture {
+		close(fd);
+	}
+}
diff --git a/tests/meson.build b/tests/meson.build
index 33dffad31..d20f50766 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -309,6 +309,7 @@ intel_xe_progs = [
 	'xe_pat',
 	'xe_peer2peer',
 	'xe_pm',
+	'xe_pmu',
 	'xe_pm_residency',
 	'xe_prime_self_import',
 	'xe_query',
-- 
2.38.1


^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH i-g-t v7 3/3] tests/xe/pmu: Add pmu tests for gt-c6
  2025-01-30 21:30 ` [PATCH i-g-t v7 3/3] tests/xe/pmu: Add pmu tests for gt-c6 Vinay Belgaumkar
@ 2025-01-30 22:42   ` Belgaumkar, Vinay
  2025-01-31  8:13   ` Riana Tauro
  2025-01-31 13:20   ` Kamil Konieczny
  2 siblings, 0 replies; 8+ messages in thread
From: Belgaumkar, Vinay @ 2025-01-30 22:42 UTC (permalink / raw)
  To: intel-gfx, igt-dev; +Cc: Lucas De Marchi, Riana Tauro, Rodrigo Vivi


On 1/30/2025 1:30 PM, Vinay Belgaumkar wrote:
> Simple tests for validating the PMU implementation for GT C6
> residencies.
>
> v2: Rename rc6-residency-* to gt-c6-residency and remove freq tests.
> v3: Keep just gt-c6 tests, add frequency tests later.
> v4: Review comments (Riana)
> v5: Review comments (Lucas)
>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Riana Tauro <riana.tauro@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
>   tests/intel/xe_pmu.c | 149 +++++++++++++++++++++++++++++++++++++++++++
>   tests/meson.build    |   1 +
>   2 files changed, 150 insertions(+)
>   create mode 100644 tests/intel/xe_pmu.c
>
> diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c
> new file mode 100644
> index 000000000..44589cb86
> --- /dev/null
> +++ b/tests/intel/xe_pmu.c
> @@ -0,0 +1,149 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +/**
> + * TEST: Test Xe PMU functionality
> + * Category: Perf Monitoring Unit
> + * Mega feature: Perf Monitoring Unit
> + * Sub-category: Telemetry
> + * Functionality: Power/Perf
> + * Test category: Functional tests
> + */
> +
> +#include <fcntl.h>
> +#include <limits.h>
> +#include <time.h>
> +#include <errno.h>
> +#include <dirent.h>
> +#include <string.h>
> +#include <sys/time.h>
> +
> +#include "igt.h"
> +#include "igt_device.h"
> +#include "igt_power.h"
> +#include "igt_sysfs.h"
> +#include "igt_perf.h"
> +
> +#include "lib/igt_syncobj.h"
> +#include "xe/xe_ioctl.h"
> +#include "xe/xe_gt.h"
> +#include "xe/xe_query.h"
> +#include "xe/xe_spin.h"
> +#include "xe/xe_util.h"
> +
> +#define SLEEP_DURATION 2 /* in seconds */
> +const double tolerance = 0.1;
> +const char *no_debug_data = "\0";

This one got missed. Will remove in the next version after reviews are 
complete.

Thanks,

Vinay.

> +
> +static int open_pmu(int xe, uint64_t config)
> +{
> +	int fd;
> +
> +	fd = perf_xe_open(xe, config);
> +	igt_skip_on(fd < 0 && errno == ENODEV);
> +	igt_assert(fd >= 0);
> +
> +	return fd;
> +}
> +
> +static uint64_t __pmu_read_single(int fd, uint64_t *ts)
> +{
> +	uint64_t data[2];
> +
> +	igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data));
> +	if (ts)
> +		*ts = data[1];
> +
> +	return data[0];
> +}
> +
> +static unsigned long read_idle_residency(int fd, int gt)
> +{
> +	unsigned long residency = 0;
> +	int gt_fd;
> +
> +	gt_fd = xe_sysfs_gt_open(fd, gt);
> +	igt_assert(gt_fd >= 0);
> +	igt_assert(igt_sysfs_scanf(gt_fd, "gtidle/idle_residency_ms", "%lu", &residency) == 1);
> +	close(gt_fd);
> +
> +	return residency;
> +}
> +
> +static u64 get_event_config(int xe, unsigned int gt, char *event)
> +{
> +	int ret;
> +	char xe_device[100];
> +	u64 pmu_config;
> +	u32 start, end;
> +
> +	xe_perf_device(xe, xe_device, sizeof(xe_device));
> +	ret = perf_event_config(xe_device, event, &pmu_config);
> +	igt_assert(ret >= 0);
> +	ret = perf_event_format(xe_device, "gt", &start, &end);
> +	igt_assert(ret >= 0);
> +	pmu_config |= (u64) gt << start;
> +
> +	return pmu_config;
> +}
> +
> +/**
> + * SUBTEST: gt-c6-idle
> + * Description: Basic residency test to validate idle residency
> + *		measured over a time interval is within the tolerance
> + */
> +static void test_gt_c6_idle(int xe, unsigned int gt)
> +{
> +	int pmu_fd;
> +	u64 pmu_config;
> +	char event[100];
> +	uint64_t ts[2];
> +	unsigned long slept, start, end;
> +	uint64_t val;
> +
> +	/* Get the PMU config for the gt-c6 event */
> +	sprintf(event, "gt-c6-residency");
> +	pmu_config = get_event_config(xe, gt, event);
> +
> +	pmu_fd = open_pmu(xe, pmu_config);
> +
> +	igt_require_f(igt_wait(xe_gt_is_in_c6(xe, gt), 1000, 10), "GT %d should be in C6\n", gt);
> +
> +	/* While idle check full RC6. */
> +	start = read_idle_residency(xe, gt);
> +	val = __pmu_read_single(pmu_fd, &ts[0]);
> +	slept = igt_measured_usleep(SLEEP_DURATION * USEC_PER_SEC) / 1000;
> +	end = read_idle_residency(xe, gt);
> +	val = __pmu_read_single(pmu_fd, &ts[1]) - val;
> +
> +	igt_debug("gt%u: slept=%lu, perf=%"PRIu64"\n",
> +		  gt, slept,  val);
> +
> +	igt_debug("Start res: %lu, end_res: %lu", start, end);
> +
> +	assert_within_epsilon(val,
> +			      (ts[1] - ts[0])/USEC_PER_SEC,
> +			      tolerance);
> +	close(pmu_fd);
> +}
> +
> +igt_main
> +{
> +	int fd, gt;
> +
> +	igt_fixture {
> +		fd = drm_open_driver(DRIVER_XE);
> +		igt_require(!IS_PONTEVECCHIO(xe_dev_id(fd)));
> +	}
> +
> +	igt_describe("Validate PMU gt-c6 residency counters when idle");
> +	igt_subtest("gt-c6-idle")
> +		xe_for_each_gt(fd, gt)
> +			test_gt_c6_idle(fd, gt);
> +
> +	igt_fixture {
> +		close(fd);
> +	}
> +}
> diff --git a/tests/meson.build b/tests/meson.build
> index 33dffad31..d20f50766 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -309,6 +309,7 @@ intel_xe_progs = [
>   	'xe_pat',
>   	'xe_peer2peer',
>   	'xe_pm',
> +	'xe_pmu',
>   	'xe_pm_residency',
>   	'xe_prime_self_import',
>   	'xe_query',

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH i-g-t v7 2/3] lib/igt_perf: Add utils to extract PMU event info
  2025-01-30 21:30 ` [PATCH i-g-t v7 2/3] lib/igt_perf: Add utils to extract PMU event info Vinay Belgaumkar
@ 2025-01-31  8:01   ` Riana Tauro
  0 siblings, 0 replies; 8+ messages in thread
From: Riana Tauro @ 2025-01-31  8:01 UTC (permalink / raw)
  To: Vinay Belgaumkar, intel-gfx, igt-dev
  Cc: Lucas De Marchi, Kamil Konieczny, Rodrigo Vivi



On 1/31/2025 3:00 AM, Vinay Belgaumkar wrote:
> Functions to parse event ID and GT bit shift for PMU events.
> 
> v2: Review comments (Riana)
> v3: Review comments (Lucas)
> 
> Cc: Riana Tauro <riana.tauro@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Looks good to me

Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> ---
>   lib/igt_perf.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++
>   lib/igt_perf.h |  2 ++
>   2 files changed, 72 insertions(+)
> 
> diff --git a/lib/igt_perf.c b/lib/igt_perf.c
> index 3866c6d77..f021fc3ec 100644
> --- a/lib/igt_perf.c
> +++ b/lib/igt_perf.c
> @@ -92,6 +92,76 @@ const char *xe_perf_device(int xe, char *buf, int buflen)
>   	return buf;
>   }
>   
> +/**
> + * perf_event_format: Returns the start/end positions of an event format param
> + * @device: PMU device
> + * @param: Parameter for which you need the format start/end bits
> + * Returns: 0 on success or negative error code
> + */
> +int perf_event_format(const char *device, const char *param, uint32_t *start, uint32_t *end)
> +{
> +	char buf[NAME_MAX];
> +	ssize_t bytes;
> +	int ret;
> +	int fd;
> +
> +	snprintf(buf, sizeof(buf),
> +		 "/sys/bus/event_source/devices/%s/format/%s",
> +		 device, param);
> +
> +	fd = open(buf, O_RDONLY | O_CLOEXEC);
> +	if (fd < 0)
> +		return -EINVAL;
> +
> +	bytes = read(fd, buf, sizeof(buf) - 1);
> +	close(fd);
> +	if (bytes < 1)
> +		return -EINVAL;
> +
> +	buf[bytes] = '\0';
> +	ret = sscanf(buf, "config:%u-%u", start, end);
> +	if (ret != 2)
> +		return -EINVAL;
> +
> +	return ret;
> +}
> +
> +/**
> + * perf_event_config:
> + * @device: Device string in driver:pci format
> + * @event: The event name
> + * @config: Pointer to the config
> + * Returns: 0 for success, negative value on error
> + */
> +int perf_event_config(const char *device, const char *event, uint64_t *config)
> +{
> +	char buf[NAME_MAX];
> +	ssize_t bytes;
> +	int ret;
> +	int fd;
> +
> +	snprintf(buf, sizeof(buf),
> +		 "/sys/bus/event_source/devices/%s/events/%s",
> +		 device,
> +		 event);
> +
> +	fd = open(buf, O_RDONLY);
> +	if (fd < 0)
> +		return -EINVAL;
> +
> +	bytes = read(fd, buf, sizeof(buf) - 1);
> +	close(fd);
> +	if (bytes < 1)
> +		return ret;
> +
> +	buf[bytes] = '\0';
> +	ret = sscanf(buf, "event=0x%lx", config);
> +	if (ret != 1)
> +		return -EINVAL;
> +
> +	return 0;
> +}
> +
>   uint64_t xe_perf_type_id(int xe)
>   {
>   	char buf[80];
> diff --git a/lib/igt_perf.h b/lib/igt_perf.h
> index 3d9ba2917..69f7a3d74 100644
> --- a/lib/igt_perf.h
> +++ b/lib/igt_perf.h
> @@ -71,5 +71,7 @@ int perf_i915_open(int i915, uint64_t config);
>   int perf_i915_open_group(int i915, uint64_t config, int group);
>   
>   int perf_xe_open(int xe, uint64_t config);
> +int perf_event_config(const char *device, const char *event, uint64_t *config);
> +int perf_event_format(const char *device, const char *param, uint32_t *start, uint32_t *end);
>   
>   #endif /* I915_PERF_H */


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH i-g-t v7 3/3] tests/xe/pmu: Add pmu tests for gt-c6
  2025-01-30 21:30 ` [PATCH i-g-t v7 3/3] tests/xe/pmu: Add pmu tests for gt-c6 Vinay Belgaumkar
  2025-01-30 22:42   ` Belgaumkar, Vinay
@ 2025-01-31  8:13   ` Riana Tauro
  2025-01-31 13:20   ` Kamil Konieczny
  2 siblings, 0 replies; 8+ messages in thread
From: Riana Tauro @ 2025-01-31  8:13 UTC (permalink / raw)
  To: Vinay Belgaumkar, intel-gfx, igt-dev; +Cc: Lucas De Marchi, Rodrigo Vivi

Hi Vinay

On 1/31/2025 3:00 AM, Vinay Belgaumkar wrote:
> Simple tests for validating the PMU implementation for GT C6
> residencies.
> 
> v2: Rename rc6-residency-* to gt-c6-residency and remove freq tests.
> v3: Keep just gt-c6 tests, add frequency tests later.
> v4: Review comments (Riana)
> v5: Review comments (Lucas)
> 
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Riana Tauro <riana.tauro@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
>   tests/intel/xe_pmu.c | 149 +++++++++++++++++++++++++++++++++++++++++++
>   tests/meson.build    |   1 +
>   2 files changed, 150 insertions(+)
>   create mode 100644 tests/intel/xe_pmu.c
> 
> diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c
> new file mode 100644
> index 000000000..44589cb86
> --- /dev/null
> +++ b/tests/intel/xe_pmu.c
> @@ -0,0 +1,149 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +/**
> + * TEST: Test Xe PMU functionality
> + * Category: Perf Monitoring Unit
> + * Mega feature: Perf Monitoring Unit
> + * Sub-category: Telemetry
> + * Functionality: Power/Perf
> + * Test category: Functional tests
> + */
> +
> +#include <fcntl.h>
> +#include <limits.h>
> +#include <time.h>
> +#include <errno.h>
> +#include <dirent.h>
> +#include <string.h>
> +#include <sys/time.h>
> +
> +#include "igt.h"
> +#include "igt_device.h"
> +#include "igt_power.h"
> +#include "igt_sysfs.h"
> +#include "igt_perf.h"
> +
> +#include "lib/igt_syncobj.h"
> +#include "xe/xe_ioctl.h"
> +#include "xe/xe_gt.h"
> +#include "xe/xe_query.h"
> +#include "xe/xe_spin.h"
> +#include "xe/xe_util.h"

few headers here that are not used
> +
> +#define SLEEP_DURATION 2 /* in seconds */
> +const double tolerance = 0.1;
> +const char *no_debug_data = "\0";
> +
> +static int open_pmu(int xe, uint64_t config)
> +{
> +	int fd;
> +
> +	fd = perf_xe_open(xe, config);
> +	igt_skip_on(fd < 0 && errno == ENODEV);
> +	igt_assert(fd >= 0);
> +
> +	return fd;
> +}
> +
> +static uint64_t __pmu_read_single(int fd, uint64_t *ts)
> +{
> +	uint64_t data[2];
> +
> +	igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data));
> +	if (ts)
> +		*ts = data[1];
> +
> +	return data[0];
> +}
> +
> +static unsigned long read_idle_residency(int fd, int gt)
> +{
> +	unsigned long residency = 0;
> +	int gt_fd;
> +
> +	gt_fd = xe_sysfs_gt_open(fd, gt);
> +	igt_assert(gt_fd >= 0);
> +	igt_assert(igt_sysfs_scanf(gt_fd, "gtidle/idle_residency_ms", "%lu", &residency) == 1);
> +	close(gt_fd);
> +
> +	return residency;
> +}
> +
> +static u64 get_event_config(int xe, unsigned int gt, char *event)
> +{
> +	int ret;
> +	char xe_device[100];
> +	u64 pmu_config;
%/u64/uint64_t

igt uses uint64_t mostly. To maintain consistency, u32 and u64 in
this file should be replaced with uint64_t .


With the above comments fixed
Reviewed-by: Riana Tauro <riana.tauro@intel.com>
> +	u32 start, end;
> +
> +	xe_perf_device(xe, xe_device, sizeof(xe_device));
> +	ret = perf_event_config(xe_device, event, &pmu_config);
> +	igt_assert(ret >= 0);
> +	ret = perf_event_format(xe_device, "gt", &start, &end);
> +	igt_assert(ret >= 0);
> +	pmu_config |= (u64) gt << start;
> +
> +	return pmu_config;
> +}
> +
> +/**
> + * SUBTEST: gt-c6-idle
> + * Description: Basic residency test to validate idle residency
> + *		measured over a time interval is within the tolerance
> + */
> +static void test_gt_c6_idle(int xe, unsigned int gt)
> +{
> +	int pmu_fd;
> +	u64 pmu_config;
> +	char event[100];
> +	uint64_t ts[2];
> +	unsigned long slept, start, end;
> +	uint64_t val;
> +
> +	/* Get the PMU config for the gt-c6 event */
> +	sprintf(event, "gt-c6-residency");
> +	pmu_config = get_event_config(xe, gt, event);
> +
> +	pmu_fd = open_pmu(xe, pmu_config);
> +
> +	igt_require_f(igt_wait(xe_gt_is_in_c6(xe, gt), 1000, 10), "GT %d should be in C6\n", gt);
> +
> +	/* While idle check full RC6. */
> +	start = read_idle_residency(xe, gt);
> +	val = __pmu_read_single(pmu_fd, &ts[0]);
> +	slept = igt_measured_usleep(SLEEP_DURATION * USEC_PER_SEC) / 1000;
> +	end = read_idle_residency(xe, gt);
> +	val = __pmu_read_single(pmu_fd, &ts[1]) - val;
> +
> +	igt_debug("gt%u: slept=%lu, perf=%"PRIu64"\n",
> +		  gt, slept,  val);
> +
> +	igt_debug("Start res: %lu, end_res: %lu", start, end);
> +
> +	assert_within_epsilon(val,
> +			      (ts[1] - ts[0])/USEC_PER_SEC,
> +			      tolerance);
> +	close(pmu_fd);
> +}
> +
> +igt_main
> +{
> +	int fd, gt;
> +
> +	igt_fixture {
> +		fd = drm_open_driver(DRIVER_XE);
> +		igt_require(!IS_PONTEVECCHIO(xe_dev_id(fd)));
> +	}
> +
> +	igt_describe("Validate PMU gt-c6 residency counters when idle");
> +	igt_subtest("gt-c6-idle")
> +		xe_for_each_gt(fd, gt)
> +			test_gt_c6_idle(fd, gt);
> +
> +	igt_fixture {
> +		close(fd);
> +	}
> +}
> diff --git a/tests/meson.build b/tests/meson.build
> index 33dffad31..d20f50766 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -309,6 +309,7 @@ intel_xe_progs = [
>   	'xe_pat',
>   	'xe_peer2peer',
>   	'xe_pm',
> +	'xe_pmu',
>   	'xe_pm_residency',
>   	'xe_prime_self_import',
>   	'xe_query',


^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH i-g-t v7 3/3] tests/xe/pmu: Add pmu tests for gt-c6
  2025-01-30 21:30 ` [PATCH i-g-t v7 3/3] tests/xe/pmu: Add pmu tests for gt-c6 Vinay Belgaumkar
  2025-01-30 22:42   ` Belgaumkar, Vinay
  2025-01-31  8:13   ` Riana Tauro
@ 2025-01-31 13:20   ` Kamil Konieczny
  2 siblings, 0 replies; 8+ messages in thread
From: Kamil Konieczny @ 2025-01-31 13:20 UTC (permalink / raw)
  To: Vinay Belgaumkar
  Cc: intel-gfx, igt-dev, Lucas De Marchi, Riana Tauro, Rodrigo Vivi

Hi Vinay,
On 2025-01-30 at 13:30:28 -0800, Vinay Belgaumkar wrote:
> Simple tests for validating the PMU implementation for GT C6
> residencies.
> 
> v2: Rename rc6-residency-* to gt-c6-residency and remove freq tests.
> v3: Keep just gt-c6 tests, add frequency tests later.
> v4: Review comments (Riana)
> v5: Review comments (Lucas)
> 
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: Riana Tauro <riana.tauro@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
> ---
>  tests/intel/xe_pmu.c | 149 +++++++++++++++++++++++++++++++++++++++++++
>  tests/meson.build    |   1 +
>  2 files changed, 150 insertions(+)
>  create mode 100644 tests/intel/xe_pmu.c
> 
> diff --git a/tests/intel/xe_pmu.c b/tests/intel/xe_pmu.c
> new file mode 100644
> index 000000000..44589cb86
> --- /dev/null
> +++ b/tests/intel/xe_pmu.c
> @@ -0,0 +1,149 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2025 Intel Corporation
> + */
> +
> +/**
> + * TEST: Test Xe PMU functionality
> + * Category: Perf Monitoring Unit
> + * Mega feature: Perf Monitoring Unit
> + * Sub-category: Telemetry
> + * Functionality: Power/Perf
> + * Test category: Functional tests

Sort this alphabetically, also add description with PMU deciphered:

 * Description: Tests Performance Monitoring Unit PMU


> + */
> +
> +#include <fcntl.h>
> +#include <limits.h>
> +#include <time.h>
> +#include <errno.h>
> +#include <dirent.h>
> +#include <string.h>
> +#include <sys/time.h>

Sort these headers.

> +
> +#include "igt.h"
> +#include "igt_device.h"
> +#include "igt_power.h"
> +#include "igt_sysfs.h"
> +#include "igt_perf.h"
> +
> +#include "lib/igt_syncobj.h"
> +#include "xe/xe_ioctl.h"
> +#include "xe/xe_gt.h"
> +#include "xe/xe_query.h"
> +#include "xe/xe_spin.h"
> +#include "xe/xe_util.h"
> +
> +#define SLEEP_DURATION 2 /* in seconds */
> +const double tolerance = 0.1;
> +const char *no_debug_data = "\0";
> +
> +static int open_pmu(int xe, uint64_t config)
> +{
> +	int fd;
> +
> +	fd = perf_xe_open(xe, config);
> +	igt_skip_on(fd < 0 && errno == ENODEV);
> +	igt_assert(fd >= 0);
> +
> +	return fd;
> +}
> +
> +static uint64_t __pmu_read_single(int fd, uint64_t *ts)
> +{
> +	uint64_t data[2];
> +
> +	igt_assert_eq(read(fd, data, sizeof(data)), sizeof(data));
> +	if (ts)
> +		*ts = data[1];
> +
> +	return data[0];
> +}
> +
> +static unsigned long read_idle_residency(int fd, int gt)
> +{
> +	unsigned long residency = 0;
> +	int gt_fd;
> +
> +	gt_fd = xe_sysfs_gt_open(fd, gt);
> +	igt_assert(gt_fd >= 0);
> +	igt_assert(igt_sysfs_scanf(gt_fd, "gtidle/idle_residency_ms", "%lu", &residency) == 1);
> +	close(gt_fd);
> +
> +	return residency;
> +}
> +
> +static u64 get_event_config(int xe, unsigned int gt, char *event)
> +{
> +	int ret;
> +	char xe_device[100];
> +	u64 pmu_config;
> +	u32 start, end;
> +
> +	xe_perf_device(xe, xe_device, sizeof(xe_device));
> +	ret = perf_event_config(xe_device, event, &pmu_config);
> +	igt_assert(ret >= 0);
> +	ret = perf_event_format(xe_device, "gt", &start, &end);
> +	igt_assert(ret >= 0);
> +	pmu_config |= (u64) gt << start;
> +
> +	return pmu_config;
> +}
> +
> +/**
> + * SUBTEST: gt-c6-idle
> + * Description: Basic residency test to validate idle residency
> + *		measured over a time interval is within the tolerance
> + */
> +static void test_gt_c6_idle(int xe, unsigned int gt)
> +{
> +	int pmu_fd;
> +	u64 pmu_config;
> +	char event[100];
> +	uint64_t ts[2];
> +	unsigned long slept, start, end;
> +	uint64_t val;
> +
> +	/* Get the PMU config for the gt-c6 event */
> +	sprintf(event, "gt-c6-residency");
> +	pmu_config = get_event_config(xe, gt, event);
> +
> +	pmu_fd = open_pmu(xe, pmu_config);
> +
> +	igt_require_f(igt_wait(xe_gt_is_in_c6(xe, gt), 1000, 10), "GT %d should be in C6\n", gt);
> +
> +	/* While idle check full RC6. */
> +	start = read_idle_residency(xe, gt);
> +	val = __pmu_read_single(pmu_fd, &ts[0]);
> +	slept = igt_measured_usleep(SLEEP_DURATION * USEC_PER_SEC) / 1000;
> +	end = read_idle_residency(xe, gt);
> +	val = __pmu_read_single(pmu_fd, &ts[1]) - val;
> +
> +	igt_debug("gt%u: slept=%lu, perf=%"PRIu64"\n",
> +		  gt, slept,  val);
> +
> +	igt_debug("Start res: %lu, end_res: %lu", start, end);
> +
> +	assert_within_epsilon(val,
> +			      (ts[1] - ts[0])/USEC_PER_SEC,
> +			      tolerance);
> +	close(pmu_fd);
> +}
> +
> +igt_main
> +{
> +	int fd, gt;
> +
> +	igt_fixture {
> +		fd = drm_open_driver(DRIVER_XE);
> +		igt_require(!IS_PONTEVECCHIO(xe_dev_id(fd)));
> +	}
> +
> +	igt_describe("Validate PMU gt-c6 residency counters when idle");
> +	igt_subtest("gt-c6-idle")
> +		xe_for_each_gt(fd, gt)
> +			test_gt_c6_idle(fd, gt);
> +
> +	igt_fixture {
> +		close(fd);
> +	}
> +}
> diff --git a/tests/meson.build b/tests/meson.build
> index 33dffad31..d20f50766 100644
> --- a/tests/meson.build
> +++ b/tests/meson.build
> @@ -309,6 +309,7 @@ intel_xe_progs = [
>  	'xe_pat',
>  	'xe_peer2peer',
>  	'xe_pm',
> +	'xe_pmu',
>  	'xe_pm_residency',

Why not after xe_pm_residency?

Regards,
Kamil

>  	'xe_prime_self_import',
>  	'xe_query',
> -- 
> 2.38.1
> 

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2025-01-31 13:20 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-01-30 21:30 [PATCH i-g-t v7 0/3] tests/intel/xe_pmu: Add PMU tests Vinay Belgaumkar
2025-01-30 21:30 ` [PATCH i-g-t v7 1/3] lib/igt_core: Add tolerance and measured_usleep utils Vinay Belgaumkar
2025-01-30 21:30 ` [PATCH i-g-t v7 2/3] lib/igt_perf: Add utils to extract PMU event info Vinay Belgaumkar
2025-01-31  8:01   ` Riana Tauro
2025-01-30 21:30 ` [PATCH i-g-t v7 3/3] tests/xe/pmu: Add pmu tests for gt-c6 Vinay Belgaumkar
2025-01-30 22:42   ` Belgaumkar, Vinay
2025-01-31  8:13   ` Riana Tauro
2025-01-31 13:20   ` Kamil Konieczny

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