From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>, Ben Widawsky <ben@bwidawsk.net>
Subject: [PATCH] drm/i915: implement Disable4x2SubspanOptimization w/a for ivb, too
Date: Sun, 15 Apr 2012 00:54:00 +0200 [thread overview]
Message-ID: <1334444040-5697-1-git-send-email-daniel.vetter@ffwll.ch> (raw)
Copy&pasted from the vlv setup code. According to docs, we need that
on ivb, too.
Cc: Ben Widawsky <ben@bwidawsk.net>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/intel_display.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 33aaad3..7be1d1a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -8938,6 +8938,11 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
DISPPLANE_TRICKLE_FEED_DISABLE);
intel_flush_display_plane(dev_priv, pipe);
}
+
+ /* WaDisable4x2SubspanOptimization */
+ I915_WRITE(CACHE_MODE_1, I915_READ(CACHE_MODE_1) |
+ (PIXEL_SUBSPAN_COLLECT_OPT_DISABLE << 16) |
+ PIXEL_SUBSPAN_COLLECT_OPT_DISABLE);
}
static void valleyview_init_clock_gating(struct drm_device *dev)
--
1.7.10
next reply other threads:[~2012-04-14 22:53 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-14 22:54 Daniel Vetter [this message]
2012-04-18 9:21 ` [PATCH] drm/i915: implement Disable4x2SubspanOptimization w/a for ivb, too Daniel Vetter
-- strict thread matches above, loose matches on Subject: below --
2012-04-24 14:00 Daniel Vetter
2012-04-24 15:57 ` Ben Widawsky
2012-04-24 16:26 ` Daniel Vetter
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