From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 02/12] drm/i915: DSL_LINEMASK is 12 bits only on gen2
Date: Wed, 2 May 2012 22:55:44 -0300 [thread overview]
Message-ID: <1336010154-2946-2-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1336010154-2946-1-git-send-email-przanoni@gmail.com>
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
Gen3+ is 13 bits (12:0).
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 3 ++-
drivers/gpu/drm/i915/intel_display.c | 11 ++++++++---
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7bc407a..8da0b40 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2475,7 +2475,8 @@
/* Pipe A */
#define _PIPEADSL 0x70000
-#define DSL_LINEMASK 0x00000fff
+#define DSL_LINEMASK_GEN2 0x00000fff
+#define DSL_LINEMASK_GEN3 0x00001fff
#define _PIPEACONF 0x70008
#define PIPECONF_ENABLE (1<<31)
#define PIPECONF_DISABLE 0
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e1716be..613f871 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -871,15 +871,20 @@ void intel_wait_for_pipe_off(struct drm_device *dev, int pipe)
100))
DRM_DEBUG_KMS("pipe_off wait timed out\n");
} else {
- u32 last_line;
+ u32 last_line, line_mask;
int reg = PIPEDSL(pipe);
unsigned long timeout = jiffies + msecs_to_jiffies(100);
+ if (IS_GEN2(dev))
+ line_mask = DSL_LINEMASK_GEN2;
+ else
+ line_mask = DSL_LINEMASK_GEN3;
+
/* Wait for the display line to settle */
do {
- last_line = I915_READ(reg) & DSL_LINEMASK;
+ last_line = I915_READ(reg) & line_mask;
mdelay(5);
- } while (((I915_READ(reg) & DSL_LINEMASK) != last_line) &&
+ } while (((I915_READ(reg) & line_mask) != last_line) &&
time_after(timeout, jiffies));
if (time_after(jiffies, timeout))
DRM_DEBUG_KMS("pipe_off wait timed out\n");
--
1.7.10
next prev parent reply other threads:[~2012-05-03 1:56 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-03 1:55 [PATCH 01/12] drm/i915: enable dip before writing data on gen4 Paulo Zanoni
2012-05-03 1:55 ` Paulo Zanoni [this message]
2012-05-03 11:55 ` [PATCH 02/12] drm/i915: DSL_LINEMASK is 12 bits only on gen2 Chris Wilson
2012-05-03 1:55 ` [PATCH 03/12] drm/i915: implement ironlake_wait_for_vblank Paulo Zanoni
2012-05-03 12:00 ` Chris Wilson
2012-05-03 1:55 ` [PATCH 04/12] drm/i915: touch the DIP control register after enabling the HDMI port Paulo Zanoni
2012-05-03 1:55 ` [PATCH 05/12] drm/i915: change coding style of the write_infoframe functions Paulo Zanoni
2012-05-03 1:55 ` [PATCH 06/12] drm/i915: start writing infoframes at address 0 on gen 4 Paulo Zanoni
2012-05-03 1:55 ` [PATCH 07/12] drm/i915: mask the video DIP port select Paulo Zanoni
2012-05-03 20:32 ` Eugeni Dodonov
2012-05-03 1:55 ` [PATCH 08/12] drm/i915: break intel_infoframe_flags into _enable and _index Paulo Zanoni
2012-05-03 20:54 ` Eugeni Dodonov
2012-05-04 14:09 ` Paulo Zanoni
2012-05-03 1:55 ` [PATCH 09/12] drm/i915: disable the infoframe before changing it Paulo Zanoni
2012-05-03 20:42 ` Eugeni Dodonov
2012-05-03 1:55 ` [PATCH 10/12] drm/i915: mask the video DIP frequency when " Paulo Zanoni
2012-05-03 20:42 ` Eugeni Dodonov
2012-05-03 1:55 ` [PATCH 11/12] drm/i915: split ironlake_write_infoframe into ibx_ and cpt_ Paulo Zanoni
2012-05-03 1:55 ` [PATCH 12/12] drm/i915: simplify intel_encoder_commit Paulo Zanoni
2012-05-03 9:41 ` [PATCH 01/12] drm/i915: enable dip before writing data on gen4 Daniel Vetter
2012-05-03 13:46 ` Eugeni Dodonov
2012-05-04 20:18 ` [PATCH 02/14] drm/i915: DSL_LINEMASK is 12 bits only on gen2 Paulo Zanoni
2012-05-04 20:18 ` [PATCH 03/14] drm/i915: implement ironlake_wait_for_vblank Paulo Zanoni
2012-05-08 11:55 ` Daniel Vetter
2012-05-08 12:34 ` Paulo Zanoni
2012-05-08 12:44 ` Daniel Vetter
2012-05-08 12:50 ` Daniel Vetter
2012-05-04 20:18 ` [PATCH 04/14] drm/i915: touch the DIP control register after enabling the HDMI port Paulo Zanoni
2012-05-08 11:59 ` Daniel Vetter
2012-05-08 12:29 ` Daniel Vetter
2012-05-04 20:18 ` [PATCH 05/14] drm/i915: change coding style of the write_infoframe functions Paulo Zanoni
2012-05-04 20:18 ` [PATCH 06/14] drm/i915: start writing infoframes at address 0 on gen 4 Paulo Zanoni
2012-05-04 20:18 ` [PATCH 07/14] drm/i915: mask the video DIP port select Paulo Zanoni
2012-05-08 12:07 ` Daniel Vetter
2012-05-04 20:18 ` [PATCH 08/14] drm/i915: break intel_infoframe_flags into _enable and _frequency Paulo Zanoni
2012-05-08 12:10 ` Daniel Vetter
2012-05-04 20:18 ` [PATCH 09/14] drm/i915: disable the infoframe before changing it Paulo Zanoni
2012-05-04 20:18 ` [PATCH 10/14] drm/i915: mask the video DIP frequency when " Paulo Zanoni
2012-05-04 20:18 ` [PATCH 11/14] drm/i915: simplify intel_encoder_commit Paulo Zanoni
2012-05-04 20:18 ` [PATCH 12/14] drm/i915: split ironlake_write_infoframe into ibx_ and cpt_ Paulo Zanoni
2012-05-04 20:18 ` [PATCH 13/14] drm/i915: ibx_write_infoframe can disable AVI Paulo Zanoni
2012-05-04 20:36 ` Daniel Vetter
2012-05-04 20:18 ` [PATCH 14/14] drm/i915: set the DIP port on ibx_write_infoframe Paulo Zanoni
2012-05-08 12:51 ` Daniel Vetter
2012-05-08 11:49 ` [PATCH 02/14] drm/i915: DSL_LINEMASK is 12 bits only on gen2 Daniel Vetter
2012-05-08 12:27 ` Daniel Vetter
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