From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 02/14] drm/i915: DSL_LINEMASK is 12 bits only on gen2
Date: Tue, 8 May 2012 14:27:29 +0200 [thread overview]
Message-ID: <20120508122729.GH4802@phenom.ffwll.local> (raw)
In-Reply-To: <20120508114936.GC4802@phenom.ffwll.local>
On Tue, May 08, 2012 at 01:49:36PM +0200, Daniel Vetter wrote:
> On Fri, May 04, 2012 at 05:18:14PM -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >
> > Gen3+ is 13 bits (12:0), and on gen2 only 12 (11:0). For both the high
> > bits are marked reserved, read-only so continue to mask them. Bit 31
> > is not reserved and has a meaning.
> >
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> Queued for -next, thanks for the patch. While reading through the code
> I've noticed that there are other places where we get this wrong. In the
> crt load detect code we don't even bother with properly masking, and in
> the precise vblank timestamp code we always use the gen3+ mask. That code
> in addition doesn't properly handle the lack of the PIPEDSL register on
> ilk+. Can I volunteer you to look into that?
Scrap the last remark, if mixed up PIPEDSL with PIPESTAT.
-Daniel
--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48
prev parent reply other threads:[~2012-05-08 12:26 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-03 1:55 [PATCH 01/12] drm/i915: enable dip before writing data on gen4 Paulo Zanoni
2012-05-03 1:55 ` [PATCH 02/12] drm/i915: DSL_LINEMASK is 12 bits only on gen2 Paulo Zanoni
2012-05-03 11:55 ` Chris Wilson
2012-05-03 1:55 ` [PATCH 03/12] drm/i915: implement ironlake_wait_for_vblank Paulo Zanoni
2012-05-03 12:00 ` Chris Wilson
2012-05-03 1:55 ` [PATCH 04/12] drm/i915: touch the DIP control register after enabling the HDMI port Paulo Zanoni
2012-05-03 1:55 ` [PATCH 05/12] drm/i915: change coding style of the write_infoframe functions Paulo Zanoni
2012-05-03 1:55 ` [PATCH 06/12] drm/i915: start writing infoframes at address 0 on gen 4 Paulo Zanoni
2012-05-03 1:55 ` [PATCH 07/12] drm/i915: mask the video DIP port select Paulo Zanoni
2012-05-03 20:32 ` Eugeni Dodonov
2012-05-03 1:55 ` [PATCH 08/12] drm/i915: break intel_infoframe_flags into _enable and _index Paulo Zanoni
2012-05-03 20:54 ` Eugeni Dodonov
2012-05-04 14:09 ` Paulo Zanoni
2012-05-03 1:55 ` [PATCH 09/12] drm/i915: disable the infoframe before changing it Paulo Zanoni
2012-05-03 20:42 ` Eugeni Dodonov
2012-05-03 1:55 ` [PATCH 10/12] drm/i915: mask the video DIP frequency when " Paulo Zanoni
2012-05-03 20:42 ` Eugeni Dodonov
2012-05-03 1:55 ` [PATCH 11/12] drm/i915: split ironlake_write_infoframe into ibx_ and cpt_ Paulo Zanoni
2012-05-03 1:55 ` [PATCH 12/12] drm/i915: simplify intel_encoder_commit Paulo Zanoni
2012-05-03 9:41 ` [PATCH 01/12] drm/i915: enable dip before writing data on gen4 Daniel Vetter
2012-05-03 13:46 ` Eugeni Dodonov
2012-05-04 20:18 ` [PATCH 02/14] drm/i915: DSL_LINEMASK is 12 bits only on gen2 Paulo Zanoni
2012-05-04 20:18 ` [PATCH 03/14] drm/i915: implement ironlake_wait_for_vblank Paulo Zanoni
2012-05-08 11:55 ` Daniel Vetter
2012-05-08 12:34 ` Paulo Zanoni
2012-05-08 12:44 ` Daniel Vetter
2012-05-08 12:50 ` Daniel Vetter
2012-05-04 20:18 ` [PATCH 04/14] drm/i915: touch the DIP control register after enabling the HDMI port Paulo Zanoni
2012-05-08 11:59 ` Daniel Vetter
2012-05-08 12:29 ` Daniel Vetter
2012-05-04 20:18 ` [PATCH 05/14] drm/i915: change coding style of the write_infoframe functions Paulo Zanoni
2012-05-04 20:18 ` [PATCH 06/14] drm/i915: start writing infoframes at address 0 on gen 4 Paulo Zanoni
2012-05-04 20:18 ` [PATCH 07/14] drm/i915: mask the video DIP port select Paulo Zanoni
2012-05-08 12:07 ` Daniel Vetter
2012-05-04 20:18 ` [PATCH 08/14] drm/i915: break intel_infoframe_flags into _enable and _frequency Paulo Zanoni
2012-05-08 12:10 ` Daniel Vetter
2012-05-04 20:18 ` [PATCH 09/14] drm/i915: disable the infoframe before changing it Paulo Zanoni
2012-05-04 20:18 ` [PATCH 10/14] drm/i915: mask the video DIP frequency when " Paulo Zanoni
2012-05-04 20:18 ` [PATCH 11/14] drm/i915: simplify intel_encoder_commit Paulo Zanoni
2012-05-04 20:18 ` [PATCH 12/14] drm/i915: split ironlake_write_infoframe into ibx_ and cpt_ Paulo Zanoni
2012-05-04 20:18 ` [PATCH 13/14] drm/i915: ibx_write_infoframe can disable AVI Paulo Zanoni
2012-05-04 20:36 ` Daniel Vetter
2012-05-04 20:18 ` [PATCH 14/14] drm/i915: set the DIP port on ibx_write_infoframe Paulo Zanoni
2012-05-08 12:51 ` Daniel Vetter
2012-05-08 11:49 ` [PATCH 02/14] drm/i915: DSL_LINEMASK is 12 bits only on gen2 Daniel Vetter
2012-05-08 12:27 ` Daniel Vetter [this message]
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