From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 09/14] drm/i915: fix DP AUX register definitions on Haswell
Date: Mon, 15 Oct 2012 15:51:37 -0300 [thread overview]
Message-ID: <1350327102-4463-10-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1350327102-4463-1-git-send-email-przanoni@gmail.com>
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
The old rule that the AUX registers are just an offset (+4 and +10)
from output_reg is not true anymore, since output_reg in on the CPU
and some AUX regs are on the PCH.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
drivers/gpu/drm/i915/intel_dp.c | 23 +++++++++++++++++++++++
2 files changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 68ce163..84d9e69c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2548,6 +2548,14 @@
#define DPD_AUX_CH_DATA4 0x64320
#define DPD_AUX_CH_DATA5 0x64324
+#define PCH_DPB_AUX_CH_CTL 0xe4110
+#define PCH_DPC_AUX_CH_CTL 0xe4210
+#define PCH_DPD_AUX_CH_CTL 0xe4310
+
+#define PCH_DPB_AUX_CH_DATA 0xe4114
+#define PCH_DPC_AUX_CH_DATA 0xe4214
+#define PCH_DPD_AUX_CH_DATA 0xe4314
+
#define DP_AUX_CH_CTL_SEND_BUSY (1 << 31)
#define DP_AUX_CH_CTL_DONE (1 << 30)
#define DP_AUX_CH_CTL_INTERRUPT (1 << 29)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 22702df..3a5fe2f 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -356,6 +356,29 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
uint32_t aux_clock_divider;
int try, precharge;
+ if (IS_HASWELL(dev)) {
+ switch (intel_dp->port) {
+ case PORT_A:
+ ch_ctl = DPA_AUX_CH_CTL;
+ ch_data = DPA_AUX_CH_DATA1;
+ break;
+ case PORT_B:
+ ch_ctl = PCH_DPB_AUX_CH_CTL;
+ ch_data = PCH_DPB_AUX_CH_DATA;
+ break;
+ case PORT_C:
+ ch_ctl = PCH_DPC_AUX_CH_CTL;
+ ch_data = PCH_DPC_AUX_CH_DATA;
+ break;
+ case PORT_D:
+ ch_ctl = PCH_DPD_AUX_CH_CTL;
+ ch_data = PCH_DPD_AUX_CH_DATA;
+ break;
+ default:
+ BUG();
+ }
+ }
+
intel_dp_check_edp(intel_dp);
/* The clock divider is based off the hrawclk,
* and would like to run at 2MHz. So, take the
--
1.7.11.4
next prev parent reply other threads:[~2012-10-15 18:52 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-15 18:51 [PATCH 00/14] Haswell DP enablement Paulo Zanoni
2012-10-15 18:51 ` [PATCH 01/14] drm/i915: add DP support to intel_ddi_enable_pipe_func Paulo Zanoni
2012-10-16 10:04 ` Jani Nikula
2012-10-15 18:51 ` [PATCH 02/14] drm/i915: add intel_ddi_set_pipe_settings Paulo Zanoni
2012-10-16 8:05 ` Jani Nikula
2012-10-15 18:51 ` [PATCH 03/14] drm/i915: add DP support to intel_ddi_pll_mode_set Paulo Zanoni
2012-10-15 18:51 ` [PATCH 04/14] drm/i915: add DP support to intel_ddi_disable_port Paulo Zanoni
2012-10-16 10:05 ` Jani Nikula
2012-10-15 18:51 ` [PATCH 05/14] drm/i915: add DP support to intel_ddi_mode_set Paulo Zanoni
2012-10-18 18:00 ` Lespiau, Damien
2012-10-15 18:51 ` [PATCH 06/14] drm/i915: add basic Haswell DP link train bits Paulo Zanoni
2012-10-16 11:47 ` Jani Nikula
2012-10-15 18:51 ` [PATCH 07/14] drm/i915: use TU_SIZE macro at intel_dp_set_m_n Paulo Zanoni
2012-10-16 11:49 ` Jani Nikula
2012-10-17 20:27 ` Daniel Vetter
2012-10-18 17:14 ` Paulo Zanoni
2012-10-18 19:36 ` Daniel Vetter
2012-10-15 18:51 ` [PATCH 08/14] drm/i915: fix Haswell DP M/N registers Paulo Zanoni
2012-10-15 20:29 ` Adam Jackson
2012-10-15 20:39 ` Daniel Vetter
2012-10-15 20:45 ` Paulo Zanoni
2012-10-18 15:42 ` [PATCH 08/83] " Paulo Zanoni
2012-10-15 18:51 ` Paulo Zanoni [this message]
2012-10-18 13:57 ` [PATCH 09/14] drm/i915: fix DP AUX register definitions on Haswell Lespiau, Damien
2012-10-15 18:51 ` [PATCH 10/14] drm/i915: add DP support to intel_ddi_get_encoder_port Paulo Zanoni
2012-10-18 14:06 ` Lespiau, Damien
2012-10-15 18:51 ` [PATCH 11/14] drm/i915: add DP support to intel_ddi_get_hw_state Paulo Zanoni
2012-10-18 14:14 ` Lespiau, Damien
2012-10-15 18:51 ` [PATCH 12/14] drm/i915: add DP support to intel_enable_ddi Paulo Zanoni
2012-10-18 14:20 ` Lespiau, Damien
2012-10-15 18:51 ` [PATCH 13/14] drm/i915: implement Haswell DP link train sequence Paulo Zanoni
2012-10-18 17:34 ` Lespiau, Damien
2012-10-15 18:51 ` [PATCH 14/14] drm/i915: set the correct function pointers for Haswell DP Paulo Zanoni
2012-10-18 17:36 ` Lespiau, Damien
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