From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 8/8] drm/i915: add clock gating regs to VLV offset check function
Date: Thu, 18 Oct 2012 13:07:19 -0500 [thread overview]
Message-ID: <1350583639-773-8-git-send-email-jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1350583639-773-1-git-send-email-jbarnes@virtuousgeek.org>
So we can write them properly.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
drivers/gpu/drm/i915/i915_drv.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 6f03b26..39c53ad 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1130,8 +1130,17 @@ static bool IS_DISPLAYREG(u32 reg)
return false;
switch (reg) {
+ case _3D_CHICKEN3:
+ case IVB_CHICKEN3:
+ case GEN7_COMMON_SLICE_CHICKEN1:
+ case GEN7_L3CNTLREG1:
+ case GEN7_L3_CHICKEN_MODE_REGISTER:
case GEN7_ROW_CHICKEN2:
+ case GEN7_L3SQCREG4:
+ case GEN7_SQ_CHICKEN_MBCUNIT_CONFIG:
case GEN7_HALF_SLICE_CHICKEN1:
+ case GEN6_MBCTL:
+ case GEN6_UCGCTL2:
return false;
default:
break;
--
1.7.9.5
next prev parent reply other threads:[~2012-10-18 18:07 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-18 18:07 [PATCH 1/8] drm/i915: implement WaDisableL3CacheAging on VLV Jesse Barnes
2012-10-18 18:07 ` [PATCH 2/8] drm/i915: implement WaDisableDopClockGatingisable on VLV and IVB Jesse Barnes
2012-10-18 18:07 ` [PATCH 3/8] drm/i915: implement WaForceL3Serialization " Jesse Barnes
2012-10-18 18:07 ` [PATCH 4/8] drm/i915: implement WaDisableVLVClockGating_VBIIssue on VLV Jesse Barnes
2012-10-18 18:07 ` [PATCH 5/8] drm/i915: implement WaDisablePSDDualDispatchEnable on IVB & VLV Jesse Barnes
2012-10-18 18:07 ` [PATCH 6/8] drm/i915: TLB invalidation with MI_FLUSH_SW requires a post-sync op Jesse Barnes
2012-10-23 11:22 ` Chris Wilson
2012-10-23 14:28 ` Jesse Barnes
2012-10-18 18:07 ` [PATCH 7/8] drm/i915: PIPE_CONTROL TLB invalidate requires CS stall Jesse Barnes
2012-10-23 11:42 ` Chris Wilson
2012-10-25 18:28 ` Jesse Barnes
2012-10-18 18:07 ` Jesse Barnes [this message]
-- strict thread matches above, loose matches on Subject: below --
2012-10-25 19:15 [PATCH 1/8] drm/i915: implement WaDisableL3CacheAging on VLV Jesse Barnes
2012-10-25 19:15 ` [PATCH 8/8] drm/i915: add clock gating regs to VLV offset check function Jesse Barnes
2012-11-02 15:34 ` Daniel Vetter
2012-10-18 15:43 [PATCH 1/8] drm/i915: implement WaDisableL3CacheAging on VLV Jesse Barnes
2012-10-18 15:43 ` [PATCH 8/8] drm/i915: add clock gating regs to VLV offset check function Jesse Barnes
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1350583639-773-8-git-send-email-jbarnes@virtuousgeek.org \
--to=jbarnes@virtuousgeek.org \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox