From: Ben Widawsky <ben@bwidawsk.net>
To: intel-gfx@lists.freedesktop.org
Cc: Ben Widawsky <ben@bwidawsk.net>
Subject: [PATCH] drm/i915: Don't overclock on Haswell
Date: Sat, 23 Mar 2013 17:46:31 -0700 [thread overview]
Message-ID: <1364085991-20495-1-git-send-email-ben@bwidawsk.net> (raw)
In-Reply-To: <1363749596-1429-1-git-send-email-ben@bwidawsk.net>
HSW doesn't overclock the same way as IVB or SNB. I do not know about
VLV, so I've kept that off as well. I'm still working on getting the doc
updates to explain how we overclock on Haswell.
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index ce3db2c..9c11dd9 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2628,7 +2628,7 @@ static void gen6_enable_rps(struct drm_device *dev)
(IS_HASWELL(dev) ? GEN7_RP_DOWN_IDLE_AVG : GEN6_RP_DOWN_IDLE_CONT));
ret = sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_MIN_FREQ_TABLE, 0);
- if (!ret) {
+ if (!ret && IS_GEN6(dev) || IS_IVYBRIDGE(dev)) {
pcu_mbox = 0;
ret = sandybridge_pcode_read(dev_priv, GEN6_READ_OC_PARAMS, &pcu_mbox);
if (!ret && (pcu_mbox & (1<<31))) { /* OC supported */
--
1.8.2
next prev parent reply other threads:[~2013-03-24 0:44 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-20 3:19 [PATCH] drm/i915: Correct sandybrige overclocking Ben Widawsky
2013-03-20 9:58 ` Chris Wilson
2013-03-20 16:21 ` Jesse Barnes
2013-03-20 16:33 ` Ben Widawsky
2013-03-20 16:57 ` Jesse Barnes
2013-03-20 21:47 ` Daniel Vetter
2013-03-23 19:32 ` Daniel Vetter
2013-03-23 19:39 ` Daniel Vetter
2013-03-23 23:56 ` Ben Widawsky
2013-03-24 12:06 ` Daniel Vetter
2013-03-24 0:46 ` Ben Widawsky [this message]
2013-03-25 14:36 ` [PATCH] drm/i915: Don't overclock on Haswell Jesse Barnes
2013-03-25 15:38 ` Daniel Vetter
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