From: Imre Deak <imre.deak@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915: hsw backlight registers need transcoder instead of pipe
Date: Thu, 25 Apr 2013 17:07:55 +0300 [thread overview]
Message-ID: <1366898875.13545.22.camel@intelbox> (raw)
In-Reply-To: <1366897765-24865-1-git-send-email-jani.nikula@intel.com>
On Thu, 2013-04-25 at 16:49 +0300, Jani Nikula wrote:
> v2: Make TRANSCODER_EDP handling more explicit. (Imre)
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Looks ok, so still applies my r-b.
> --
> drivers/gpu/drm/i915/i915_reg.h | 4 ++++
> drivers/gpu/drm/i915/intel_panel.c | 7 ++++++-
> 2 files changed, 10 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 60e0e19..e79669f 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2087,6 +2087,10 @@
> #define BLM_PIPE_A (0 << 29)
> #define BLM_PIPE_B (1 << 29)
> #define BLM_PIPE_C (2 << 29) /* ivb + */
> +#define BLM_TRANSCODER_A BLM_PIPE_A /* hsw */
> +#define BLM_TRANSCODER_B BLM_PIPE_B
> +#define BLM_TRANSCODER_C BLM_PIPE_C
> +#define BLM_TRANSCODER_EDP (3 << 29)
> #define BLM_PIPE(pipe) ((pipe) << 29)
> #define BLM_POLARITY_I965 (1 << 28) /* gen4 only */
> #define BLM_PHASE_IN_INTERUPT_STATUS (1 << 26)
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index 5d3e9d7..7f6141d 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -344,6 +344,8 @@ void intel_panel_enable_backlight(struct drm_device *dev,
> enum pipe pipe)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> + enum transcoder cpu_transcoder =
> + intel_pipe_to_cpu_transcoder(dev_priv, pipe);
> unsigned long flags;
>
> spin_lock_irqsave(&dev_priv->backlight.lock, flags);
> @@ -374,7 +376,10 @@ void intel_panel_enable_backlight(struct drm_device *dev,
> else
> tmp &= ~BLM_PIPE_SELECT;
>
> - tmp |= BLM_PIPE(pipe);
> + if (cpu_transcoder == TRANSCODER_EDP)
> + tmp |= BLM_TRANSCODER_EDP;
> + else
> + tmp |= BLM_PIPE(cpu_transcoder);
> tmp &= ~BLM_PWM_ENABLE;
>
> I915_WRITE(reg, tmp);
next prev parent reply other threads:[~2013-04-25 14:07 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-12 12:18 [PATCH 0/4] drm/i915: backlight locking, cleanup Jani Nikula
2013-04-12 12:18 ` [PATCH 1/4] drm/i915: keep max backlight internal to intel_panel.c Jani Nikula
2013-04-12 12:32 ` Chris Wilson
2013-04-12 12:18 ` [PATCH 2/4] drm/i915: protect backlight registers and data with a spinlock Jani Nikula
2013-04-15 13:03 ` Chris Wilson
2013-04-15 16:38 ` Jani Nikula
2013-04-15 16:59 ` Daniel Vetter
2013-04-15 20:49 ` Chris Wilson
2013-04-15 21:40 ` Daniel Vetter
2013-04-25 12:13 ` Daniel Vetter
2013-04-12 12:18 ` [PATCH 3/4] drm/i915: ensure single initialization and cleanup of backlight device Jani Nikula
2013-04-15 6:33 ` Jani Nikula
2013-04-15 7:33 ` Daniel Vetter
2013-04-12 12:18 ` [PATCH 4/4] drm/i915: hsw backlight registers need transcoder instead of pipe Jani Nikula
2013-04-25 13:14 ` Imre Deak
2013-04-25 13:34 ` Daniel Vetter
2013-04-25 13:45 ` Daniel Vetter
2013-04-25 13:49 ` [PATCH v2] " Jani Nikula
2013-04-25 14:07 ` Imre Deak [this message]
2013-04-25 14:13 ` Daniel Vetter
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