[PATCH] drm/i915: Make sure PORT_HOTPLUG_EN is written

[PATCH] drm/i915: Make sure PORT_HOTPLUG_EN is written

[Egbert Eich]

Add posting read to make sure PORT_HOTPLUG_EN is written in
i915_hpd_irq_setup().

Signed-off-by: Egbert Eich <eich@suse.de>
---
 drivers/gpu/drm/i915/i915_irq.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 1f3a971..a38372b 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2805,6 +2805,7 @@ static void i915_hpd_irq_setup(struct drm_device *dev)
 
 		/* Ignore TV since it's buggy */
 		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
+		POSTING_READ(PORT_HOTPLUG_EN);
 	}
 }
 
-- 
1.8.1.4

Re: [PATCH] drm/i915: Make sure PORT_HOTPLUG_EN is written

[Chris Wilson]

On Fri, Jul 26, 2013 at 12:31:30PM +0200, Egbert Eich wrote:
> Add posting read to make sure PORT_HOTPLUG_EN is written in
> i915_hpd_irq_setup().

It's not vital that the write be flushed here. On the deferred reenable
path a further delay in rearming is not significant, and inside the irq
handler (for disabling) the write will be flushed.

In terms of the patch itself, you would also need to fixup
ibx_hpd_irq_setup as well.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

Re: [PATCH] drm/i915: Make sure PORT_HOTPLUG_EN is written

[Egbert Eich]

Chris Wilson writes:
 > On Fri, Jul 26, 2013 at 12:31:30PM +0200, Egbert Eich wrote:
 > > Add posting read to make sure PORT_HOTPLUG_EN is written in
 > > i915_hpd_irq_setup().
 > 
 > It's not vital that the write be flushed here. On the deferred reenable
 > path a further delay in rearming is not significant, and inside the irq
 > handler (for disabling) the write will be flushed.
 > 
 > In terms of the patch itself, you would also need to fixup
 > ibx_hpd_irq_setup as well.
 > -Chris

We can probably drop this patch. It was one try figuring why HPD interrupts
are still seeen on pins which have been disabled. It turned out that the
root cause was a mixup in the mapping of pins to enable bits due to incorrect
documentation.

Cheers,
	Egbert.