From: "Xiang, Haihao" <haihao.xiang@intel.com>
To: Kenneth Graunke <kenneth@whitecape.org>
Cc: intel-gfx@lists.freedesktop.org, Ben Widawsky <ben@bwidawsk.net>
Subject: Re: [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP.
Date: Wed, 11 Dec 2013 09:44:38 +0800 [thread overview]
Message-ID: <1386726278.18488.19.camel@xhh-ivb32> (raw)
In-Reply-To: <52A749B8.1050904@whitecape.org>
On Tue, 2013-12-10 at 09:04 -0800, Kenneth Graunke wrote:
> On 12/10/2013 03:40 AM, Damien Lespiau wrote:
> > On Mon, Dec 09, 2013 at 11:29:35PM -0800, Kenneth Graunke wrote:
> >> We don't want depth/stencil fast clears or HiZ resolves; we want normal
> >> drawing. Without this, the pixel pipeline doesn't work.
> >>
> >> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> >> Cc: Ben Widawsky <ben@bwidawsk.net>
> >> Cc: Damien Lespiau <damien.lespiau@intel.com>
> >
> > Both patches reviewed and pushed, thanks a lot for doing this. Does it
> > mean rendercopy run for you now? (I don't have silicon to test myself).
> >
> > I've also taught my command parser to warn harder about instruction
> > lengths, it was missing the cases you fixed.
>
> It still hangs for me. I also tried Haihao's patch, though I guess I
> didn't try both together...
Now gem_render_copy works fine for me without my workaround.
Thanks
Haihao
>
> --Ken
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
prev parent reply other threads:[~2013-12-11 1:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-12-10 7:29 [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP Kenneth Graunke
2013-12-10 7:29 ` [PATCH 2/2] rendercopy/bdw: Fix length of a bunch of zeroed out packets Kenneth Graunke
2013-12-10 11:40 ` [PATCH 1/2] rendercopy/bdw: Emit 3DSTATE_WM_HZ_OP Damien Lespiau
2013-12-10 17:04 ` Kenneth Graunke
2013-12-11 1:44 ` Xiang, Haihao [this message]
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