* [RFCv3 01/14] SQUASH! drm/i915: Do not dereference pointers from ring buffer in evict event
2014-03-19 0:22 [RFCv3 00/14] Unified plane support Matt Roper
@ 2014-03-19 0:22 ` Matt Roper
2014-03-19 0:22 ` [RFCv3 05/14] drm/i915: Restrict plane loops to only operate on overlay planes Matt Roper
` (5 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Matt Roper @ 2014-03-19 0:22 UTC (permalink / raw)
To: dri-devel; +Cc: intel-gfx
Build fix for drm-intel-nightly: there is no 'dev' variable for
TP_fast_assign(); should be vm->dev.
Cc: intel-gfx@lists.freedesktop.org
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/i915_trace.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index 93342a4..23c26f1 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -243,7 +243,7 @@ TRACE_EVENT(i915_gem_evict_vm,
),
TP_fast_assign(
- __entry->dev = dev->primary->index;
+ __entry->dev = vm->dev->primary->index;
__entry->vm = vm;
),
--
1.8.5.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [RFCv3 05/14] drm/i915: Restrict plane loops to only operate on overlay planes
2014-03-19 0:22 [RFCv3 00/14] Unified plane support Matt Roper
2014-03-19 0:22 ` [RFCv3 01/14] SQUASH! drm/i915: Do not dereference pointers from ring buffer in evict event Matt Roper
@ 2014-03-19 0:22 ` Matt Roper
2014-03-19 0:22 ` [RFCv3 10/14] drm/i915: Rename similar plane functions to avoid confusion Matt Roper
` (4 subsequent siblings)
6 siblings, 0 replies; 12+ messages in thread
From: Matt Roper @ 2014-03-19 0:22 UTC (permalink / raw)
To: dri-devel; +Cc: Intel Graphics Development
Before we add additional types of planes to the DRM plane list, ensure
that existing loops over all planes continue to operate only on
"overlay" planes and ignore primary & cursor planes.
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 6 ++++++
drivers/gpu/drm/i915/intel_pm.c | 3 +++
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c6743f0..048052a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3535,6 +3535,9 @@ static void intel_enable_planes(struct drm_crtc *crtc)
struct intel_plane *intel_plane;
list_for_each_entry(intel_plane, &dev->mode_config.plane_list, base.head)
+ if (intel_plane->base.type != DRM_PLANE_TYPE_OVERLAY)
+ continue;
+
if (intel_plane->pipe == pipe)
intel_plane_restore(&intel_plane->base);
}
@@ -3546,6 +3549,9 @@ static void intel_disable_planes(struct drm_crtc *crtc)
struct intel_plane *intel_plane;
list_for_each_entry(intel_plane, &dev->mode_config.plane_list, base.head)
+ if (intel_plane->base.type != DRM_PLANE_TYPE_OVERLAY)
+ continue;
+
if (intel_plane->pipe == pipe)
intel_plane_disable(&intel_plane->base);
}
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1d0f346..3a1b569 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2132,6 +2132,9 @@ static void ilk_compute_wm_parameters(struct drm_crtc *crtc,
list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
struct intel_plane *intel_plane = to_intel_plane(plane);
+ if (plane->type != DRM_PLANE_TYPE_OVERLAY)
+ continue;
+
if (intel_plane->pipe == pipe)
p->spr = intel_plane->wm;
--
1.8.5.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [RFCv3 10/14] drm/i915: Rename similar plane functions to avoid confusion
2014-03-19 0:22 [RFCv3 00/14] Unified plane support Matt Roper
2014-03-19 0:22 ` [RFCv3 01/14] SQUASH! drm/i915: Do not dereference pointers from ring buffer in evict event Matt Roper
2014-03-19 0:22 ` [RFCv3 05/14] drm/i915: Restrict plane loops to only operate on overlay planes Matt Roper
@ 2014-03-19 0:22 ` Matt Roper
2014-03-19 12:05 ` Daniel Vetter
2014-03-19 0:22 ` [RFCv3 11/14] drm/i915: Intel-specific primary plane handling Matt Roper
` (3 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Matt Roper @ 2014-03-19 0:22 UTC (permalink / raw)
To: dri-devel; +Cc: Intel Graphics Development
The name 'update_plane' was used both for the primary plane functions in
intel_display.c and the sprite/overlay functions in intel_sprite.c.
Rename the primary plane functions to 'update_primary_plane' to avoid
confusion.
On a similar note, intel_display.c already had a function called
intel_disable_primary_plane() that programs the hardware to disable a
pipe's primary plane. When we hook up primary planes through the DRM
plane interface, one of the natural handler names will be
intel_primary_plane_disable(), which is very similar. To avoid
confusion, rename the existing intel_disable_primary_plane() to
intel_disable_primary_hw_plane() to make the two names a little more
distinct.
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 5 +--
drivers/gpu/drm/i915/intel_display.c | 60 ++++++++++++++++++++----------------
2 files changed, 36 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 70fbe90..a937711 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -462,8 +462,9 @@ struct drm_i915_display_funcs {
struct drm_framebuffer *fb,
struct drm_i915_gem_object *obj,
uint32_t flags);
- int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb,
- int x, int y);
+ int (*update_primary_plane)(struct drm_crtc *crtc,
+ struct drm_framebuffer *fb,
+ int x, int y);
void (*hpd_irq_setup)(struct drm_device *dev);
/* clock updates for mode set */
/* cursor updates */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c2f3730..849a241 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1872,15 +1872,15 @@ void intel_flush_primary_plane(struct drm_i915_private *dev_priv,
}
/**
- * intel_enable_primary_plane - enable the primary plane on a given pipe
+ * intel_enable_primary_hw_plane - enable the primary plane on a given pipe
* @dev_priv: i915 private structure
* @plane: plane to enable
* @pipe: pipe being fed
*
* Enable @plane on @pipe, making sure that @pipe is running first.
*/
-static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,
- enum plane plane, enum pipe pipe)
+static void intel_enable_primary_hw_plane(struct drm_i915_private *dev_priv,
+ enum plane plane, enum pipe pipe)
{
struct intel_crtc *intel_crtc =
to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
@@ -1905,15 +1905,15 @@ static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,
}
/**
- * intel_disable_primary_plane - disable the primary plane
+ * intel_disable_primary_hw_plane - disable the primary hardware plane
* @dev_priv: i915 private structure
* @plane: plane to disable
* @pipe: pipe consuming the data
*
* Disable @plane; should be an independent operation.
*/
-static void intel_disable_primary_plane(struct drm_i915_private *dev_priv,
- enum plane plane, enum pipe pipe)
+static void intel_disable_primary_hw_plane(struct drm_i915_private *dev_priv,
+ enum plane plane, enum pipe pipe)
{
struct intel_crtc *intel_crtc =
to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
@@ -2153,8 +2153,9 @@ static void intel_find_plane_obj(struct intel_crtc *intel_crtc,
}
}
-static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
- int x, int y)
+static int i9xx_update_primary_plane(struct drm_crtc *crtc,
+ struct drm_framebuffer *fb,
+ int x, int y)
{
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -2253,8 +2254,9 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
return 0;
}
-static int ironlake_update_plane(struct drm_crtc *crtc,
- struct drm_framebuffer *fb, int x, int y)
+static int ironlake_update_primary_plane(struct drm_crtc *crtc,
+ struct drm_framebuffer *fb,
+ int x, int y)
{
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -2358,7 +2360,7 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb,
dev_priv->display.disable_fbc(dev);
intel_increase_pllclock(crtc);
- return dev_priv->display.update_plane(crtc, fb, x, y);
+ return dev_priv->display.update_primary_plane(crtc, fb, x, y);
}
void intel_display_handle_reset(struct drm_device *dev)
@@ -2398,10 +2400,10 @@ void intel_display_handle_reset(struct drm_device *dev)
* a NULL crtc->primary->fb.
*/
if (intel_crtc->active && crtc->primary->fb)
- dev_priv->display.update_plane(crtc,
- crtc->primary->fb,
- crtc->x,
- crtc->y);
+ dev_priv->display.update_primary_plane(crtc,
+ crtc->primary->fb,
+ crtc->x,
+ crtc->y);
mutex_unlock(&crtc->mutex);
}
}
@@ -2517,7 +2519,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
intel_crtc->config.pipe_src_h = adjusted_mode->crtc_vdisplay;
}
- ret = dev_priv->display.update_plane(crtc, fb, x, y);
+ ret = dev_priv->display.update_primary_plane(crtc, fb, x, y);
if (ret) {
mutex_lock(&dev->struct_mutex);
intel_unpin_fb_obj(to_intel_framebuffer(fb)->obj);
@@ -3704,7 +3706,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
intel_update_watermarks(crtc);
intel_enable_pipe(intel_crtc);
- intel_enable_primary_plane(dev_priv, plane, pipe);
+ intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
intel_crtc_update_cursor(crtc, true);
@@ -3748,7 +3750,7 @@ static void haswell_crtc_enable_planes(struct drm_crtc *crtc)
int pipe = intel_crtc->pipe;
int plane = intel_crtc->plane;
- intel_enable_primary_plane(dev_priv, plane, pipe);
+ intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
intel_crtc_update_cursor(crtc, true);
@@ -3780,7 +3782,7 @@ static void haswell_crtc_disable_planes(struct drm_crtc *crtc)
intel_crtc_update_cursor(crtc, false);
intel_disable_planes(crtc);
- intel_disable_primary_plane(dev_priv, plane, pipe);
+ intel_disable_primary_hw_plane(dev_priv, plane, pipe);
}
/*
@@ -3908,7 +3910,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
intel_crtc_update_cursor(crtc, false);
intel_disable_planes(crtc);
- intel_disable_primary_plane(dev_priv, plane, pipe);
+ intel_disable_primary_hw_plane(dev_priv, plane, pipe);
if (intel_crtc->config.has_pch_encoder)
intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
@@ -4391,7 +4393,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
intel_update_watermarks(crtc);
intel_enable_pipe(intel_crtc);
intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
- intel_enable_primary_plane(dev_priv, plane, pipe);
+ intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
intel_crtc_update_cursor(crtc, true);
@@ -4432,7 +4434,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
intel_update_watermarks(crtc);
intel_enable_pipe(intel_crtc);
intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
- intel_enable_primary_plane(dev_priv, plane, pipe);
+ intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
/* The fixup needs to happen before cursor is enabled */
if (IS_G4X(dev))
@@ -4490,7 +4492,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
intel_crtc_dpms_overlay(intel_crtc, false);
intel_crtc_update_cursor(crtc, false);
intel_disable_planes(crtc);
- intel_disable_primary_plane(dev_priv, plane, pipe);
+ intel_disable_primary_hw_plane(dev_priv, plane, pipe);
intel_set_cpu_fifo_underrun_reporting(dev, pipe, false);
intel_disable_pipe(dev_priv, pipe);
@@ -11034,7 +11036,8 @@ static void intel_init_display(struct drm_device *dev)
dev_priv->display.crtc_enable = haswell_crtc_enable;
dev_priv->display.crtc_disable = haswell_crtc_disable;
dev_priv->display.off = haswell_crtc_off;
- dev_priv->display.update_plane = ironlake_update_plane;
+ dev_priv->display.update_primary_plane =
+ ironlake_update_primary_plane;
} else if (HAS_PCH_SPLIT(dev)) {
dev_priv->display.get_pipe_config = ironlake_get_pipe_config;
dev_priv->display.get_plane_config = ironlake_get_plane_config;
@@ -11042,7 +11045,8 @@ static void intel_init_display(struct drm_device *dev)
dev_priv->display.crtc_enable = ironlake_crtc_enable;
dev_priv->display.crtc_disable = ironlake_crtc_disable;
dev_priv->display.off = ironlake_crtc_off;
- dev_priv->display.update_plane = ironlake_update_plane;
+ dev_priv->display.update_primary_plane =
+ ironlake_update_primary_plane;
} else if (IS_VALLEYVIEW(dev)) {
dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
dev_priv->display.get_plane_config = i9xx_get_plane_config;
@@ -11050,7 +11054,8 @@ static void intel_init_display(struct drm_device *dev)
dev_priv->display.crtc_enable = valleyview_crtc_enable;
dev_priv->display.crtc_disable = i9xx_crtc_disable;
dev_priv->display.off = i9xx_crtc_off;
- dev_priv->display.update_plane = i9xx_update_plane;
+ dev_priv->display.update_primary_plane =
+ i9xx_update_primary_plane;
} else {
dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
dev_priv->display.get_plane_config = i9xx_get_plane_config;
@@ -11058,7 +11063,8 @@ static void intel_init_display(struct drm_device *dev)
dev_priv->display.crtc_enable = i9xx_crtc_enable;
dev_priv->display.crtc_disable = i9xx_crtc_disable;
dev_priv->display.off = i9xx_crtc_off;
- dev_priv->display.update_plane = i9xx_update_plane;
+ dev_priv->display.update_primary_plane =
+ i9xx_update_primary_plane;
}
/* Returns the core display clock speed */
--
1.8.5.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [RFCv3 10/14] drm/i915: Rename similar plane functions to avoid confusion
2014-03-19 0:22 ` [RFCv3 10/14] drm/i915: Rename similar plane functions to avoid confusion Matt Roper
@ 2014-03-19 12:05 ` Daniel Vetter
0 siblings, 0 replies; 12+ messages in thread
From: Daniel Vetter @ 2014-03-19 12:05 UTC (permalink / raw)
To: Matt Roper; +Cc: Intel Graphics Development, dri-devel
On Tue, Mar 18, 2014 at 05:22:55PM -0700, Matt Roper wrote:
> The name 'update_plane' was used both for the primary plane functions in
> intel_display.c and the sprite/overlay functions in intel_sprite.c.
> Rename the primary plane functions to 'update_primary_plane' to avoid
> confusion.
>
> On a similar note, intel_display.c already had a function called
> intel_disable_primary_plane() that programs the hardware to disable a
> pipe's primary plane. When we hook up primary planes through the DRM
> plane interface, one of the natural handler names will be
> intel_primary_plane_disable(), which is very similar. To avoid
> confusion, rename the existing intel_disable_primary_plane() to
> intel_disable_primary_hw_plane() to make the two names a little more
> distinct.
>
> Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Hah, here's the reason why doing a crtc->fb -> crtc->primary->fb flagday
isn't good ;-) Wanted to pull this in since I like it, and it conflicted.
Fixed up and merged to dinq, thanks.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_drv.h | 5 +--
> drivers/gpu/drm/i915/intel_display.c | 60 ++++++++++++++++++++----------------
> 2 files changed, 36 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 70fbe90..a937711 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -462,8 +462,9 @@ struct drm_i915_display_funcs {
> struct drm_framebuffer *fb,
> struct drm_i915_gem_object *obj,
> uint32_t flags);
> - int (*update_plane)(struct drm_crtc *crtc, struct drm_framebuffer *fb,
> - int x, int y);
> + int (*update_primary_plane)(struct drm_crtc *crtc,
> + struct drm_framebuffer *fb,
> + int x, int y);
> void (*hpd_irq_setup)(struct drm_device *dev);
> /* clock updates for mode set */
> /* cursor updates */
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c2f3730..849a241 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1872,15 +1872,15 @@ void intel_flush_primary_plane(struct drm_i915_private *dev_priv,
> }
>
> /**
> - * intel_enable_primary_plane - enable the primary plane on a given pipe
> + * intel_enable_primary_hw_plane - enable the primary plane on a given pipe
> * @dev_priv: i915 private structure
> * @plane: plane to enable
> * @pipe: pipe being fed
> *
> * Enable @plane on @pipe, making sure that @pipe is running first.
> */
> -static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,
> - enum plane plane, enum pipe pipe)
> +static void intel_enable_primary_hw_plane(struct drm_i915_private *dev_priv,
> + enum plane plane, enum pipe pipe)
> {
> struct intel_crtc *intel_crtc =
> to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
> @@ -1905,15 +1905,15 @@ static void intel_enable_primary_plane(struct drm_i915_private *dev_priv,
> }
>
> /**
> - * intel_disable_primary_plane - disable the primary plane
> + * intel_disable_primary_hw_plane - disable the primary hardware plane
> * @dev_priv: i915 private structure
> * @plane: plane to disable
> * @pipe: pipe consuming the data
> *
> * Disable @plane; should be an independent operation.
> */
> -static void intel_disable_primary_plane(struct drm_i915_private *dev_priv,
> - enum plane plane, enum pipe pipe)
> +static void intel_disable_primary_hw_plane(struct drm_i915_private *dev_priv,
> + enum plane plane, enum pipe pipe)
> {
> struct intel_crtc *intel_crtc =
> to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]);
> @@ -2153,8 +2153,9 @@ static void intel_find_plane_obj(struct intel_crtc *intel_crtc,
> }
> }
>
> -static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
> - int x, int y)
> +static int i9xx_update_primary_plane(struct drm_crtc *crtc,
> + struct drm_framebuffer *fb,
> + int x, int y)
> {
> struct drm_device *dev = crtc->dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -2253,8 +2254,9 @@ static int i9xx_update_plane(struct drm_crtc *crtc, struct drm_framebuffer *fb,
> return 0;
> }
>
> -static int ironlake_update_plane(struct drm_crtc *crtc,
> - struct drm_framebuffer *fb, int x, int y)
> +static int ironlake_update_primary_plane(struct drm_crtc *crtc,
> + struct drm_framebuffer *fb,
> + int x, int y)
> {
> struct drm_device *dev = crtc->dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -2358,7 +2360,7 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb,
> dev_priv->display.disable_fbc(dev);
> intel_increase_pllclock(crtc);
>
> - return dev_priv->display.update_plane(crtc, fb, x, y);
> + return dev_priv->display.update_primary_plane(crtc, fb, x, y);
> }
>
> void intel_display_handle_reset(struct drm_device *dev)
> @@ -2398,10 +2400,10 @@ void intel_display_handle_reset(struct drm_device *dev)
> * a NULL crtc->primary->fb.
> */
> if (intel_crtc->active && crtc->primary->fb)
> - dev_priv->display.update_plane(crtc,
> - crtc->primary->fb,
> - crtc->x,
> - crtc->y);
> + dev_priv->display.update_primary_plane(crtc,
> + crtc->primary->fb,
> + crtc->x,
> + crtc->y);
> mutex_unlock(&crtc->mutex);
> }
> }
> @@ -2517,7 +2519,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
> intel_crtc->config.pipe_src_h = adjusted_mode->crtc_vdisplay;
> }
>
> - ret = dev_priv->display.update_plane(crtc, fb, x, y);
> + ret = dev_priv->display.update_primary_plane(crtc, fb, x, y);
> if (ret) {
> mutex_lock(&dev->struct_mutex);
> intel_unpin_fb_obj(to_intel_framebuffer(fb)->obj);
> @@ -3704,7 +3706,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
>
> intel_update_watermarks(crtc);
> intel_enable_pipe(intel_crtc);
> - intel_enable_primary_plane(dev_priv, plane, pipe);
> + intel_enable_primary_hw_plane(dev_priv, plane, pipe);
> intel_enable_planes(crtc);
> intel_crtc_update_cursor(crtc, true);
>
> @@ -3748,7 +3750,7 @@ static void haswell_crtc_enable_planes(struct drm_crtc *crtc)
> int pipe = intel_crtc->pipe;
> int plane = intel_crtc->plane;
>
> - intel_enable_primary_plane(dev_priv, plane, pipe);
> + intel_enable_primary_hw_plane(dev_priv, plane, pipe);
> intel_enable_planes(crtc);
> intel_crtc_update_cursor(crtc, true);
>
> @@ -3780,7 +3782,7 @@ static void haswell_crtc_disable_planes(struct drm_crtc *crtc)
>
> intel_crtc_update_cursor(crtc, false);
> intel_disable_planes(crtc);
> - intel_disable_primary_plane(dev_priv, plane, pipe);
> + intel_disable_primary_hw_plane(dev_priv, plane, pipe);
> }
>
> /*
> @@ -3908,7 +3910,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
>
> intel_crtc_update_cursor(crtc, false);
> intel_disable_planes(crtc);
> - intel_disable_primary_plane(dev_priv, plane, pipe);
> + intel_disable_primary_hw_plane(dev_priv, plane, pipe);
>
> if (intel_crtc->config.has_pch_encoder)
> intel_set_pch_fifo_underrun_reporting(dev, pipe, false);
> @@ -4391,7 +4393,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
> intel_update_watermarks(crtc);
> intel_enable_pipe(intel_crtc);
> intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
> - intel_enable_primary_plane(dev_priv, plane, pipe);
> + intel_enable_primary_hw_plane(dev_priv, plane, pipe);
> intel_enable_planes(crtc);
> intel_crtc_update_cursor(crtc, true);
>
> @@ -4432,7 +4434,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
> intel_update_watermarks(crtc);
> intel_enable_pipe(intel_crtc);
> intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
> - intel_enable_primary_plane(dev_priv, plane, pipe);
> + intel_enable_primary_hw_plane(dev_priv, plane, pipe);
> intel_enable_planes(crtc);
> /* The fixup needs to happen before cursor is enabled */
> if (IS_G4X(dev))
> @@ -4490,7 +4492,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
> intel_crtc_dpms_overlay(intel_crtc, false);
> intel_crtc_update_cursor(crtc, false);
> intel_disable_planes(crtc);
> - intel_disable_primary_plane(dev_priv, plane, pipe);
> + intel_disable_primary_hw_plane(dev_priv, plane, pipe);
>
> intel_set_cpu_fifo_underrun_reporting(dev, pipe, false);
> intel_disable_pipe(dev_priv, pipe);
> @@ -11034,7 +11036,8 @@ static void intel_init_display(struct drm_device *dev)
> dev_priv->display.crtc_enable = haswell_crtc_enable;
> dev_priv->display.crtc_disable = haswell_crtc_disable;
> dev_priv->display.off = haswell_crtc_off;
> - dev_priv->display.update_plane = ironlake_update_plane;
> + dev_priv->display.update_primary_plane =
> + ironlake_update_primary_plane;
> } else if (HAS_PCH_SPLIT(dev)) {
> dev_priv->display.get_pipe_config = ironlake_get_pipe_config;
> dev_priv->display.get_plane_config = ironlake_get_plane_config;
> @@ -11042,7 +11045,8 @@ static void intel_init_display(struct drm_device *dev)
> dev_priv->display.crtc_enable = ironlake_crtc_enable;
> dev_priv->display.crtc_disable = ironlake_crtc_disable;
> dev_priv->display.off = ironlake_crtc_off;
> - dev_priv->display.update_plane = ironlake_update_plane;
> + dev_priv->display.update_primary_plane =
> + ironlake_update_primary_plane;
> } else if (IS_VALLEYVIEW(dev)) {
> dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
> dev_priv->display.get_plane_config = i9xx_get_plane_config;
> @@ -11050,7 +11054,8 @@ static void intel_init_display(struct drm_device *dev)
> dev_priv->display.crtc_enable = valleyview_crtc_enable;
> dev_priv->display.crtc_disable = i9xx_crtc_disable;
> dev_priv->display.off = i9xx_crtc_off;
> - dev_priv->display.update_plane = i9xx_update_plane;
> + dev_priv->display.update_primary_plane =
> + i9xx_update_primary_plane;
> } else {
> dev_priv->display.get_pipe_config = i9xx_get_pipe_config;
> dev_priv->display.get_plane_config = i9xx_get_plane_config;
> @@ -11058,7 +11063,8 @@ static void intel_init_display(struct drm_device *dev)
> dev_priv->display.crtc_enable = i9xx_crtc_enable;
> dev_priv->display.crtc_disable = i9xx_crtc_disable;
> dev_priv->display.off = i9xx_crtc_off;
> - dev_priv->display.update_plane = i9xx_update_plane;
> + dev_priv->display.update_primary_plane =
> + i9xx_update_primary_plane;
> }
>
> /* Returns the core display clock speed */
> --
> 1.8.5.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 12+ messages in thread
* [RFCv3 11/14] drm/i915: Intel-specific primary plane handling
2014-03-19 0:22 [RFCv3 00/14] Unified plane support Matt Roper
` (2 preceding siblings ...)
2014-03-19 0:22 ` [RFCv3 10/14] drm/i915: Rename similar plane functions to avoid confusion Matt Roper
@ 2014-03-19 0:22 ` Matt Roper
2014-03-19 12:11 ` [Intel-gfx] " Daniel Vetter
2014-03-19 0:22 ` [RFCv3 13/14] drm/i915: Split cursor update code from cursor ioctl handling Matt Roper
` (2 subsequent siblings)
6 siblings, 1 reply; 12+ messages in thread
From: Matt Roper @ 2014-03-19 0:22 UTC (permalink / raw)
To: dri-devel; +Cc: Intel Graphics Development
Intel hardware allows the primary plane to be disabled independently of
the CRTC. Provide custom primary plane handling to allow this.
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 132 ++++++++++++++++++++++++++++++++++-
drivers/gpu/drm/i915/intel_drv.h | 1 +
2 files changed, 130 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 849a241..7d6878b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -39,6 +39,7 @@
#include "i915_trace.h"
#include <drm/drm_dp_helper.h>
#include <drm/drm_crtc_helper.h>
+#include <drm/drm_rect.h>
#include <linux/dma_remapping.h>
static void intel_increase_pllclock(struct drm_crtc *crtc);
@@ -10589,19 +10590,144 @@ static void intel_shared_dpll_init(struct drm_device *dev)
BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS);
}
+static int
+intel_primary_plane_setplane(struct drm_plane *plane, struct drm_crtc *crtc,
+ struct drm_framebuffer *fb, int crtc_x, int crtc_y,
+ unsigned int crtc_w, unsigned int crtc_h,
+ uint32_t src_x, uint32_t src_y,
+ uint32_t src_w, uint32_t src_h)
+{
+ struct drm_device *dev = crtc->dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ struct drm_framebuffer *tmpfb;
+ struct drm_rect dest = {
+ .x1 = crtc_x,
+ .y1 = crtc_y,
+ .x2 = crtc_x + crtc_w,
+ .y2 = crtc_y + crtc_h,
+ };
+ struct drm_rect clip = {
+ .x2 = crtc->mode.hdisplay,
+ .y2 = crtc->mode.vdisplay,
+ };
+ int ret;
+
+ /* setplane API takes shifted source rectangle values; unshift them */
+ src_x >>= 16;
+ src_y >>= 16;
+ src_w >>= 16;
+ src_h >>= 16;
+
+ /*
+ * Current hardware can't reposition the primary plane or scale it
+ * (although this could change in the future).
+ */
+ drm_rect_intersect(&dest, &clip);
+ if (dest.x1 != 0 || dest.y1 != 0 ||
+ dest.x2 != crtc->mode.hdisplay || dest.y2 != crtc->mode.vdisplay) {
+ DRM_DEBUG_KMS("Primary plane must cover entire CRTC\n");
+ return -EINVAL;
+ }
+
+ if (crtc_w != src_w || crtc_h != src_h) {
+ DRM_DEBUG_KMS("Can't scale primary plane\n");
+ return -EINVAL;
+ }
+
+ /*
+ * pipe_set_base() adjusts crtc->primary->fb; however the DRM setplane
+ * code that called us expects to handle the framebuffer update and
+ * reference counting; save and restore the current fb before
+ * calling it.
+ */
+ tmpfb = plane->fb;
+ ret = intel_pipe_set_base(crtc, src_x, src_y, fb);
+ if (ret)
+ return ret;
+ plane->fb = tmpfb;
+
+ if (!intel_crtc->primary_enabled)
+ intel_enable_primary_hw_plane(dev_priv, intel_crtc->plane,
+ intel_crtc->pipe);
+
+ return 0;
+}
+
+static int
+intel_primary_plane_disable(struct drm_plane *plane)
+{
+ struct drm_device *dev = plane->dev;
+ drm_i915_private_t *dev_priv = dev->dev_private;
+ struct intel_plane *intel_plane = to_intel_plane(plane);
+ struct intel_crtc *intel_crtc;
+
+ if (!plane->fb)
+ return 0;
+
+ if (WARN_ON(!plane->crtc))
+ return -EINVAL;
+
+ intel_crtc = to_intel_crtc(plane->crtc);
+ if (intel_crtc->primary_enabled)
+ intel_disable_primary_hw_plane(dev_priv, intel_plane->plane,
+ intel_plane->pipe);
+
+ return 0;
+}
+
+static void intel_primary_plane_destroy(struct drm_plane *plane)
+{
+ struct intel_plane *intel_plane = to_intel_plane(plane);
+ intel_primary_plane_disable(plane);
+ drm_plane_cleanup(plane);
+ kfree(intel_plane);
+}
+
+static const struct drm_plane_funcs intel_primary_plane_funcs = {
+ .update_plane = intel_primary_plane_setplane,
+ .disable_plane = intel_primary_plane_disable,
+ .destroy = intel_primary_plane_destroy,
+};
+
+static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
+ int pipe)
+{
+ struct intel_plane *primary;
+
+ primary = kzalloc(sizeof(*primary), GFP_KERNEL);
+ if (primary == NULL)
+ return NULL;
+
+ primary->can_scale = false;
+ primary->pipe = pipe;
+ primary->plane = pipe;
+
+ drm_plane_init(dev, &primary->base, 0,
+ &intel_primary_plane_funcs, legacy_modeset_formats,
+ ARRAY_SIZE(legacy_modeset_formats),
+ DRM_PLANE_TYPE_PRIMARY);
+ return &primary->base;
+}
+
static void intel_crtc_init(struct drm_device *dev, int pipe)
{
drm_i915_private_t *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc;
struct drm_plane *primary;
- int i;
+ int i, ret;
intel_crtc = kzalloc(sizeof(*intel_crtc), GFP_KERNEL);
if (intel_crtc == NULL)
return;
- primary = drm_primary_helper_create_plane(dev);
- drm_crtc_init(dev, &intel_crtc->base, primary, &intel_crtc_funcs);
+ primary = intel_primary_plane_create(dev, pipe);
+ ret = drm_crtc_init(dev, &intel_crtc->base, primary, &intel_crtc_funcs);
+ if (ret) {
+ drm_crtc_cleanup(&intel_crtc->base);
+ kfree(intel_crtc);
+ return;
+ }
drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256);
for (i = 0; i < 256; i++) {
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 890c5cd..770f80d 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -351,6 +351,7 @@ struct intel_crtc {
bool active;
unsigned long enabled_power_domains;
bool eld_vld;
+ struct intel_plane *primary_plane;
bool primary_enabled; /* is the primary plane (partially) visible? */
bool lowfreq_avail;
struct intel_overlay *overlay;
--
1.8.5.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [Intel-gfx] [RFCv3 11/14] drm/i915: Intel-specific primary plane handling
2014-03-19 0:22 ` [RFCv3 11/14] drm/i915: Intel-specific primary plane handling Matt Roper
@ 2014-03-19 12:11 ` Daniel Vetter
2014-03-19 14:37 ` Daniel Vetter
0 siblings, 1 reply; 12+ messages in thread
From: Daniel Vetter @ 2014-03-19 12:11 UTC (permalink / raw)
To: Matt Roper; +Cc: Intel Graphics Development, dri-devel
On Tue, Mar 18, 2014 at 05:22:56PM -0700, Matt Roper wrote:
> Intel hardware allows the primary plane to be disabled independently of
> the CRTC. Provide custom primary plane handling to allow this.
>
> Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Overall this is imo a new feature since it exposes primary plane disabling
to userspace. Which means I want a crc based igt for this. Two interesting
cases imo:
1) Partially visible primary plane behind an overlay plane. Disabling it
should change those areas from the primary plane to grey or something, so
easy to check with CRCs.
2) Primary plane + cursor, disable primary plane. Then check that the
cursor is still working. Same for overlay sprites.
At least on all currently supported platforms we don't have unified planes
in the hardware, so imo it's worth to check that this works properly.
> ---
> drivers/gpu/drm/i915/intel_display.c | 132 ++++++++++++++++++++++++++++++++++-
> drivers/gpu/drm/i915/intel_drv.h | 1 +
> 2 files changed, 130 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 849a241..7d6878b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -39,6 +39,7 @@
> #include "i915_trace.h"
> #include <drm/drm_dp_helper.h>
> #include <drm/drm_crtc_helper.h>
> +#include <drm/drm_rect.h>
> #include <linux/dma_remapping.h>
>
> static void intel_increase_pllclock(struct drm_crtc *crtc);
> @@ -10589,19 +10590,144 @@ static void intel_shared_dpll_init(struct drm_device *dev)
> BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS);
> }
>
> +static int
> +intel_primary_plane_setplane(struct drm_plane *plane, struct drm_crtc *crtc,
> + struct drm_framebuffer *fb, int crtc_x, int crtc_y,
> + unsigned int crtc_w, unsigned int crtc_h,
> + uint32_t src_x, uint32_t src_y,
> + uint32_t src_w, uint32_t src_h)
> +{
> + struct drm_device *dev = crtc->dev;
> + struct drm_i915_private *dev_priv = dev->dev_private;
> + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> + struct drm_framebuffer *tmpfb;
> + struct drm_rect dest = {
> + .x1 = crtc_x,
> + .y1 = crtc_y,
> + .x2 = crtc_x + crtc_w,
> + .y2 = crtc_y + crtc_h,
> + };
> + struct drm_rect clip = {
> + .x2 = crtc->mode.hdisplay,
> + .y2 = crtc->mode.vdisplay,
> + };
> + int ret;
> +
> + /* setplane API takes shifted source rectangle values; unshift them */
> + src_x >>= 16;
> + src_y >>= 16;
> + src_w >>= 16;
> + src_h >>= 16;
Similar comments as with the generic helper: We need to check the scaling
constraints here better. Looks like a good opportunity to extract the
logic into some drm_rect helpers maybe?
> +
> + /*
> + * Current hardware can't reposition the primary plane or scale it
> + * (although this could change in the future).
> + */
> + drm_rect_intersect(&dest, &clip);
> + if (dest.x1 != 0 || dest.y1 != 0 ||
> + dest.x2 != crtc->mode.hdisplay || dest.y2 != crtc->mode.vdisplay) {
> + DRM_DEBUG_KMS("Primary plane must cover entire CRTC\n");
> + return -EINVAL;
> + }
> +
> + if (crtc_w != src_w || crtc_h != src_h) {
> + DRM_DEBUG_KMS("Can't scale primary plane\n");
> + return -EINVAL;
> + }
> +
> + /*
> + * pipe_set_base() adjusts crtc->primary->fb; however the DRM setplane
> + * code that called us expects to handle the framebuffer update and
> + * reference counting; save and restore the current fb before
> + * calling it.
> + */
> + tmpfb = plane->fb;
> + ret = intel_pipe_set_base(crtc, src_x, src_y, fb);
> + if (ret)
> + return ret;
> + plane->fb = tmpfb;
> +
> + if (!intel_crtc->primary_enabled)
> + intel_enable_primary_hw_plane(dev_priv, intel_crtc->plane,
> + intel_crtc->pipe);
> +
> + return 0;
> +}
> +
> +static int
> +intel_primary_plane_disable(struct drm_plane *plane)
> +{
> + struct drm_device *dev = plane->dev;
> + drm_i915_private_t *dev_priv = dev->dev_private;
> + struct intel_plane *intel_plane = to_intel_plane(plane);
> + struct intel_crtc *intel_crtc;
> +
> + if (!plane->fb)
> + return 0;
> +
> + if (WARN_ON(!plane->crtc))
> + return -EINVAL;
> +
> + intel_crtc = to_intel_crtc(plane->crtc);
> + if (intel_crtc->primary_enabled)
> + intel_disable_primary_hw_plane(dev_priv, intel_plane->plane,
> + intel_plane->pipe);
> +
> + return 0;
> +}
> +
> +static void intel_primary_plane_destroy(struct drm_plane *plane)
> +{
> + struct intel_plane *intel_plane = to_intel_plane(plane);
> + intel_primary_plane_disable(plane);
> + drm_plane_cleanup(plane);
> + kfree(intel_plane);
> +}
> +
> +static const struct drm_plane_funcs intel_primary_plane_funcs = {
> + .update_plane = intel_primary_plane_setplane,
> + .disable_plane = intel_primary_plane_disable,
> + .destroy = intel_primary_plane_destroy,
> +};
> +
> +static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
> + int pipe)
> +{
> + struct intel_plane *primary;
> +
> + primary = kzalloc(sizeof(*primary), GFP_KERNEL);
> + if (primary == NULL)
> + return NULL;
> +
> + primary->can_scale = false;
> + primary->pipe = pipe;
> + primary->plane = pipe;
> +
> + drm_plane_init(dev, &primary->base, 0,
> + &intel_primary_plane_funcs, legacy_modeset_formats,
> + ARRAY_SIZE(legacy_modeset_formats),
We need our own proper format list for primary planes - we don't support
yuv and other crazy stuff like that on them. Also since we can now expose
this, I think we should have per-platform lists. E.g. only gen2/3 support
xrgb1555 and only gen4+ support xrgb2101010. Our framebuffer creation code
has all the limits properly encoded atm.
> + DRM_PLANE_TYPE_PRIMARY);
> + return &primary->base;
> +}
> +
> static void intel_crtc_init(struct drm_device *dev, int pipe)
> {
> drm_i915_private_t *dev_priv = dev->dev_private;
> struct intel_crtc *intel_crtc;
> struct drm_plane *primary;
> - int i;
> + int i, ret;
>
> intel_crtc = kzalloc(sizeof(*intel_crtc), GFP_KERNEL);
> if (intel_crtc == NULL)
> return;
>
> - primary = drm_primary_helper_create_plane(dev);
> - drm_crtc_init(dev, &intel_crtc->base, primary, &intel_crtc_funcs);
> + primary = intel_primary_plane_create(dev, pipe);
> + ret = drm_crtc_init(dev, &intel_crtc->base, primary, &intel_crtc_funcs);
> + if (ret) {
> + drm_crtc_cleanup(&intel_crtc->base);
> + kfree(intel_crtc);
> + return;
> + }
>
> drm_mode_crtc_set_gamma_size(&intel_crtc->base, 256);
> for (i = 0; i < 256; i++) {
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 890c5cd..770f80d 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -351,6 +351,7 @@ struct intel_crtc {
> bool active;
> unsigned long enabled_power_domains;
> bool eld_vld;
> + struct intel_plane *primary_plane;
> bool primary_enabled; /* is the primary plane (partially) visible? */
> bool lowfreq_avail;
> struct intel_overlay *overlay;
> --
> 1.8.5.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [RFCv3 11/14] drm/i915: Intel-specific primary plane handling
2014-03-19 12:11 ` [Intel-gfx] " Daniel Vetter
@ 2014-03-19 14:37 ` Daniel Vetter
0 siblings, 0 replies; 12+ messages in thread
From: Daniel Vetter @ 2014-03-19 14:37 UTC (permalink / raw)
To: Matt Roper; +Cc: Intel Graphics Development, dri-devel
On Wed, Mar 19, 2014 at 01:11:26PM +0100, Daniel Vetter wrote:
> On Tue, Mar 18, 2014 at 05:22:56PM -0700, Matt Roper wrote:
> > Intel hardware allows the primary plane to be disabled independently of
> > the CRTC. Provide custom primary plane handling to allow this.
> >
> > Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
>
> Overall this is imo a new feature since it exposes primary plane disabling
> to userspace. Which means I want a crc based igt for this. Two interesting
> cases imo:
>
> 1) Partially visible primary plane behind an overlay plane. Disabling it
> should change those areas from the primary plane to grey or something, so
> easy to check with CRCs.
>
> 2) Primary plane + cursor, disable primary plane. Then check that the
> cursor is still working. Same for overlay sprites.
>
> At least on all currently supported platforms we don't have unified planes
> in the hardware, so imo it's worth to check that this works properly.
One big reason I've forgotten why I really want testcase for this is that
historically our code has fallen over in _really_ bad ways without a
primary fb. fastboot has brought a lot of these issues to light (since we
occasionally fail to wrap up the firmware's fb properly). So having a bit
of a baseline testcase so that we can easily add regression tests for
specific bugs once we inevitably run into them is good prep work, too.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 12+ messages in thread
* [RFCv3 13/14] drm/i915: Split cursor update code from cursor ioctl handling
2014-03-19 0:22 [RFCv3 00/14] Unified plane support Matt Roper
` (3 preceding siblings ...)
2014-03-19 0:22 ` [RFCv3 11/14] drm/i915: Intel-specific primary plane handling Matt Roper
@ 2014-03-19 0:22 ` Matt Roper
2014-03-19 8:03 ` Chris Wilson
2014-03-19 0:22 ` [RFCv3 14/14] drm/i915: Add cursor handlers and create cursor at crtc init Matt Roper
2014-03-19 0:37 ` [RFCv3 00/14] Unified plane support Rob Clark
6 siblings, 1 reply; 12+ messages in thread
From: Matt Roper @ 2014-03-19 0:22 UTC (permalink / raw)
To: dri-devel; +Cc: Intel Graphics Development
Legacy cursor ioctls took GEM buffer handles from userspace directly
whereas the new unified plane handling assigns drm_framebuffer's to
cursor planes. Splitting the code that actually updates the cursor
plane from the code that handles object lookup and reference counting
allows us to share common code between both interfaces.
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 197 ++++++++++++++++++++++++-----------
drivers/gpu/drm/i915/intel_drv.h | 2 -
2 files changed, 134 insertions(+), 65 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d43b31d..f661469 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -43,7 +43,8 @@
#include <linux/dma_remapping.h>
static void intel_increase_pllclock(struct drm_crtc *crtc);
-static void intel_crtc_update_cursor(struct drm_crtc *crtc, bool on);
+static void intel_crtc_update_cursor(struct drm_crtc *crtc,
+ struct drm_framebuffer *fb);
static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
struct intel_crtc_config *pipe_config);
@@ -56,6 +57,11 @@ static int intel_framebuffer_init(struct drm_device *dev,
struct intel_framebuffer *ifb,
struct drm_mode_fb_cmd2 *mode_cmd,
struct drm_i915_gem_object *obj);
+static struct drm_framebuffer *
+intel_user_framebuffer_create(struct drm_device *dev,
+ struct drm_file *filp,
+ struct drm_mode_fb_cmd2 *mode_cmd);
+static void intel_user_framebuffer_destroy(struct drm_framebuffer *fb);
typedef struct {
int min, max;
@@ -3709,7 +3715,7 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
intel_enable_pipe(intel_crtc);
intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
- intel_crtc_update_cursor(crtc, true);
+ intel_crtc_update_cursor(crtc, crtc->cursor->fb);
if (intel_crtc->config.has_pch_encoder)
ironlake_pch_enable(crtc);
@@ -3753,7 +3759,7 @@ static void haswell_crtc_enable_planes(struct drm_crtc *crtc)
intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
- intel_crtc_update_cursor(crtc, true);
+ intel_crtc_update_cursor(crtc, crtc->cursor->fb);
hsw_enable_ips(intel_crtc);
@@ -3781,7 +3787,7 @@ static void haswell_crtc_disable_planes(struct drm_crtc *crtc)
hsw_disable_ips(intel_crtc);
- intel_crtc_update_cursor(crtc, false);
+ intel_crtc_update_cursor(crtc, NULL);
intel_disable_planes(crtc);
intel_disable_primary_hw_plane(dev_priv, plane, pipe);
}
@@ -3909,7 +3915,7 @@ static void ironlake_crtc_disable(struct drm_crtc *crtc)
if (dev_priv->fbc.plane == plane)
intel_disable_fbc(dev);
- intel_crtc_update_cursor(crtc, false);
+ intel_crtc_update_cursor(crtc, NULL);
intel_disable_planes(crtc);
intel_disable_primary_hw_plane(dev_priv, plane, pipe);
@@ -4396,7 +4402,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
intel_set_cpu_fifo_underrun_reporting(dev, pipe, true);
intel_enable_primary_hw_plane(dev_priv, plane, pipe);
intel_enable_planes(crtc);
- intel_crtc_update_cursor(crtc, true);
+ intel_crtc_update_cursor(crtc, crtc->cursor->fb);
intel_update_fbc(dev);
@@ -4440,7 +4446,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc)
/* The fixup needs to happen before cursor is enabled */
if (IS_G4X(dev))
g4x_fixup_plane(dev_priv, pipe);
- intel_crtc_update_cursor(crtc, true);
+ intel_crtc_update_cursor(crtc, crtc->cursor->fb);
/* Give the overlay scaler a chance to enable if it's on this pipe */
intel_crtc_dpms_overlay(intel_crtc, true);
@@ -4491,7 +4497,7 @@ static void i9xx_crtc_disable(struct drm_crtc *crtc)
intel_disable_fbc(dev);
intel_crtc_dpms_overlay(intel_crtc, false);
- intel_crtc_update_cursor(crtc, false);
+ intel_crtc_update_cursor(crtc, NULL);
intel_disable_planes(crtc);
intel_disable_primary_hw_plane(dev_priv, plane, pipe);
@@ -7739,7 +7745,7 @@ static void ivb_update_cursor(struct drm_crtc *crtc, u32 base)
/* If no-part of the cursor is visible on the framebuffer, then the GPU may hang... */
static void intel_crtc_update_cursor(struct drm_crtc *crtc,
- bool on)
+ struct drm_framebuffer *fb)
{
struct drm_device *dev = crtc->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -7750,32 +7756,36 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
u32 base = 0, pos = 0;
bool visible;
- if (on)
- base = intel_crtc->cursor_addr;
+ if (!intel_crtc->active)
+ return;
- if (x >= intel_crtc->config.pipe_src_w)
- base = 0;
+ if (fb != NULL) {
+ base = intel_crtc->cursor_addr;
- if (y >= intel_crtc->config.pipe_src_h)
- base = 0;
+ if (x >= intel_crtc->config.pipe_src_w)
+ base = 0;
- if (x < 0) {
- if (x + intel_crtc->cursor_width <= 0)
+ if (y >= intel_crtc->config.pipe_src_h)
base = 0;
- pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
- x = -x;
- }
- pos |= x << CURSOR_X_SHIFT;
+ if (x < 0) {
+ if (x + fb->width <= 0)
+ base = 0;
- if (y < 0) {
- if (y + intel_crtc->cursor_height <= 0)
- base = 0;
+ pos |= CURSOR_POS_SIGN << CURSOR_X_SHIFT;
+ x = -x;
+ }
+ pos |= x << CURSOR_X_SHIFT;
- pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
- y = -y;
+ if (y < 0) {
+ if (y + fb->height <= 0)
+ base = 0;
+
+ pos |= CURSOR_POS_SIGN << CURSOR_Y_SHIFT;
+ y = -y;
+ }
+ pos |= y << CURSOR_Y_SHIFT;
}
- pos |= y << CURSOR_Y_SHIFT;
visible = base != 0;
if (!visible && !intel_crtc->cursor_visible)
@@ -7793,41 +7803,46 @@ static void intel_crtc_update_cursor(struct drm_crtc *crtc,
}
}
-static int intel_crtc_cursor_set(struct drm_crtc *crtc,
- struct drm_file *file,
- uint32_t handle,
- uint32_t width, uint32_t height)
+/*
+ * Common cursor-setting code shared by both the legacy cursor ioctls (which
+ * take a GEM bo handle directly from userspace) and the new unified plane
+ * interface (which takes drm_framebuffer's). By the time we get here, the
+ * desired new buffer will be in the form of a DRM framebuffer, regardless
+ * of which userspace API was used.
+ */
+static int cursor_set_common(struct drm_crtc *crtc,
+ struct drm_plane *cursor,
+ struct drm_framebuffer *fb)
{
- struct drm_device *dev = crtc->dev;
+ struct drm_device *dev = cursor->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- struct drm_i915_gem_object *obj;
- uint32_t addr;
+ struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
+ struct drm_i915_gem_object *obj = NULL;
+ struct drm_i915_gem_object *cursor_bo = NULL;
+ uint32_t addr = 0;
int ret;
- /* if we want to turn off the cursor ignore width and height */
- if (!handle) {
+ BUG_ON(cursor != crtc->cursor);
+ BUG_ON(cursor->possible_crtcs != drm_crtc_mask(crtc));
+
+ if (fb == NULL) {
DRM_DEBUG_KMS("cursor off\n");
- addr = 0;
- obj = NULL;
mutex_lock(&dev->struct_mutex);
goto finish;
}
+ obj = intel_fb->obj;
+
/* Currently we only support 64x64 cursors */
- if (width != 64 || height != 64) {
+ if (fb->width != 64 || fb->height != 64) {
DRM_ERROR("we currently only support 64x64 cursors\n");
return -EINVAL;
}
- obj = to_intel_bo(drm_gem_object_lookup(dev, file, handle));
- if (&obj->base == NULL)
- return -ENOENT;
-
- if (obj->base.size < width * height * 4) {
- DRM_DEBUG_KMS("buffer is to small\n");
- ret = -ENOMEM;
- goto fail;
+ if (obj->base.size < fb->width * fb->height * 4) {
+ DRM_DEBUG_KMS("Cursor buffer is too small\n");
+ return -ENOMEM;
}
/* we only need to pin inside GTT if cursor is non-phy */
@@ -7876,35 +7891,87 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
}
if (IS_GEN2(dev))
- I915_WRITE(CURSIZE, (height << 12) | width);
+ I915_WRITE(CURSIZE, (fb->height << 12) | fb->width);
- finish:
- if (intel_crtc->cursor_bo) {
+finish:
+ if (cursor->fb) {
+ cursor_bo = to_intel_framebuffer(cursor->fb)->obj;
if (INTEL_INFO(dev)->cursor_needs_physical) {
- if (intel_crtc->cursor_bo != obj)
- i915_gem_detach_phys_object(dev, intel_crtc->cursor_bo);
+ if (cursor_bo != obj)
+ i915_gem_detach_phys_object(dev, cursor_bo);
} else
- i915_gem_object_unpin_from_display_plane(intel_crtc->cursor_bo);
- drm_gem_object_unreference(&intel_crtc->cursor_bo->base);
+ i915_gem_object_unpin_from_display_plane(cursor_bo);
}
mutex_unlock(&dev->struct_mutex);
intel_crtc->cursor_addr = addr;
- intel_crtc->cursor_bo = obj;
- intel_crtc->cursor_width = width;
- intel_crtc->cursor_height = height;
-
- if (intel_crtc->active)
- intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL);
return 0;
+
fail_unpin:
i915_gem_object_unpin_from_display_plane(obj);
fail_locked:
mutex_unlock(&dev->struct_mutex);
-fail:
- drm_gem_object_unreference_unlocked(&obj->base);
+ return ret;
+}
+
+static int intel_crtc_cursor_set(struct drm_crtc *crtc,
+ struct drm_file *file,
+ uint32_t handle,
+ uint32_t width, uint32_t height)
+{
+ struct drm_device *dev = crtc->dev;
+ struct drm_plane *cursor = crtc->cursor;
+ struct drm_framebuffer *fb = NULL;
+ struct drm_framebuffer *old_fb = NULL;
+ struct drm_i915_gem_object *new_obj = NULL;
+ struct drm_i915_gem_object *old_obj = NULL;
+ struct drm_mode_fb_cmd2 cmd = {
+ .width = width,
+ .height = height,
+ .pixel_format = DRM_FORMAT_ARGB8888,
+ };
+ int ret = 0;
+
+ /* i915 cursor support may be disabled for debugging */
+ if (cursor == NULL)
+ return -ENXIO;
+
+ old_fb = cursor->fb;
+
+ /* Wrap the buffer handle we got in a drm framebuffer */
+ if (handle != 0) {
+ cmd.handles[0] = handle;
+ fb = intel_user_framebuffer_create(dev, file, &cmd);
+ if (IS_ERR(fb))
+ return PTR_ERR(fb);
+ }
+
+ new_obj = fb ? to_intel_framebuffer(fb)->obj : NULL;
+ old_obj = old_fb ? to_intel_framebuffer(old_fb)->obj : NULL;
+
+ /* If this buffer is already the cursor image, no work is needed */
+ if (new_obj == old_obj) {
+ DRM_DEBUG_KMS("Cursor is already set with this object\n");
+ old_fb = NULL;
+ goto done;
+ }
+
+ ret = cursor_set_common(crtc, cursor, fb);
+ if (ret != 0) {
+ old_fb = NULL;
+ } else {
+ intel_crtc_update_cursor(crtc, fb);
+ cursor->fb = fb;
+ fb = NULL;
+ }
+
+done:
+ if (fb)
+ intel_user_framebuffer_destroy(fb);
+ if (old_fb)
+ intel_user_framebuffer_destroy(old_fb);
return ret;
}
@@ -7912,11 +7979,15 @@ static int intel_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
{
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ /* i915 cursor support may be disabled for debugging */
+ if (crtc->cursor == NULL)
+ return -ENXIO;
+
intel_crtc->cursor_x = clamp_t(int, x, SHRT_MIN, SHRT_MAX);
intel_crtc->cursor_y = clamp_t(int, y, SHRT_MIN, SHRT_MAX);
if (intel_crtc->active)
- intel_crtc_update_cursor(crtc, intel_crtc->cursor_bo != NULL);
+ intel_crtc_update_cursor(crtc, crtc->cursor->fb);
return 0;
}
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 770f80d..76950bb 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -364,10 +364,8 @@ struct intel_crtc {
* handled in the hw itself (with the TILEOFF register). */
unsigned long dspaddr_offset;
- struct drm_i915_gem_object *cursor_bo;
uint32_t cursor_addr;
int16_t cursor_x, cursor_y;
- int16_t cursor_width, cursor_height;
bool cursor_visible;
struct intel_plane_config plane_config;
--
1.8.5.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [RFCv3 14/14] drm/i915: Add cursor handlers and create cursor at crtc init
2014-03-19 0:22 [RFCv3 00/14] Unified plane support Matt Roper
` (4 preceding siblings ...)
2014-03-19 0:22 ` [RFCv3 13/14] drm/i915: Split cursor update code from cursor ioctl handling Matt Roper
@ 2014-03-19 0:22 ` Matt Roper
2014-03-19 0:37 ` [RFCv3 00/14] Unified plane support Rob Clark
6 siblings, 0 replies; 12+ messages in thread
From: Matt Roper @ 2014-03-19 0:22 UTC (permalink / raw)
To: dri-devel; +Cc: Intel Graphics Development
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 90 +++++++++++++++++++++++++++++++++++-
1 file changed, 89 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f661469..36bee38 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10781,11 +10781,98 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
return &primary->base;
}
+static int
+intel_cursor_plane_update(struct drm_plane *plane, struct drm_crtc *crtc,
+ struct drm_framebuffer *fb, int crtc_x, int crtc_y,
+ unsigned int crtc_w, unsigned int crtc_h,
+ uint32_t src_x, uint32_t src_y,
+ uint32_t src_w, uint32_t src_h)
+{
+ int ret;
+
+ /* setplane API takes shifted source rectangle values; unshift them */
+ src_x >>= 16;
+ src_y >>= 16;
+ src_w >>= 16;
+ src_h >>= 16;
+
+ /* Cursor planes are locked to their owning CRTC */
+ if (plane->possible_crtcs != drm_crtc_mask(crtc)) {
+ DRM_DEBUG_KMS("Cannot change cursor plane CRTC\n");
+ return -EINVAL;
+ }
+
+ /* Current hardware can't scale the cursor plane. */
+ if (crtc_w != src_w || crtc_h != src_h) {
+ DRM_DEBUG_KMS("Can't scale cursor plane\n");
+ return -EINVAL;
+ }
+
+ ret = cursor_set_common(crtc, crtc->cursor, fb);
+ if (ret)
+ return ret;
+
+ intel_crtc_cursor_move(crtc, crtc_x, crtc_y);
+ intel_crtc_update_cursor(crtc, fb);
+
+ return 0;
+}
+
+static int
+intel_cursor_plane_disable(struct drm_plane *plane)
+{
+ if (!plane->fb)
+ return 0;
+
+ BUG_ON(!plane->crtc);
+
+ return cursor_set_common(plane->crtc, plane, NULL);
+}
+
+static void intel_cursor_plane_destroy(struct drm_plane *plane)
+{
+ struct intel_plane *intel_plane = to_intel_plane(plane);
+ intel_cursor_plane_disable(plane);
+ drm_plane_cleanup(plane);
+ kfree(intel_plane);
+}
+
+static const struct drm_plane_funcs intel_cursor_plane_funcs = {
+ .update_plane = intel_cursor_plane_update,
+ .disable_plane = intel_cursor_plane_disable,
+ .destroy = intel_cursor_plane_destroy,
+};
+
+static const uint32_t cursor_formats[] = {
+ DRM_FORMAT_ARGB8888,
+};
+
+static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,
+ int pipe)
+{
+ struct intel_plane *cursor;
+
+ cursor = kzalloc(sizeof(*cursor), GFP_KERNEL);
+ if (cursor == NULL)
+ return NULL;
+
+ cursor->can_scale = false;
+ cursor->pipe = pipe;
+ cursor->plane = pipe;
+
+ drm_plane_init(dev, &cursor->base, 0,
+ &intel_cursor_plane_funcs, cursor_formats,
+ ARRAY_SIZE(cursor_formats),
+ DRM_PLANE_TYPE_CURSOR);
+ return &cursor->base;
+}
+
static void intel_crtc_init(struct drm_device *dev, int pipe)
{
drm_i915_private_t *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc;
struct drm_plane *primary;
+ struct drm_plane *cursor;
int i, ret;
intel_crtc = kzalloc(sizeof(*intel_crtc), GFP_KERNEL);
@@ -10793,7 +10880,8 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
return;
primary = intel_primary_plane_create(dev, pipe);
- ret = drm_crtc_init(dev, &intel_crtc->base, primary, NULL,
+ cursor = intel_cursor_plane_create(dev, pipe);
+ ret = drm_crtc_init(dev, &intel_crtc->base, primary, cursor,
&intel_crtc_funcs);
if (ret) {
drm_crtc_cleanup(&intel_crtc->base);
--
1.8.5.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [RFCv3 00/14] Unified plane support
2014-03-19 0:22 [RFCv3 00/14] Unified plane support Matt Roper
` (5 preceding siblings ...)
2014-03-19 0:22 ` [RFCv3 14/14] drm/i915: Add cursor handlers and create cursor at crtc init Matt Roper
@ 2014-03-19 0:37 ` Rob Clark
6 siblings, 0 replies; 12+ messages in thread
From: Rob Clark @ 2014-03-19 0:37 UTC (permalink / raw)
To: Matt Roper; +Cc: Intel Graphics Development, dri-devel@lists.freedesktop.org
On Tue, Mar 18, 2014 at 8:22 PM, Matt Roper <matthew.d.roper@intel.com> wrote:
> Previous revision and explanation of series:
> http://lists.freedesktop.org/archives/dri-devel/2014-March/055222.html
>
> Main changes since last pass:
> * Added cursor plane support on i915. Unfortunately it isn't possible to
> create nice generic helper functions that make use of the legacy API's for
> cursor planes as was done for primary planes; the legacy cursor ioctl's take
> a driver handle directly (e.g., from GEM) rather than a DRM framebuffer.
> With the unified plane support, we receive a DRM framebuffer via the SetPlane
> API, but have no way of turning that into a driver handle that can be passed
> to the legacy interfaces.
> * Updated msm and omapdrm to use their existing "private" planes as primary
> rather than using the primary helper functions. (thanks Rob Clark!)
> * Fixed several s/crtc->fb/crtc->primary->fb/ conversions that were missed
> on the first pass (or new instances that popped up due to rebasing to
> the latest code).
>
> I believe some of the next steps are:
> * Create some new read-only plane properties that describe in more detail the
> capabilities & limitations of various planes (max/min size, scaling
> capabilities, tiling restrictions, etc.) so that generic userspace
> compositors can make intelligent decisions about how best to use the various
> planes on the plane list. If anyone has strong feelings on what these
> properties should look like, this would be a good time to start the
> discussion.
> * Update cursor support for the rest of the non-i915 drivers. I believe the
> list of drivers that currently support cursors are: armada, ast, gma500,
> mgag200, msm, nouveau, radeon, vmwgfx, and qxl.
> * Update imx-drm's CRTC creation to use its existing private primary plane
> rather than using the primary helper function to create one.
> * Provide patches for weston & xf86-video-modesetting that make use of the
> unified plane interface to make real-world testing of this patchset a
> bit easier.
not sure other's opionions, but personally I wouldn't object to doing
some of this as follow-up patchsets. Ofc my selfish motivation is
that basing atomic on top of primary plane really seems like the right
move, and so sooner we can get the initial parts of this patchset
merged, the sooner we can try to merge atomic ;-)
BR,
-R
>
> Note that the first patch here is simply a build fix for current breakage of
> the drm-intel-nightly branch of the drm-intel repo.
>
>
> Matt Roper (14):
> SQUASH! drm/i915: Do not dereference pointers from ring buffer in
> evict event
> drm: Add support for multiple plane types
> drm: Add primary plane helpers
> drm/exynos: Restrict plane loops to only operate on overlay planes
> drm/i915: Restrict plane loops to only operate on overlay planes
> drm: Add plane type property
> drm: Specify primary plane at CRTC initialization (v2)
> drm: Replace crtc fb with primary plane fb (v2)
> drm: Allow userspace to ask for full plane list (universal planes)
> drm/i915: Rename similar plane functions to avoid confusion
> drm/i915: Intel-specific primary plane handling
> drm: Specify cursor plane at CRTC initialization
> drm/i915: Split cursor update code from cursor ioctl handling
> drm/i915: Add cursor handlers and create cursor at crtc init
>
> drivers/gpu/drm/armada/armada_crtc.c | 4 +-
> drivers/gpu/drm/armada/armada_overlay.c | 3 +-
> drivers/gpu/drm/ast/ast_mode.c | 16 +-
> drivers/gpu/drm/bochs/bochs_kms.c | 8 +-
> drivers/gpu/drm/cirrus/cirrus_mode.c | 15 +-
> drivers/gpu/drm/drm_crtc.c | 441 +++++++++++++++----
> drivers/gpu/drm/drm_crtc_helper.c | 21 +-
> drivers/gpu/drm/drm_fb_helper.c | 9 +-
> drivers/gpu/drm/drm_ioctl.c | 5 +
> drivers/gpu/drm/exynos/exynos_drm_crtc.c | 4 +-
> drivers/gpu/drm/exynos/exynos_drm_encoder.c | 6 +
> drivers/gpu/drm/exynos/exynos_drm_plane.c | 4 +-
> drivers/gpu/drm/gma500/cdv_intel_display.c | 2 +-
> drivers/gpu/drm/gma500/cdv_intel_dp.c | 2 +-
> drivers/gpu/drm/gma500/cdv_intel_hdmi.c | 3 +-
> drivers/gpu/drm/gma500/cdv_intel_lvds.c | 2 +-
> drivers/gpu/drm/gma500/gma_display.c | 17 +-
> drivers/gpu/drm/gma500/mdfld_dsi_output.c | 2 +-
> drivers/gpu/drm/gma500/mdfld_intel_display.c | 17 +-
> drivers/gpu/drm/gma500/oaktrail_crtc.c | 13 +-
> drivers/gpu/drm/gma500/psb_intel_display.c | 7 +-
> drivers/gpu/drm/gma500/psb_intel_lvds.c | 2 +-
> drivers/gpu/drm/gma500/psb_intel_sdvo.c | 2 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_drv.h | 5 +-
> drivers/gpu/drm/i915/i915_irq.c | 4 +-
> drivers/gpu/drm/i915/i915_trace.h | 2 +-
> drivers/gpu/drm/i915/intel_display.c | 623 ++++++++++++++++++++-------
> drivers/gpu/drm/i915/intel_dp.c | 5 +-
> drivers/gpu/drm/i915/intel_drv.h | 3 +-
> drivers/gpu/drm/i915/intel_fbdev.c | 6 +-
> drivers/gpu/drm/i915/intel_overlay.c | 4 +-
> drivers/gpu/drm/i915/intel_pm.c | 39 +-
> drivers/gpu/drm/i915/intel_sprite.c | 2 +-
> drivers/gpu/drm/mgag200/mgag200_mode.c | 33 +-
> drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c | 33 +-
> drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c | 4 +-
> drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c | 27 +-
> drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 4 +-
> drivers/gpu/drm/nouveau/dispnv04/crtc.c | 24 +-
> drivers/gpu/drm/nouveau/dispnv04/dfp.c | 2 +-
> drivers/gpu/drm/nouveau/dispnv04/overlay.c | 4 +-
> drivers/gpu/drm/nouveau/nouveau_display.c | 8 +-
> drivers/gpu/drm/nouveau/nv50_display.c | 21 +-
> drivers/gpu/drm/omapdrm/omap_crtc.c | 2 +-
> drivers/gpu/drm/omapdrm/omap_plane.c | 4 +-
> drivers/gpu/drm/qxl/qxl_display.c | 15 +-
> drivers/gpu/drm/radeon/atombios_crtc.c | 20 +-
> drivers/gpu/drm/radeon/r100.c | 4 +-
> drivers/gpu/drm/radeon/radeon_connectors.c | 2 +-
> drivers/gpu/drm/radeon/radeon_device.c | 3 +-
> drivers/gpu/drm/radeon/radeon_display.c | 9 +-
> drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 16 +-
> drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 4 +-
> drivers/gpu/drm/rcar-du/rcar_du_plane.c | 3 +-
> drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 3 +-
> drivers/gpu/drm/shmobile/shmob_drm_plane.c | 2 +-
> drivers/gpu/drm/tegra/dc.c | 7 +-
> drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 4 +-
> drivers/gpu/drm/udl/udl_modeset.c | 6 +-
> drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | 14 +-
> drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c | 12 +-
> drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c | 12 +-
> drivers/staging/imx-drm/imx-drm-core.c | 4 +-
> drivers/staging/imx-drm/ipuv3-plane.c | 4 +-
> include/drm/drmP.h | 5 +
> include/drm/drm_crtc.h | 115 ++++-
> include/uapi/drm/drm.h | 8 +
> 68 files changed, 1252 insertions(+), 488 deletions(-)
>
> Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
> --
> 1.8.5.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
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