From: yu.dai@intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 05/18] drm/i915: Add firmware version check
Date: Thu, 26 Mar 2015 12:41:12 -0700 [thread overview]
Message-ID: <1427398885-31988-6-git-send-email-yu.dai@intel.com> (raw)
In-Reply-To: <1427398885-31988-1-git-send-email-yu.dai@intel.com>
From: Alex Dai <yu.dai@intel.com>
Set the firmware version that required by HW. Driver sets required
version according to platform. After firmware is loaded but before
send to HW, the major.minor version is read from CSS header field,
which is 17th DWORD currently. The major version must be same; the
minor version must be newer than required.
Currently the GuC fw version is 1.0.
Issue: VIZ-4884
Signed-off-by: Alex Dai <yu.dai@intel.com>
---
drivers/gpu/drm/i915/intel_guc.h | 1 +
drivers/gpu/drm/i915/intel_guc_loader.c | 41 +++++++++++++++++++++++++++++++--
drivers/gpu/drm/i915/intel_uc_loader.c | 6 ++++-
drivers/gpu/drm/i915/intel_uc_loader.h | 4 ++++
4 files changed, 49 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index d8e7c00..a06a7b3 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -50,6 +50,7 @@ struct intel_guc {
#define UOS_RSA_SCRATCH_0 0xc200
#define UOS_RSA_SIG_SIZE 0x100
+#define UOS_VERSION_OFFSET 0x11
#define DMA_ADDR_0_LOW 0xc300
#define DMA_ADDR_0_HIGH 0xc304
#define DMA_ADDR_1_LOW 0xc308
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 91af710..b9923b7 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -248,16 +248,53 @@ fail:
return err;
}
+/*
+ * Check the firmware that was found; return TRUE if acceptable.
+ *
+ * For the GuC, we just check the version number embedded at a well-known
+ * offset within the firmware blob; note that UOS_RSA_SIG_SIZE is given
+ * in *bytes*, whereas UOS_VERSION_OFFSET is in DWords!
+ */
+static bool intel_guc_ucode_check(struct intel_uc_fw *guc_fw)
+{
+ uint32_t *data = (void *)(guc_fw->uc_fw_blob->data + UOS_RSA_SIG_SIZE);
+ uint32_t version, major, minor;
+
+ version = data[UOS_VERSION_OFFSET];
+ major = version >> 16;
+ minor = version & 0xFFFF;
+
+ if (major == guc_fw->uc_fw_ver_major &&
+ minor >= guc_fw->uc_fw_ver_minor) {
+ DRM_DEBUG_DRIVER("firmware version %d.%d OK (minimum %d.%d)\n",
+ major, minor,
+ guc_fw->uc_fw_ver_major, guc_fw->uc_fw_ver_minor);
+ return true;
+ }
+
+ DRM_ERROR("GuC firmware version %d.%d, required %d.%d\n",
+ major, minor,
+ guc_fw->uc_fw_ver_major, guc_fw->uc_fw_ver_minor);
+ return false;
+}
+
void intel_guc_ucode_init(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_uc_fw *guc_fw = &dev_priv->guc.guc_fw;
const char *path = NULL;
- if (IS_GEN8(dev))
+ if (IS_GEN8(dev)) {
path = I915_GUC_UCODE_GEN8;
- else if (IS_GEN9(dev))
+ guc_fw->uc_fw_ver_major = 1;
+ guc_fw->uc_fw_ver_minor = 0;
+ guc_fw->uc_fw_check = intel_guc_ucode_check;
+ } else if (IS_GEN9(dev)) {
path = I915_GUC_UCODE_GEN9;
+ guc_fw->uc_fw_ver_major = 1;
+ guc_fw->uc_fw_ver_minor = 0;
+ guc_fw->uc_fw_check = intel_guc_ucode_check;
+ }
intel_uc_fw_init(dev, guc_fw, "GuC", path, HAS_GUC_UCODE(dev));
}
diff --git a/drivers/gpu/drm/i915/intel_uc_loader.c b/drivers/gpu/drm/i915/intel_uc_loader.c
index 249e56e..986dcf3 100644
--- a/drivers/gpu/drm/i915/intel_uc_loader.c
+++ b/drivers/gpu/drm/i915/intel_uc_loader.c
@@ -49,10 +49,12 @@ static void uc_fw_finish(struct drm_device *dev, struct intel_uc_fw *uc_fw)
uc_fw->uc_name, uc_fw->uc_fw_fetch_status, uc_fw->uc_fw_blob);
fw = uc_fw->uc_fw_blob;
- uc_fw->uc_fw_blob = NULL;
if (!fw)
goto fail;
+ if (uc_fw->uc_fw_check && !uc_fw->uc_fw_check(uc_fw))
+ goto fail;
+
obj = i915_gem_alloc_object(dev, round_up(fw->size, PAGE_SIZE));
if (!obj)
goto fail;
@@ -64,6 +66,7 @@ static void uc_fw_finish(struct drm_device *dev, struct intel_uc_fw *uc_fw)
uc_fw->uc_fw_obj = obj;
uc_fw->uc_fw_size = fw->size;
uc_fw->uc_fw_fetch_status = INTEL_UC_FIRMWARE_SUCCESS;
+ uc_fw->uc_fw_blob = NULL;
release_firmware(fw);
return;
@@ -77,6 +80,7 @@ fail:
drm_gem_object_unreference(&obj->base);
uc_fw->uc_fw_fetch_status = INTEL_UC_FIRMWARE_FAIL;
+ uc_fw->uc_fw_blob = NULL;
release_firmware(fw); /* OK even if fw is NULL */
}
diff --git a/drivers/gpu/drm/i915/intel_uc_loader.h b/drivers/gpu/drm/i915/intel_uc_loader.h
index 661d46a..31bf65c 100644
--- a/drivers/gpu/drm/i915/intel_uc_loader.h
+++ b/drivers/gpu/drm/i915/intel_uc_loader.h
@@ -68,11 +68,15 @@ struct intel_uc_fw {
struct drm_i915_gem_object * uc_fw_obj;
enum intel_uc_fw_status uc_fw_fetch_status;
enum intel_uc_fw_status uc_fw_load_status;
+ uint32_t uc_fw_ver_major;
+ uint32_t uc_fw_ver_minor;
+ bool (*uc_fw_check)(struct intel_uc_fw *);
};
void intel_uc_fw_init(struct drm_device *dev, struct intel_uc_fw *uc_fw,
const char *uc_name, const char *fw_path, bool has_ucode);
int intel_uc_fw_check(struct drm_device *dev, struct intel_uc_fw *uc_fw);
void intel_uc_fw_fini(struct drm_device *dev, struct intel_uc_fw *uc_fw);
+bool intel_uc_fw_version_check(struct intel_uc_fw *fw, const char *data);
#endif
--
1.9.1
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next prev parent reply other threads:[~2015-03-26 19:44 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-26 19:41 [PATCH 00/18] Command submission via GuC for SKL yu.dai
2015-03-26 19:41 ` [PATCH 01/18] drm/i915: Add guc firmware interface headers yu.dai
2015-03-26 19:41 ` [PATCH 02/18] drm/i915: Add i915_gem_object_write() to i915_gem.c yu.dai
2015-03-26 19:41 ` [PATCH 03/18] drm/i915: Unified firmware loading mechanism yu.dai
2015-03-26 19:41 ` [PATCH 04/18] drm/i915: GuC firmware loader yu.dai
2015-03-26 19:41 ` yu.dai [this message]
2015-03-26 19:41 ` [PATCH 06/18] drm/i915: Defer default hardware context initialisation until first open yu.dai
2015-03-27 8:45 ` Daniel Vetter
2015-03-30 19:11 ` Yu Dai
2015-03-31 13:11 ` Daniel Vetter
2015-03-31 9:29 ` Chris Wilson
2015-03-26 19:41 ` [PATCH 07/18] drm/i915: Move execlists defines from .c to .h yu.dai
2015-03-26 19:41 ` [PATCH 08/18] drm/i915: Make several execlist helper functions external yu.dai
2015-03-26 19:41 ` [PATCH 09/18] drm/i915: Add functions to allocate / release gem obj for GuC yu.dai
2015-03-27 8:48 ` Daniel Vetter
2015-03-27 8:49 ` Daniel Vetter
2015-03-26 19:41 ` [PATCH 10/18] drm/i915: Functions to support command submission via GuC yu.dai
2015-03-26 19:41 ` [PATCH 11/18] drm/i915: Integration of GuC client yu.dai
2015-03-26 19:41 ` [PATCH 12/18] drm/i915: Interrupt routing for GuC scheduler yu.dai
2015-03-26 19:41 ` [PATCH 13/18] drm/i915: Enable commands submission via GuC yu.dai
2015-03-26 19:41 ` [PATCH 14/18] drm/i915: debugfs of GuC status yu.dai
2015-03-26 19:41 ` [PATCH 15/18] drm/i915: Enable GuC firmware log yu.dai
2015-03-26 19:41 ` [PATCH 16/18] drm/i915: Ring Context allocating for GuC yu.dai
2015-03-26 19:41 ` [PATCH 17/18] drm/i915: Taking forcewake during GuC load yu.dai
2015-03-27 8:55 ` Daniel Vetter
2015-03-26 19:41 ` [PATCH 18/18] drm/i915: Notify GuC when RC6 state is changed yu.dai
2015-03-27 1:24 ` shuang.he
2015-03-27 8:54 ` Daniel Vetter
2015-03-27 8:59 ` [PATCH 00/18] Command submission via GuC for SKL Daniel Vetter
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