From: Daniel Vetter <daniel@ffwll.ch>
To: yu.dai@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 09/18] drm/i915: Add functions to allocate / release gem obj for GuC
Date: Fri, 27 Mar 2015 09:49:57 +0100 [thread overview]
Message-ID: <20150327084957.GK23521@phenom.ffwll.local> (raw)
In-Reply-To: <20150327084820.GJ23521@phenom.ffwll.local>
On Fri, Mar 27, 2015 at 09:48:20AM +0100, Daniel Vetter wrote:
> On Thu, Mar 26, 2015 at 12:41:16PM -0700, yu.dai@intel.com wrote:
> > From: Alex Dai <yu.dai@intel.com>
> >
> > All gem objects used by GuC are pinned to ggtt space out of range
> > [0, WOPCM size]. In GuC address space mapping, [0, WPOCM size] is
> > used internally for its Boot ROM, SRAM etc. Currently this WPOCM
> > size is 512K. This is done by using of PIN_OFFSET_BIAS.
> >
> > Issue: VIZ-4884
> > Signed-off-by: Alex Dai <yu.dai@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_guc.h | 3 +++
> > drivers/gpu/drm/i915/intel_guc_loader.c | 34 +++++++++++++++++++++++++++++++++
> > 2 files changed, 37 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> > index d8262cf..ae14c57 100644
> > --- a/drivers/gpu/drm/i915/intel_guc.h
> > +++ b/drivers/gpu/drm/i915/intel_guc.h
> > @@ -92,5 +92,8 @@ struct intel_guc {
> > extern int intel_guc_load_ucode(struct drm_device *dev, bool wait);
> > extern void intel_guc_ucode_fini(struct drm_device *dev);
> > extern void intel_guc_ucode_init(struct drm_device *dev);
> > +struct drm_i915_gem_object *
> > +intel_guc_allocate_gem_obj(struct drm_device *dev, u32 size);
> > +void intel_guc_release_gem_obj(struct drm_i915_gem_object *obj);
> >
> > #endif
> > diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
> > index 315e5d9..0500a53 100644
> > --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> > +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> > @@ -30,6 +30,40 @@
> > MODULE_FIRMWARE(I915_GUC_UCODE_GEN8);
> > MODULE_FIRMWARE(I915_GUC_UCODE_GEN9);
> >
> > +struct drm_i915_gem_object *
> > +intel_guc_allocate_gem_obj(struct drm_device *dev, u32 size)
> > +{
> > + struct drm_i915_gem_object *obj;
> > +
> > + obj = i915_gem_alloc_object(dev, size);
> > + if (!obj)
> > + return NULL;
> > +
> > + if (i915_gem_object_get_pages(obj)) {
> > + drm_gem_object_unreference(&obj->base);
> > + return NULL;
> > + }
> > +
> > + if (i915_gem_obj_ggtt_pin(obj, PAGE_SIZE,
> > + PIN_OFFSET_BIAS | GUC_WOPCM_SIZE_VALUE)) {
>
> Please add a comment here about how much pin bias you exactly need and
> why. Otherwise this will be extremely arcane knowledge lost when someone
> reworks the pin bias stuff or changes the default offset.
>
> Or well just use the right offset directly, since atm PIN_OFFSET_BIAS is
> 256k and you claim to need 512k.
Strike that all, I'm blind and your code is all fine.
Sorry for the mess.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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next prev parent reply other threads:[~2015-03-27 8:48 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-26 19:41 [PATCH 00/18] Command submission via GuC for SKL yu.dai
2015-03-26 19:41 ` [PATCH 01/18] drm/i915: Add guc firmware interface headers yu.dai
2015-03-26 19:41 ` [PATCH 02/18] drm/i915: Add i915_gem_object_write() to i915_gem.c yu.dai
2015-03-26 19:41 ` [PATCH 03/18] drm/i915: Unified firmware loading mechanism yu.dai
2015-03-26 19:41 ` [PATCH 04/18] drm/i915: GuC firmware loader yu.dai
2015-03-26 19:41 ` [PATCH 05/18] drm/i915: Add firmware version check yu.dai
2015-03-26 19:41 ` [PATCH 06/18] drm/i915: Defer default hardware context initialisation until first open yu.dai
2015-03-27 8:45 ` Daniel Vetter
2015-03-30 19:11 ` Yu Dai
2015-03-31 13:11 ` Daniel Vetter
2015-03-31 9:29 ` Chris Wilson
2015-03-26 19:41 ` [PATCH 07/18] drm/i915: Move execlists defines from .c to .h yu.dai
2015-03-26 19:41 ` [PATCH 08/18] drm/i915: Make several execlist helper functions external yu.dai
2015-03-26 19:41 ` [PATCH 09/18] drm/i915: Add functions to allocate / release gem obj for GuC yu.dai
2015-03-27 8:48 ` Daniel Vetter
2015-03-27 8:49 ` Daniel Vetter [this message]
2015-03-26 19:41 ` [PATCH 10/18] drm/i915: Functions to support command submission via GuC yu.dai
2015-03-26 19:41 ` [PATCH 11/18] drm/i915: Integration of GuC client yu.dai
2015-03-26 19:41 ` [PATCH 12/18] drm/i915: Interrupt routing for GuC scheduler yu.dai
2015-03-26 19:41 ` [PATCH 13/18] drm/i915: Enable commands submission via GuC yu.dai
2015-03-26 19:41 ` [PATCH 14/18] drm/i915: debugfs of GuC status yu.dai
2015-03-26 19:41 ` [PATCH 15/18] drm/i915: Enable GuC firmware log yu.dai
2015-03-26 19:41 ` [PATCH 16/18] drm/i915: Ring Context allocating for GuC yu.dai
2015-03-26 19:41 ` [PATCH 17/18] drm/i915: Taking forcewake during GuC load yu.dai
2015-03-27 8:55 ` Daniel Vetter
2015-03-26 19:41 ` [PATCH 18/18] drm/i915: Notify GuC when RC6 state is changed yu.dai
2015-03-27 1:24 ` shuang.he
2015-03-27 8:54 ` Daniel Vetter
2015-03-27 8:59 ` [PATCH 00/18] Command submission via GuC for SKL Daniel Vetter
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