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From: Sonika Jindal <sonika.jindal@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH] drm/i915/bxt: Update HAS_PSR macro to include all gen>=8 platforms
Date: Wed, 22 Jul 2015 15:06:22 +0530	[thread overview]
Message-ID: <1437557782-11019-1-git-send-email-sonika.jindal@intel.com> (raw)
In-Reply-To: <20150721093119.GA15920@strange.ger.corp.intel.com>

This is to get PSR support for bxt.
v2: Adding bxt prefix in title (Damien)

Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h |    5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 718170c..54d2729 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2537,9 +2537,8 @@ struct drm_i915_cmd_table {
 
 #define HAS_DDI(dev)		(INTEL_INFO(dev)->has_ddi)
 #define HAS_FPGA_DBG_UNCLAIMED(dev)	(INTEL_INFO(dev)->has_fpga_dbg)
-#define HAS_PSR(dev)		(IS_HASWELL(dev) || IS_BROADWELL(dev) || \
-				 IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
-				 IS_SKYLAKE(dev))
+#define HAS_PSR(dev)		(IS_HASWELL(dev) || IS_VALLEYVIEW(dev) || \
+				 INTEL_INFO(dev)->gen >= 8)
 #define HAS_RUNTIME_PM(dev)	(IS_GEN6(dev) || IS_HASWELL(dev) || \
 				 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
 				 IS_SKYLAKE(dev))
-- 
1.7.10.4

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      parent reply	other threads:[~2015-07-22  9:46 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-07-21  9:18 [PATCH] drm/i915: Update HAS_PSR macro to include all gen>=8 platforms Sonika Jindal
2015-07-21  9:31 ` Damien Lespiau
2015-07-21  9:47   ` Daniel Vetter
2015-08-11  4:30     ` Jindal, Sonika
2015-08-11  9:25       ` Daniel Vetter
2015-07-22  9:36   ` Sonika Jindal [this message]

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