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From: Arun Siluvery <arun.siluvery@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Subject: [PATCH 3/3] drm/i915: Update i915.reset to handle engine resets
Date: Fri, 18 Mar 2016 20:07:56 +0000	[thread overview]
Message-ID: <1458331676-567-4-git-send-email-arun.siluvery@linux.intel.com> (raw)
In-Reply-To: <1458331676-567-1-git-send-email-arun.siluvery@linux.intel.com>

In preparation for engine reset work update this parameter to handle more
than one type of reset. Default at the moment is still full gpu reset.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_params.c | 6 +++---
 drivers/gpu/drm/i915/i915_params.h | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 1779f02..e4f9d6a 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -45,7 +45,7 @@ struct i915_params i915 __read_mostly = {
 	.fastboot = 0,
 	.prefault_disable = 0,
 	.load_detect_test = 0,
-	.reset = true,
+	.reset = 1,
 	.invert_brightness = 0,
 	.disable_display = 0,
 	.enable_cmd_parser = 1,
@@ -108,8 +108,8 @@ MODULE_PARM_DESC(vbt_sdvo_panel_type,
 	"Override/Ignore selection of SDVO panel mode in the VBT "
 	"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
 
-module_param_named_unsafe(reset, i915.reset, bool, 0600);
-MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
+module_param_named_unsafe(reset, i915.reset, int, 0600);
+MODULE_PARM_DESC(reset, "Attempt GPU resets (0=disabled, 1=full gpu reset [default], 2=engine reset)");
 
 module_param_named_unsafe(enable_hangcheck, i915.enable_hangcheck, bool, 0644);
 MODULE_PARM_DESC(enable_hangcheck,
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 02bc278..9b13c10 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -34,6 +34,7 @@ struct i915_params {
 	int lvds_channel_mode;
 	int panel_use_ssc;
 	int vbt_sdvo_panel_type;
+	int reset;
 	int enable_rc6;
 	int enable_dc;
 	int enable_fbc;
@@ -55,7 +56,6 @@ struct i915_params {
 	bool fastboot;
 	bool prefault_disable;
 	bool load_detect_test;
-	bool reset;
 	bool disable_display;
 	bool enable_guc_submission;
 	bool verbose_state_checks;
-- 
1.9.1

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  parent reply	other threads:[~2016-03-18 20:08 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-18 20:07 [PATCH 0/3] Gen8 Engine reset preparatory patches Arun Siluvery
2016-03-18 20:07 ` [PATCH 1/3] drm/i915/tdr: Initialize hangcheck struct for each engine Arun Siluvery
2016-03-18 20:48   ` Chris Wilson
2016-03-18 21:22     ` Arun Siluvery
2016-03-18 21:34       ` Chris Wilson
2016-03-21 16:26   ` [PATCH v2] " Arun Siluvery
2016-03-21 17:15     ` Chris Wilson
2016-03-18 20:07 ` [PATCH 2/3] drm/i915/tdr: Prepare error handler to accept mask of hung engines Arun Siluvery
2016-03-22 12:04   ` Mika Kuoppala
2016-03-18 20:07 ` Arun Siluvery [this message]
2016-03-21 11:49 ` ✗ Fi.CI.BAT: warning for Gen8 Engine reset preparatory patches Patchwork
2016-03-21 16:13   ` Arun Siluvery
2016-03-21 16:29   ` Arun Siluvery
2016-03-22  9:07 ` ✗ Fi.CI.BAT: warning for Gen8 Engine reset preparatory patches (rev2) Patchwork
2016-03-22 13:09 ` [PATCH 0/3] Gen8 Engine reset preparatory patches Mika Kuoppala

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