From: Arun Siluvery <arun.siluvery@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Tomas Elf <tomas.elf@intel.com>, Mika Kuoppala <mika.kuoppala@intel.com>
Subject: [PATCH v2] drm/i915/tdr: Initialize hangcheck struct for each engine
Date: Mon, 21 Mar 2016 16:26:59 +0000 [thread overview]
Message-ID: <1458577619-12006-1-git-send-email-arun.siluvery@linux.intel.com> (raw)
In-Reply-To: <1458331676-567-2-git-send-email-arun.siluvery@linux.intel.com>
From: Tomas Elf <tomas.elf@intel.com>
Initialize hangcheck struct during driver load. Since we do the same after
recovering from a reset, this is extracted into a helper function.
v2: remove redundant hangcheck init during load as this is done when
engines are initialized (Chris)
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_lrc.c | 2 +-
drivers/gpu/drm/i915/intel_ringbuffer.c | 7 ++++++-
3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f330a53..549a232 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2718,6 +2718,7 @@ extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
extern int intel_gpu_reset(struct drm_device *dev, u32 engine_mask);
extern bool intel_has_gpu_reset(struct drm_device *dev);
extern int i915_reset(struct drm_device *dev);
+extern void intel_engine_init_hangcheck(struct intel_engine_cs *engine);
extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv);
extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv);
extern unsigned long i915_gfx_val(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 3a23b95..40ef4ea 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1606,7 +1606,7 @@ static int gen8_init_common_ring(struct intel_engine_cs *engine)
engine->next_context_status_buffer = next_context_status_buffer_hw;
DRM_DEBUG_DRIVER("Execlists enabled for %s\n", engine->name);
- memset(&engine->hangcheck, 0, sizeof(engine->hangcheck));
+ intel_engine_init_hangcheck(engine);
return 0;
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index df0ef5b..ce59850 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -555,6 +555,11 @@ static bool stop_ring(struct intel_engine_cs *engine)
return (I915_READ_HEAD(engine) & HEAD_ADDR) == 0;
}
+void intel_engine_init_hangcheck(struct intel_engine_cs *engine)
+{
+ memset(&engine->hangcheck, 0, sizeof(engine->hangcheck));
+}
+
static int init_ring_common(struct intel_engine_cs *engine)
{
struct drm_device *dev = engine->dev;
@@ -634,7 +639,7 @@ static int init_ring_common(struct intel_engine_cs *engine)
ringbuf->tail = I915_READ_TAIL(engine) & TAIL_ADDR;
intel_ring_update_space(ringbuf);
- memset(&engine->hangcheck, 0, sizeof(engine->hangcheck));
+ intel_engine_init_hangcheck(engine);
out:
intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
--
1.9.1
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next prev parent reply other threads:[~2016-03-21 16:27 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-18 20:07 [PATCH 0/3] Gen8 Engine reset preparatory patches Arun Siluvery
2016-03-18 20:07 ` [PATCH 1/3] drm/i915/tdr: Initialize hangcheck struct for each engine Arun Siluvery
2016-03-18 20:48 ` Chris Wilson
2016-03-18 21:22 ` Arun Siluvery
2016-03-18 21:34 ` Chris Wilson
2016-03-21 16:26 ` Arun Siluvery [this message]
2016-03-21 17:15 ` [PATCH v2] " Chris Wilson
2016-03-18 20:07 ` [PATCH 2/3] drm/i915/tdr: Prepare error handler to accept mask of hung engines Arun Siluvery
2016-03-22 12:04 ` Mika Kuoppala
2016-03-18 20:07 ` [PATCH 3/3] drm/i915: Update i915.reset to handle engine resets Arun Siluvery
2016-03-21 11:49 ` ✗ Fi.CI.BAT: warning for Gen8 Engine reset preparatory patches Patchwork
2016-03-21 16:13 ` Arun Siluvery
2016-03-21 16:29 ` Arun Siluvery
2016-03-22 9:07 ` ✗ Fi.CI.BAT: warning for Gen8 Engine reset preparatory patches (rev2) Patchwork
2016-03-22 13:09 ` [PATCH 0/3] Gen8 Engine reset preparatory patches Mika Kuoppala
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