From: Anusha Srivatsa <anusha.srivatsa@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 6/6] drm/i915/cnp: Panel Power sequence changes for CNP PCH.
Date: Mon, 8 May 2017 16:45:04 -0700 [thread overview]
Message-ID: <1494287104-13109-7-git-send-email-anusha.srivatsa@intel.com> (raw)
In-Reply-To: <1494287104-13109-1-git-send-email-anusha.srivatsa@intel.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
As for BXT, PP_DIVISOR was removed from CNP PCH and power
cycle delay has been moved to PP_CONTROL.
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 08834f7..6563e93 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -798,7 +798,7 @@ static void intel_pps_get_registers(struct drm_i915_private *dev_priv,
regs->pp_stat = PP_STATUS(pps_idx);
regs->pp_on = PP_ON_DELAYS(pps_idx);
regs->pp_off = PP_OFF_DELAYS(pps_idx);
- if (!IS_GEN9_LP(dev_priv))
+ if (!IS_GEN9_LP(dev_priv) && !HAS_PCH_CNP(dev_priv))
regs->pp_div = PP_DIVISOR(pps_idx);
}
@@ -5217,7 +5217,7 @@ intel_pps_readout_hw_state(struct drm_i915_private *dev_priv,
pp_on = I915_READ(regs.pp_on);
pp_off = I915_READ(regs.pp_off);
- if (!IS_GEN9_LP(dev_priv)) {
+ if (!IS_GEN9_LP(dev_priv) && !HAS_PCH_CNP(dev_priv)) {
I915_WRITE(regs.pp_ctrl, pp_ctl);
pp_div = I915_READ(regs.pp_div);
}
@@ -5235,7 +5235,7 @@ intel_pps_readout_hw_state(struct drm_i915_private *dev_priv,
seq->t10 = (pp_off & PANEL_POWER_DOWN_DELAY_MASK) >>
PANEL_POWER_DOWN_DELAY_SHIFT;
- if (IS_GEN9_LP(dev_priv)) {
+ if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv)) {
u16 tmp = (pp_ctl & BXT_POWER_CYCLE_DELAY_MASK) >>
BXT_POWER_CYCLE_DELAY_SHIFT;
if (tmp > 0)
@@ -5392,7 +5392,7 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
(seq->t10 << PANEL_POWER_DOWN_DELAY_SHIFT);
/* Compute the divisor for the pp clock, simply match the Bspec
* formula. */
- if (IS_GEN9_LP(dev_priv)) {
+ if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv)) {
pp_div = I915_READ(regs.pp_ctrl);
pp_div &= ~BXT_POWER_CYCLE_DELAY_MASK;
pp_div |= (DIV_ROUND_UP((seq->t11_t12 + 1), 1000)
@@ -5426,7 +5426,7 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
DRM_DEBUG_KMS("panel power sequencer register settings: PP_ON %#x, PP_OFF %#x, PP_DIV %#x\n",
I915_READ(regs.pp_on),
I915_READ(regs.pp_off),
- IS_GEN9_LP(dev_priv) ?
+ (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv)) ?
(I915_READ(regs.pp_ctrl) & BXT_POWER_CYCLE_DELAY_MASK) :
I915_READ(regs.pp_div));
}
--
2.7.4
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next prev parent reply other threads:[~2017-05-08 23:46 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-08 23:44 [PATCH 0/6] Cannonpoint Enabling Patches Anusha Srivatsa
2017-05-08 23:44 ` [PATCH 1/6] drm/i915/cnp: Introduce Cannonpoint PCH Anusha Srivatsa
2017-05-08 23:45 ` [PATCH 2/6] drm/i915/cnp: Add PCI ID for Cannonpoint LP PCH Anusha Srivatsa
2017-05-08 23:45 ` [PATCH 3/6] drm/i915/cnp: Get/set proper Raw clock frequency on CNP Anusha Srivatsa
2017-05-08 23:45 ` [PATCH 4/6] drm/i915/cnp: Backlight support for CNP Anusha Srivatsa
2017-05-09 0:10 ` Pandiyan, Dhinakaran
2017-05-09 0:11 ` Srivatsa, Anusha
2017-05-08 23:45 ` [PATCH 5/6] drm/i915/cnp: add CNP gmbus support Anusha Srivatsa
2017-05-08 23:45 ` Anusha Srivatsa [this message]
2017-05-09 6:46 ` ✗ Fi.CI.BAT: failure for Cannonpoint Enabling Patches Patchwork
-- strict thread matches above, loose matches on Subject: below --
2017-05-09 19:16 [PATCH 0/6] " Anusha Srivatsa
2017-05-09 19:16 ` [PATCH 6/6] drm/i915/cnp: Panel Power sequence changes for CNP PCH Anusha Srivatsa
2017-05-30 21:53 [PATCH 1/6] drm/i915/cnp: Introduce Cannonpoint PCH Rodrigo Vivi
2017-05-30 21:53 ` [PATCH 6/6] drm/i915/cnp: Panel Power sequence changes for CNP PCH Rodrigo Vivi
2017-05-30 21:57 ` Rodrigo Vivi
2017-05-30 22:11 [PATCH 1/6] drm/i915/cnp: Introduce Cannonpoint PCH Rodrigo Vivi
2017-05-30 22:11 ` [PATCH 6/6] drm/i915/cnp: Panel Power sequence changes for CNP PCH Rodrigo Vivi
2017-06-01 0:23 [PATCH 1/6] drm/i915/cnp: Introduce Cannonpoint PCH Rodrigo Vivi
2017-06-01 0:23 ` [PATCH 6/6] drm/i915/cnp: Panel Power sequence changes for CNP PCH Rodrigo Vivi
2017-06-01 22:33 [PATCH 1/6] drm/i915/cnp: Introduce Cannonpoint PCH Rodrigo Vivi
2017-06-01 22:33 ` [PATCH 6/6] drm/i915/cnp: Panel Power sequence changes for CNP PCH Rodrigo Vivi
2017-06-02 20:06 [PATCH 1/6] drm/i915/cnp: Introduce Cannonpoint PCH Rodrigo Vivi
2017-06-02 20:06 ` [PATCH 6/6] drm/i915/cnp: Panel Power sequence changes for CNP PCH Rodrigo Vivi
2017-06-03 3:15 ` Rodrigo Vivi
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