[PATCH 08/10] drm/i915: Create generic function to setup ring frequency table

[Sagar Arun Kamble <sagar.a.kamble@intel.com>]

Prepared intel_update_ring_freq function to setup ring frequency
for applicable platforms determined by macro - NEEDS_RING_FREQ_UPDATE

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1ccc3fb..62aed72 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7868,6 +7868,19 @@ static void intel_init_emon(struct drm_i915_private *dev_priv)
 	dev_priv->ips.corr = (lcfuse & LCFUSE_HIV_MASK);
 }
 
+#define NEEDS_RING_FREQ_UPDATE(i915) \
+	   (((INTEL_GEN(i915) >= 9) && \
+	     (IS_GEN9_BC(i915) || IS_CANNONLAKE(i915))) || \
+	    (IS_BROADWELL(i915)) || \
+	    ((INTEL_GEN(i915) >= 6) && \
+	     (!IS_CHERRYVIEW(i915) && !IS_VALLEYVIEW(i915))))
+
+static inline void intel_update_ring_freq(struct drm_i915_private *i915)
+{
+	if (NEEDS_RING_FREQ_UPDATE(i915))
+		gen6_update_ring_freq(i915);
+}
+
 void intel_init_gt_powersave(struct drm_i915_private *dev_priv)
 {
 	struct intel_rps *rps = &dev_priv->pm.rps;
@@ -8014,21 +8027,19 @@ void intel_enable_gt_powersave(struct drm_i915_private *dev_priv)
 	} else if (INTEL_GEN(dev_priv) >= 9) {
 		gen9_enable_rc6(dev_priv);
 		gen9_enable_rps(dev_priv);
-		if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv))
-			gen6_update_ring_freq(dev_priv);
 	} else if (IS_BROADWELL(dev_priv)) {
 		gen8_enable_rc6(dev_priv);
 		gen8_enable_rps(dev_priv);
-		gen6_update_ring_freq(dev_priv);
 	} else if (INTEL_GEN(dev_priv) >= 6) {
 		gen6_enable_rc6(dev_priv);
 		gen6_enable_rps(dev_priv);
-		gen6_update_ring_freq(dev_priv);
 	} else if (IS_IRONLAKE_M(dev_priv)) {
 		ironlake_enable_drps(dev_priv);
 		intel_init_emon(dev_priv);
 	}
 
+	intel_update_ring_freq(dev_priv);
+
 	WARN_ON(dev_priv->pm.rps.max_freq < dev_priv->pm.rps.min_freq);
 	WARN_ON(dev_priv->pm.rps.idle_freq > dev_priv->pm.rps.max_freq);
 
-- 
1.9.1

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