From: Anusha Srivatsa <anusha.srivatsa@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>,
Paulo Zanoni <paulo.r.zanoni@intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: [PATCH 2/2] drm/i915/icl: implement icl_digital_port_connected()
Date: Wed, 20 Jun 2018 14:36:05 -0700 [thread overview]
Message-ID: <1529530565-8985-2-git-send-email-anusha.srivatsa@intel.com> (raw)
In-Reply-To: <1529530565-8985-1-git-send-email-anusha.srivatsa@intel.com>
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
Do like the other functions and check for the ISR bits. We have plans
to add a few more checks in this code in the next patches, that's why
it's a little more verbose than it could be.
v2:
- Change the register names, to be consistent with
the rest of the platforms.
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 5 ++++
drivers/gpu/drm/i915/intel_dp.c | 57 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 62 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e347055..f55e889 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7093,6 +7093,7 @@ enum {
#define GEN11_TC3_HOTPLUG (1 << 18)
#define GEN11_TC2_HOTPLUG (1 << 17)
#define GEN11_TC1_HOTPLUG (1 << 16)
+#define GEN11_TC_HOTPLUG(tc_port) (1 << ((tc_port) + 16))
#define GEN11_DE_TC_HOTPLUG_MASK (GEN11_TC4_HOTPLUG | \
GEN11_TC3_HOTPLUG | \
GEN11_TC2_HOTPLUG | \
@@ -7101,6 +7102,7 @@ enum {
#define GEN11_TBT3_HOTPLUG (1 << 2)
#define GEN11_TBT2_HOTPLUG (1 << 1)
#define GEN11_TBT1_HOTPLUG (1 << 0)
+#define GEN11_TBT_HOTPLUG(tc_port) (1 << (tc_port))
#define GEN11_DE_TBT_HOTPLUG_MASK (GEN11_TBT4_HOTPLUG | \
GEN11_TBT3_HOTPLUG | \
GEN11_TBT2_HOTPLUG | \
@@ -7525,6 +7527,9 @@ enum {
#define SDE_GMBUS_ICP (1 << 23)
#define SDE_DDIB_HOTPLUG_ICP (1 << 17)
#define SDE_DDIA_HOTPLUG_ICP (1 << 16)
+#define SDE_TC_HOTPLUG_ICP(tc_port) (1 << ((tc_port) + 24))
+#define SDE_DDI_HOTPLUG_ICP(port) (1 << ((port) + 16))
+
#define SDE_DDI_MASK_ICP (SDE_DDIB_HOTPLUG_ICP | \
SDE_DDIA_HOTPLUG_ICP)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 6ac6c87..224cc71 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4750,6 +4750,61 @@ static bool bxt_digital_port_connected(struct intel_encoder *encoder)
return I915_READ(GEN8_DE_PORT_ISR) & bit;
}
+static bool icl_combo_port_connected(struct drm_i915_private *dev_priv,
+ struct intel_digital_port *intel_dig_port)
+{
+ enum port port = intel_dig_port->base.port;
+
+ return I915_READ(SDEISR) & SDE_DDI_HOTPLUG_ICP(port);
+}
+
+static bool icl_tc_port_connected(struct drm_i915_private *dev_priv,
+ struct intel_digital_port *intel_dig_port)
+{
+ enum port port = intel_dig_port->base.port;
+ enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
+ u32 legacy_bit = SDE_TC_HOTPLUG_ICP(tc_port);
+ u32 typec_bit = GEN11_TC_HOTPLUG(tc_port);
+ u32 tbt_bit = GEN11_TBT_HOTPLUG(tc_port);
+ bool is_legacy = false, is_typec = false, is_tbt = false;
+ u32 cpu_isr;
+
+ if (I915_READ(SDEISR) & legacy_bit)
+ is_legacy = true;
+
+ cpu_isr = I915_READ(GEN11_DE_HPD_ISR);
+ if (cpu_isr & typec_bit)
+ is_typec = true;
+ if (cpu_isr & tbt_bit)
+ is_tbt = true;
+
+ WARN_ON(is_legacy + is_typec + is_tbt > 1);
+ if (!is_legacy && !is_typec && !is_tbt)
+ return false;
+
+ return true;
+}
+
+static bool icl_digital_port_connected(struct intel_encoder *encoder)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
+
+ switch (encoder->hpd_pin) {
+ case HPD_PORT_A:
+ case HPD_PORT_B:
+ return icl_combo_port_connected(dev_priv, dig_port);
+ case HPD_PORT_C:
+ case HPD_PORT_D:
+ case HPD_PORT_E:
+ case HPD_PORT_F:
+ return icl_tc_port_connected(dev_priv, dig_port);
+ default:
+ MISSING_CASE(encoder->hpd_pin);
+ return false;
+ }
+}
+
/*
* intel_digital_port_connected - is the specified port connected?
* @encoder: intel_encoder
@@ -4777,6 +4832,8 @@ bool intel_digital_port_connected(struct intel_encoder *encoder)
return bdw_digital_port_connected(encoder);
else if (IS_GEN9_LP(dev_priv))
return bxt_digital_port_connected(encoder);
+ else if (IS_ICELAKE(dev_priv))
+ return icl_digital_port_connected(encoder);
else
return spt_digital_port_connected(encoder);
}
--
2.7.4
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next prev parent reply other threads:[~2018-06-20 21:38 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-20 21:36 [PATCH 1/2] drm/i915/icp: Add Interrupt Support Anusha Srivatsa
2018-06-20 21:36 ` Anusha Srivatsa [this message]
2018-06-30 6:42 ` [PATCH 2/2] drm/i915/icl: implement icl_digital_port_connected() Lucas De Marchi
2018-06-20 22:11 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/icp: Add Interrupt Support Patchwork
2018-06-21 6:37 ` ✓ Fi.CI.IGT: " Patchwork
2018-06-25 23:17 ` [PATCH 1/2] " Paulo Zanoni
2018-06-26 18:32 ` Srivatsa, Anusha
2018-06-26 20:09 ` Paulo Zanoni
2018-07-23 17:05 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2018-06-20 21:02 [PATCH 1/2] " Anusha Srivatsa
2018-06-20 21:02 ` [PATCH 2/2] drm/i915/icl: implement icl_digital_port_connected() Anusha Srivatsa
2018-06-20 22:43 ` kbuild test robot
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