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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ville.syrjala@intel.com, maarten.lankhorst@intel.com
Subject: [v6 0/6] Add support for Gen 11 pipe color features
Date: Wed, 16 Jan 2019 21:51:31 +0530	[thread overview]
Message-ID: <1547655697-4092-1-git-send-email-uma.shankar@intel.com> (raw)

This patch series adds support for Gen11 pipe degamma, CSC
and gamma hardware blocks.

CRC checks are not working for 10bit gamma but works for 8bit
pallete modes which seems to be due to some rounding errors in
pipe. Also there is a corner case where Lut precision is increased
to 3.16, hence its not possible to accurately represent 1.0 which
will require 17 bits. Support for extending the ABI is already in
discussion in below series:
https://patchwork.freedesktop.org/patch/249771/

ToDo: Support for Multi Segmented Gamma will be added later.

v2: Addressed Maarten's review comments and re-ordered the patch
series.

v3: Addressed Matt's review comments. Removed rmw patterns
as suggested by Matt.

v4: Addressed Matt's review comments.

v5: Addressed Matt's, Ville and Jani Nikula's review comments.

v6: Addressed Matt and Ville's review comments. Extended GLK 
degamma function and merged ICL degamma support to that. Handled
pipe output csc separately along with regular pipe csc. Dropped
gamma_mode removal patch as Ville is using that to refactor the
gamma handling. This series may need a rebase on top of Ville's
below series:
https://patchwork.freedesktop.org/series/55081/. 

Uma Shankar (6):
  drm/i915: Sanitize crtc gamma and csc mode
  drm/i915/glk: Fix degamma lut programming
  drm/i915/icl: Add icl pipe degamma and gamma support
  drm/i915/icl: Enable ICL Pipe CSC block
  drm/i915/icl: Enable pipe output csc
  drm/i915/icl: Add degamma and gamma lut size to gen11 caps

 drivers/gpu/drm/i915/i915_pci.c      |   5 +-
 drivers/gpu/drm/i915/i915_reg.h      |  62 +++++++++++++---
 drivers/gpu/drm/i915/intel_color.c   | 133 ++++++++++++++++++++++++++++-------
 drivers/gpu/drm/i915/intel_display.c |  21 ++++++
 drivers/gpu/drm/i915/intel_drv.h     |   3 +
 5 files changed, 188 insertions(+), 36 deletions(-)

-- 
1.9.1

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             reply	other threads:[~2019-01-16 15:58 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-16 16:21 Uma Shankar [this message]
2019-01-16 16:21 ` [v6 1/6] drm/i915: Sanitize crtc gamma and csc mode Uma Shankar
2019-01-16 16:21 ` [v6 2/6] drm/i915/glk: Fix degamma lut programming Uma Shankar
2019-01-28 21:34   ` Matt Roper
2019-01-16 16:21 ` [v6 3/6] drm/i915/icl: Add icl pipe degamma and gamma support Uma Shankar
2019-01-28 22:19   ` Matt Roper
2019-01-29 15:36     ` Shankar, Uma
2019-01-16 16:21 ` [v6 4/6] drm/i915/icl: Enable ICL Pipe CSC block Uma Shankar
2019-01-28 22:19   ` Matt Roper
2019-01-29 15:38     ` Shankar, Uma
2019-01-16 16:21 ` [v6 5/6] drm/i915/icl: Enable pipe output csc Uma Shankar
2019-01-28 22:19   ` Matt Roper
2019-01-29 15:52     ` Shankar, Uma
2019-01-16 16:21 ` [v6 6/6] drm/i915/icl: Add degamma and gamma lut size to gen11 caps Uma Shankar
2019-01-17  8:55 ` ✗ Fi.CI.CHECKPATCH: warning for Add support for Gen 11 pipe color features (rev6) Patchwork
2019-01-17  9:39 ` ✓ Fi.CI.BAT: success " Patchwork
2019-01-17 13:31 ` ✓ Fi.CI.IGT: " Patchwork
2019-01-25 12:35 ` [v6 0/6] Add support for Gen 11 pipe color features Shankar, Uma

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