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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Shankar, Uma" <uma.shankar@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for Add support for Gen 11 pipe color features (rev6)
Date: Thu, 17 Jan 2019 08:55:02 -0000	[thread overview]
Message-ID: <20190117085502.8593.23545@emeril.freedesktop.org> (raw)
In-Reply-To: <1547655697-4092-1-git-send-email-uma.shankar@intel.com>

== Series Details ==

Series: Add support for Gen 11 pipe color features (rev6)
URL   : https://patchwork.freedesktop.org/series/51408/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
d8b97dc07080 drm/i915: Sanitize crtc gamma and csc mode
30347710fc21 drm/i915/glk: Fix degamma lut programming
80c225a0100d drm/i915/icl: Add icl pipe degamma and gamma support
7af2f0ab6a8d drm/i915/icl: Enable ICL Pipe CSC block
ebeb64818cc5 drm/i915/icl: Enable pipe output csc
-:62: WARNING:LONG_LINE: line over 100 characters
#62: FILE: drivers/gpu/drm/i915/i915_reg.h:9934:
+#define PIPE_CSC_OUTPUT_COEFF_RY_GY(pipe)	_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_COEFF_RY_GY, _PIPE_B_OUTPUT_CSC_COEFF_RY_GY)

-:63: WARNING:LONG_LINE: line over 100 characters
#63: FILE: drivers/gpu/drm/i915/i915_reg.h:9935:
+#define PIPE_CSC_OUTPUT_COEFF_BY(pipe)		_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_COEFF_BY, _PIPE_B_OUTPUT_CSC_COEFF_BY)

-:64: WARNING:LONG_LINE: line over 100 characters
#64: FILE: drivers/gpu/drm/i915/i915_reg.h:9936:
+#define PIPE_CSC_OUTPUT_COEFF_RU_GU(pipe)	_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_COEFF_RU_GU, _PIPE_B_OUTPUT_CSC_COEFF_RU_GU)

-:65: WARNING:LONG_LINE: line over 100 characters
#65: FILE: drivers/gpu/drm/i915/i915_reg.h:9937:
+#define PIPE_CSC_OUTPUT_COEFF_BU(pipe)		_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_COEFF_BU, _PIPE_B_OUTPUT_CSC_COEFF_BU)

-:66: WARNING:LONG_LINE: line over 100 characters
#66: FILE: drivers/gpu/drm/i915/i915_reg.h:9938:
+#define PIPE_CSC_OUTPUT_COEFF_RV_GV(pipe)	_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_COEFF_RV_GV, _PIPE_B_OUTPUT_CSC_COEFF_RV_GV)

-:67: WARNING:LONG_LINE: line over 100 characters
#67: FILE: drivers/gpu/drm/i915/i915_reg.h:9939:
+#define PIPE_CSC_OUTPUT_COEFF_BV(pipe)		_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_COEFF_BV, _PIPE_B_OUTPUT_CSC_COEFF_BV)

-:68: WARNING:LONG_LINE: line over 100 characters
#68: FILE: drivers/gpu/drm/i915/i915_reg.h:9940:
+#define PIPE_CSC_OUTPUT_PREOFF_HI(pipe)		_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_PREOFF_HI, _PIPE_B_OUTPUT_CSC_PREOFF_HI)

-:69: WARNING:LONG_LINE: line over 100 characters
#69: FILE: drivers/gpu/drm/i915/i915_reg.h:9941:
+#define PIPE_CSC_OUTPUT_PREOFF_ME(pipe)		_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_PREOFF_ME, _PIPE_B_OUTPUT_CSC_PREOFF_ME)

-:70: WARNING:LONG_LINE: line over 100 characters
#70: FILE: drivers/gpu/drm/i915/i915_reg.h:9942:
+#define PIPE_CSC_OUTPUT_PREOFF_LO(pipe)		_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_PREOFF_LO, _PIPE_B_OUTPUT_CSC_PREOFF_LO)

-:71: WARNING:LONG_LINE: line over 100 characters
#71: FILE: drivers/gpu/drm/i915/i915_reg.h:9943:
+#define PIPE_CSC_OUTPUT_POSTOFF_HI(pipe)	_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_POSTOFF_HI, _PIPE_B_OUTPUT_CSC_POSTOFF_HI)

-:72: WARNING:LONG_LINE: line over 100 characters
#72: FILE: drivers/gpu/drm/i915/i915_reg.h:9944:
+#define PIPE_CSC_OUTPUT_POSTOFF_ME(pipe)	_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_POSTOFF_ME, _PIPE_B_OUTPUT_CSC_POSTOFF_ME)

-:73: WARNING:LONG_LINE: line over 100 characters
#73: FILE: drivers/gpu/drm/i915/i915_reg.h:9945:
+#define PIPE_CSC_OUTPUT_POSTOFF_LO(pipe)	_MMIO_PIPE(pipe, _PIPE_A_OUTPUT_CSC_POSTOFF_LO, _PIPE_B_OUTPUT_CSC_POSTOFF_LO)

total: 0 errors, 12 warnings, 0 checks, 166 lines checked
b880acec10d4 drm/i915/icl: Add degamma and gamma lut size to gen11 caps

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  parent reply	other threads:[~2019-01-17  8:55 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-16 16:21 [v6 0/6] Add support for Gen 11 pipe color features Uma Shankar
2019-01-16 16:21 ` [v6 1/6] drm/i915: Sanitize crtc gamma and csc mode Uma Shankar
2019-01-16 16:21 ` [v6 2/6] drm/i915/glk: Fix degamma lut programming Uma Shankar
2019-01-28 21:34   ` Matt Roper
2019-01-16 16:21 ` [v6 3/6] drm/i915/icl: Add icl pipe degamma and gamma support Uma Shankar
2019-01-28 22:19   ` Matt Roper
2019-01-29 15:36     ` Shankar, Uma
2019-01-16 16:21 ` [v6 4/6] drm/i915/icl: Enable ICL Pipe CSC block Uma Shankar
2019-01-28 22:19   ` Matt Roper
2019-01-29 15:38     ` Shankar, Uma
2019-01-16 16:21 ` [v6 5/6] drm/i915/icl: Enable pipe output csc Uma Shankar
2019-01-28 22:19   ` Matt Roper
2019-01-29 15:52     ` Shankar, Uma
2019-01-16 16:21 ` [v6 6/6] drm/i915/icl: Add degamma and gamma lut size to gen11 caps Uma Shankar
2019-01-17  8:55 ` Patchwork [this message]
2019-01-17  9:39 ` ✓ Fi.CI.BAT: success for Add support for Gen 11 pipe color features (rev6) Patchwork
2019-01-17 13:31 ` ✓ Fi.CI.IGT: " Patchwork
2019-01-25 12:35 ` [v6 0/6] Add support for Gen 11 pipe color features Shankar, Uma

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