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From: Uma Shankar <uma.shankar@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ville.syrjala@intel.com, maarten.lankhorst@intel.com
Subject: [v6 15/16] drm/i915: Define Plane CSC Registers
Date: Tue, 19 Mar 2019 14:14:23 +0530	[thread overview]
Message-ID: <1552985064-11974-16-git-send-email-uma.shankar@intel.com> (raw)
In-Reply-To: <1552985064-11974-1-git-send-email-uma.shankar@intel.com>

Define Register macros for plane CSC.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 44 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7e2e746..38e0c46 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -10263,6 +10263,50 @@ enum skl_power_gate {
 
 #define PLANE_POST_CSC_GAMC_DATA(pipe, plane, i)	_MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_4(pipe),\
 									 _PLANE_POST_CSC_GAMC_DATA_5(pipe))
+
+/* Plane CSC Registers */
+#define _PLANE_CSC_RY_GY_1_A	0x70210
+#define _PLANE_CSC_RY_GY_2_A	0x70310
+
+#define _PLANE_CSC_RY_GY_1_B	0x71210
+#define _PLANE_CSC_RY_GY_2_B	0x71310
+
+#define _PLANE_CSC_RY_GY_1(pipe)	_PIPE(pipe, _PLANE_CSC_RY_GY_1_A, \
+					      _PLANE_CSC_RY_GY_1_B)
+#define _PLANE_CSC_RY_GY_2(pipe)	_PIPE(pipe, _PLANE_INPUT_CSC_RY_GY_2_A, \
+					      _PLANE_INPUT_CSC_RY_GY_2_B)
+
+#define PLANE_CSC_COEFF(pipe, plane, index)	_MMIO_PLANE(plane, \
+							    _PLANE_CSC_RY_GY_1(pipe) +  (index) * 4, \
+							    _PLANE_CSC_RY_GY_2(pipe) + (index) * 4)
+
+#define _PLANE_CSC_PREOFF_HI_1_A		0x70228
+#define _PLANE_CSC_PREOFF_HI_2_A		0x70328
+
+#define _PLANE_CSC_PREOFF_HI_1_B		0x71228
+#define _PLANE_CSC_PREOFF_HI_2_B		0x71328
+
+#define _PLANE_CSC_PREOFF_HI_1(pipe)	_PIPE(pipe, _PLANE_CSC_PREOFF_HI_1_A, \
+					      _PLANE_CSC_PREOFF_HI_1_B)
+#define _PLANE_CSC_PREOFF_HI_2(pipe)	_PIPE(pipe, _PLANE_CSC_PREOFF_HI_2_A, \
+					      _PLANE_CSC_PREOFF_HI_2_B)
+#define PLANE_CSC_PREOFF(pipe, plane, index)	_MMIO_PLANE(plane, _PLANE_CSC_PREOFF_HI_1(pipe) + \
+							    (index) * 4, _PLANE_CSC_PREOFF_HI_2(pipe) + \
+							    (index) * 4)
+
+#define _PLANE_CSC_POSTOFF_HI_1_A		0x70234
+#define _PLANE_CSC_POSTOFF_HI_2_A		0x70334
+
+#define _PLANE_CSC_POSTOFF_HI_1_B		0x71234
+#define _PLANE_CSC_POSTOFF_HI_2_B		0x71334
+
+#define _PLANE_CSC_POSTOFF_HI_1(pipe)	_PIPE(pipe, _PLANE_CSC_POSTOFF_HI_1_A, \
+					      _PLANE_CSC_POSTOFF_HI_1_B)
+#define _PLANE_CSC_POSTOFF_HI_2(pipe)	_PIPE(pipe, _PLANE_CSC_POSTOFF_HI_2_A, \
+					      _PLANE_CSC_POSTOFF_HI_2_B)
+#define PLANE_CSC_POSTOFF(pipe, plane, index)	_MMIO_PLANE(plane, _PLANE_CSC_POSTOFF_HI_1(pipe) + \
+							    (index) * 4, _PLANE_CSC_POSTOFF_HI_2(pipe) + \
+							    (index) * 4)
 /* Plane Gamma Registers */
 /* pipe CSC & degamma/gamma LUTs on CHV */
 #define _CGM_PIPE_A_CSC_COEFF01	(VLV_DISPLAY_BASE + 0x67900)
-- 
1.9.1

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  parent reply	other threads:[~2019-03-19  8:19 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-19  8:44 [v6 00/16] Add Plane Color Properties Uma Shankar
2019-03-19  8:44 ` [v6 01/16] drm: Add Enhanced Gamma LUT precision structure Uma Shankar
2019-03-27 12:12   ` Lankhorst, Maarten
2019-03-28 13:49     ` Shankar, Uma
2019-03-19  8:44 ` [v6 02/16] drm: Add Plane Degamma properties Uma Shankar
2019-03-19 19:09   ` kbuild test robot
2019-03-19  8:44 ` [v6 03/16] drm: Add Plane CTM property Uma Shankar
2019-03-19 22:45   ` kbuild test robot
2019-03-19  8:44 ` [v6 04/16] drm: Add Plane Gamma properties Uma Shankar
2019-03-20  2:36   ` kbuild test robot
2019-03-19  8:44 ` [v6 05/16] drm: Define helper function for plane color enabling Uma Shankar
2019-03-19  8:44 ` [v6 06/16] drm/i915: Enable plane color features Uma Shankar
2019-03-19  8:44 ` [v6 07/16] drm/i915: Implement Plane Gamma for Bdw and Gen9 platforms Uma Shankar
2019-03-19  8:44 ` [v6 08/16] drm/i915: Load plane color luts from atomic flip Uma Shankar
2019-03-19  8:44 ` [v6 09/16] drm/i915: Add plane color capabilities Uma Shankar
2019-03-19  8:44 ` [v6 10/16] drm/i915/icl: Add ICL Plane Degamma Register definition Uma Shankar
2019-03-25 17:36   ` Matt Roper
2019-03-26 13:59     ` Shankar, Uma
2019-03-19  8:44 ` [v6 11/16] drm/i915/icl: Enable Plane Degamma Uma Shankar
2019-03-19 19:31   ` kbuild test robot
2019-03-19  8:44 ` [v6 12/16] drm/i915/icl: Add Plane Gamma Register Definitions Uma Shankar
2019-03-19  8:44 ` [v6 13/16] drm/i915/icl: Implement Plane Gamma Uma Shankar
2019-03-19  8:44 ` [v6 14/16] drm/i915: Enable Plane Gamma/Degamma Uma Shankar
2019-03-19  8:44 ` Uma Shankar [this message]
2019-03-19  8:44 ` [v6 16/16] drm/i915: Enable Plane CSC Uma Shankar
2019-03-19  9:06 ` ✗ Fi.CI.CHECKPATCH: warning for Add Plane Color Properties (rev6) Patchwork
2019-03-19  9:16 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-03-19  9:25 ` ✓ Fi.CI.BAT: success " Patchwork
2019-03-19 17:12 ` ✓ Fi.CI.IGT: " Patchwork

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