From: Xiaolin Zhang <xiaolin.zhang@intel.com>
To: intel-gvt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: chris@chris-wilson.co.uk, zhiyuan.lv@intel.com
Subject: [Intel-gfx] [PATCH v1 00/12] enhanced i915 vgpu with PV feature support
Date: Sat, 5 Sep 2020 00:21:33 +0800 [thread overview]
Message-ID: <1599236505-9086-1-git-send-email-xiaolin.zhang@intel.com> (raw)
This is new i915 VGPU PV design based on the last year proposal [1].
This is a new series of patch set and discontiued the old series of
patch set due to this new design.
To improve vgpu performance, it could implement some PV optimizations
in different gpu resource domain to reduce the data access overhead
or complexity modeling.
In this patch set, PPGTT and GGTT are identifed as PV optimization from
VGPU memory resource point of view and workloa submisison is identifed
as PV optimization from VGPU compute resource point of view. so 3 PV
features (PV PPGTT, PV GGTT and PV submisison) are designed and implemented
to support VGPU model better.
To provide the mechanism for PV feature development and implementation,
A simple PV framework is implemented and consisted of 3 sub items:
a. PV capability: it indicateds what kind of PV capability provided by both
guest system and host GVTg subsystem.
b. PV shared memory: this memory is allocated in guest and shared between
guest and host for data exchange, PV command & PV data communication.
c. PV command transport protocol: on top of PV shared memory, it defines
the communication protocol & channel between guest and host to circulate
PV command and PV command data.
for PV PPGTT, to improve efficiency and reduce the complexity of ppgtt
support, vgpu ppgtt page table operations are implemented in pv fashion
with pv version of bind/unbind for ppgtt vma ops. The pv version of
ppgtt vma ops use the CTB protocol to communicate pv ppgtt command along
with data struct pv_vma from guest to GVT and then GVT implement command
handler of PV_CMD_BIND_PPGTT and PV_CMD_UBIND_PPGTT to achieve GVA->HPA
address translation.
for PV GGTT, it is similar with PV PPGGT instead to use PV_CMD_BIND_GGTT
and PV_CMD_UNBIND_GGTT pv command.
for PV workload submisison, a pv version of workload submission backend
implemented with engine submission data in the shared memory and meanwhile
eliminating execlists csb process and context switch interrupt in
submisision routine to improve efficiency and reduce complexity.
Based on the experiment, small workloads such as glmark2 and Antutu 3D
benchmark can get benefit for these PV featuers at least 10% performance
gain. for large workload such as media and 3D, it get some benefit,
but not much.
[1]: https://patchwork.kernel.org/cover/11148059/
Xiaolin Zhang (12):
drm/i915: introduced vgpu pv capability
drm/i915: vgpu shared memory setup for pv support
drm/i915: vgpu pv command buffer transport protocol
drm/i915: vgpu ppgtt page table pv support
drm/i915: vgpu ggtt page table pv support
drm/i915: vgpu workload submisison pv support
drm/i915/gvt: GVTg expose pv_caps PVINFO register
drm/i915/gvt: GVTg handle guest shared_page setup
drm/i915/gvt: GVTg support vgpu pv CTB protocol
drm/i915/gvt: GVTg support ppgtt pv operations
drm/i915/gvt: GVTg support ggtt pv operations
drm/i915/gvt: GVTg support pv workload submssion
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 4 +-
drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +
drivers/gpu/drm/i915/gvt/gtt.c | 255 ++++++++++++++
drivers/gpu/drm/i915/gvt/gtt.h | 4 +
drivers/gpu/drm/i915/gvt/gvt.h | 17 +-
drivers/gpu/drm/i915/gvt/handlers.c | 274 ++++++++++++++-
drivers/gpu/drm/i915/gvt/vgpu.c | 47 +++
drivers/gpu/drm/i915/i915_debugfs.c | 3 +
drivers/gpu/drm/i915/i915_drv.c | 2 +
drivers/gpu/drm/i915/i915_drv.h | 5 +-
drivers/gpu/drm/i915/i915_gem.c | 4 +-
drivers/gpu/drm/i915/i915_pvinfo.h | 9 +-
drivers/gpu/drm/i915/i915_vgpu.c | 533 ++++++++++++++++++++++++++++-
drivers/gpu/drm/i915/i915_vgpu.h | 122 +++++++
drivers/gpu/drm/i915/intel_pv_submission.c | 324 ++++++++++++++++++
16 files changed, 1599 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_pv_submission.c
--
2.7.4
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next reply other threads:[~2020-09-07 0:55 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-04 16:21 Xiaolin Zhang [this message]
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 01/12] drm/i915: introduced vgpu pv capability Xiaolin Zhang
2020-09-10 13:10 ` Jani Nikula
2020-09-21 5:37 ` Zhang, Xiaolin
2020-09-10 13:10 ` Jani Nikula
2020-09-21 5:24 ` Zhang, Xiaolin
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 02/12] drm/i915: vgpu shared memory setup for pv support Xiaolin Zhang
2020-09-10 13:16 ` Jani Nikula
2020-09-21 5:27 ` Zhang, Xiaolin
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 03/12] drm/i915: vgpu pv command buffer transport protocol Xiaolin Zhang
2020-09-10 13:20 ` Jani Nikula
2020-09-21 5:33 ` Zhang, Xiaolin
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 04/12] drm/i915: vgpu ppgtt page table pv support Xiaolin Zhang
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 05/12] drm/i915: vgpu ggtt " Xiaolin Zhang
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 06/12] drm/i915: vgpu workload submisison " Xiaolin Zhang
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 07/12] drm/i915/gvt: GVTg expose pv_caps PVINFO register Xiaolin Zhang
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 08/12] drm/i915/gvt: GVTg handle guest shared_page setup Xiaolin Zhang
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 09/12] drm/i915/gvt: GVTg support vgpu pv CTB protocol Xiaolin Zhang
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 10/12] drm/i915/gvt: GVTg support ppgtt pv operations Xiaolin Zhang
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 11/12] drm/i915/gvt: GVTg support ggtt " Xiaolin Zhang
2020-09-04 16:21 ` [Intel-gfx] [PATCH v1 12/12] drm/i915/gvt: GVTg support pv workload submssion Xiaolin Zhang
2020-09-07 1:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for enhanced i915 vgpu with PV feature support Patchwork
2020-09-07 1:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-09-07 1:15 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-09-07 1:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-07 7:24 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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