From: Michal Wajdeczko <michal.wajdeczko@intel.com>
To: Jonathan Cavitt <jonathan.cavitt@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: matthew.d.roper@intel.com, janusz.krzysztofik@intel.com,
nirmoy.das@intel.com, andi.shyti@intel.com,
chris.p.wilson@linux.intel.com
Subject: Re: [Intel-gfx] [PATCH dii-client v6 1/5] drm/i915: Add GuC TLB Invalidation pci flags
Date: Thu, 5 Oct 2023 00:27:38 +0200 [thread overview]
Message-ID: <16079d61-0fb7-6f2c-b36c-df2a704a2a98@intel.com> (raw)
In-Reply-To: <20231004220739.1313307-2-jonathan.cavitt@intel.com>
On 05.10.2023 00:07, Jonathan Cavitt wrote:
> Add pci (device info) flags for if GuC TLB Invalidation is enabled.
nit: maybe avoid using "PCI flag" term here (and in the title) as this
could be little misleading - better stick to "device info flag"
>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/intel_device_info.h | 3 ++-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index cb60fc9cf8737..c53c5586c40c8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -801,4 +801,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
> GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
>
> +#define HAS_GUC_TLB_INVALIDATION(i915) (INTEL_INFO(i915)->has_guc_tlb_invalidation)
> #endif
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 39817490b13fd..ad54db0a22470 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -173,7 +173,8 @@ enum intel_ppgtt_type {
> func(has_coherent_ggtt); \
> func(tuning_thread_rr_after_dep); \
> func(unfenced_needs_alignment); \
> - func(hws_needs_physical);
> + func(hws_needs_physical); \
> + func(has_guc_tlb_invalidation);
nit: there is already another "has_guc_deprivilege" flag so maybe we
want to keep all GuC flags together ?
>
> struct intel_ip_version {
> u8 ver;
next prev parent reply other threads:[~2023-10-04 22:27 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-04 22:07 [Intel-gfx] [PATCH dii-client v6 0/5] Subject: [PATCH dii-client v6 0/4] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-04 22:07 ` [Intel-gfx] [PATCH dii-client v6 1/5] drm/i915: Add GuC TLB Invalidation pci flags Jonathan Cavitt
2023-10-04 22:27 ` Michal Wajdeczko [this message]
2023-10-05 13:15 ` Jani Nikula
2023-10-04 22:07 ` [Intel-gfx] [PATCH dii-client v6 1/4] drm/i915: Add GuC TLB Invalidation pci tags Jonathan Cavitt
2023-10-04 22:07 ` [Intel-gfx] [PATCH dii-client v6 2/5] drm/i915: Define and use GuC and CTB TLB invalidation routines Jonathan Cavitt
2023-10-04 22:48 ` Michal Wajdeczko
2023-10-05 13:58 ` Andi Shyti
2023-10-04 22:07 ` [Intel-gfx] [PATCH dii-client v6 3/5] drm/i915: No TLB invalidation on wedged or suspended GT Jonathan Cavitt
2023-10-04 22:07 ` [Intel-gfx] [PATCH dii-client v6 4/5] drm/i915/gt: Increase sleep in gt_tlb selftest sanitycheck Jonathan Cavitt
2023-10-04 22:07 ` [Intel-gfx] [PATCH dii-client v6 5/5] drm/i915: Enable GuC TLB invalidations for MTL Jonathan Cavitt
2023-10-05 2:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Subject: [PATCH dii-client v6 0/4] drm/i915: Define and use GuC and CTB TLB invalidation routines Patchwork
2023-10-05 2:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-10-05 3:16 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-10-05 13:00 ` Andi Shyti
2023-10-05 13:03 ` Andi Shyti
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