From: Patchwork <patchwork@emeril.freedesktop.org>
To: fei.yang@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/guc: Define CTB based TLB invalidation routines
Date: Wed, 21 Sep 2022 09:03:54 -0000 [thread overview]
Message-ID: <166375103495.11599.7729966858256645377@emeril.freedesktop.org> (raw)
In-Reply-To: <20220921074901.3651252-1-fei.yang@intel.com>
== Series Details ==
Series: series starting with [1/4] drm/i915/guc: Define CTB based TLB invalidation routines
URL : https://patchwork.freedesktop.org/series/108818/
State : warning
== Summary ==
Error: dim checkpatch failed
16cae73d9bcf drm/i915/guc: Define CTB based TLB invalidation routines
-:9: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#9:
v8: split from "drm/i915/xehpsdv: Define GuC Based TLB invalidation routines"
-:162: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#162: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc.c:929:
+ drm_err(&guc_to_gt(guc)->i915->drm,
+ "tlb invalidation response timed out for seqno %u\n", seqno);
-:326: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'guc' - possible side-effects?
#326: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h:480:
+#define INTEL_GUC_SUPPORTS_TLB_INVALIDATION(guc) \
+ ((intel_guc_ct_enabled(&(guc)->ct)) && \
+ (intel_guc_submission_is_used(guc)) && \
+ (GRAPHICS_VER(guc_to_gt((guc))->i915) >= 12))
total: 0 errors, 1 warnings, 2 checks, 407 lines checked
c0c9221f611f drm/i915/xehpsdv: Define GuC Based full TLB invalidation routine
-:12: WARNING:BAD_SIGN_OFF: Non-standard signature: 'Singed-off-by:' - perhaps 'Signed-off-by:'?
#12:
Singed-off-by: Fei Yang <fei.yang@intel.com>
total: 0 errors, 1 warnings, 0 checks, 41 lines checked
51b831d8101d drm/i915: Add support for GuC tlb invalidation
f984547c7ae1 drm/i915/guc: enable GuC GGTT invalidation from the start
next prev parent reply other threads:[~2022-09-21 9:03 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-21 7:48 [Intel-gfx] [PATCH 1/4] drm/i915/guc: Define CTB based TLB invalidation routines fei.yang
2022-09-21 7:48 ` [Intel-gfx] [PATCH 2/4] drm/i915/xehpsdv: Define GuC Based full TLB invalidation routine fei.yang
2022-09-21 7:49 ` [Intel-gfx] [PATCH 3/4] drm/i915: Add support for GuC tlb invalidation fei.yang
2022-09-21 7:49 ` [Intel-gfx] [PATCH 4/4] drm/i915/guc: enable GuC GGTT invalidation from the start fei.yang
2022-09-21 9:03 ` Patchwork [this message]
2022-09-21 9:03 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/guc: Define CTB based TLB invalidation routines Patchwork
2022-09-21 9:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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