* [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
@ 2023-07-21 14:05 Jonathan Cavitt
2023-07-21 14:05 ` [Intel-gfx] [PATCH dii-client 2/2] drm/i915/gt: Apply workaround 22016122933 correctly Jonathan Cavitt
` (6 more replies)
0 siblings, 7 replies; 15+ messages in thread
From: Jonathan Cavitt @ 2023-07-21 14:05 UTC (permalink / raw)
To: intel-gfx
Cc: andi.shyti, matthew.d.roper, jonathan.cavitt, chris.p.wilson,
nirmoy.das
Refactor i915_coherent_map_type to be GT-centric rather than
device-centric. Each GT may require different coherency
handling due to hardware workarounds.
Suggested-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 6 +++---
.../gpu/drm/i915/gem/selftests/i915_gem_migrate.c | 12 ++++++------
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gtt.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ring.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_context.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
drivers/gpu/drm/i915/gt/shmem_utils.c | 6 +++---
drivers/gpu/drm/i915/gt/shmem_utils.h | 4 +++-
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 3 +--
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 3 +--
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 2 +-
drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c | 2 +-
drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 2 +-
drivers/gpu/drm/i915/selftests/igt_spinner.c | 2 +-
21 files changed, 34 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
index ad0405375881..71da83f7e98b 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
@@ -632,7 +632,7 @@ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915,
return PTR_ERR(obj);
}
- cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
+ cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt, obj, true));
if (IS_ERR(cmd_in)) {
drm_err(&i915->drm, "Failed to map gsc message page!\n");
err = PTR_ERR(cmd_in);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 884a17275b3a..06220494d246 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -716,7 +716,7 @@ void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
enum i915_map_type type);
-enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
+enum i915_map_type i915_coherent_map_type(struct intel_gt *gt,
struct drm_i915_gem_object *obj,
bool always_coherent);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 89fc8ea6bcfc..44d93ead96ff 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -465,16 +465,16 @@ void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
return ret;
}
-enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
+enum i915_map_type i915_coherent_map_type(struct intel_gt *gt,
struct drm_i915_gem_object *obj,
bool always_coherent)
{
/*
* Wa_22016122933: always return I915_MAP_WC for MTL
*/
- if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
+ if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
return I915_MAP_WC;
- if (HAS_LLC(i915) || always_coherent)
+ if (HAS_LLC(gt->i915) || always_coherent)
return I915_MAP_WB;
else
return I915_MAP_WC;
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
index a93a90b15907..1ad18a872750 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
@@ -13,12 +13,12 @@
#include "selftests/igt_spinner.h"
static int igt_fill_check_buffer(struct drm_i915_gem_object *obj,
+ struct intel_gt *gt,
bool fill)
{
- struct drm_i915_private *i915 = to_i915(obj->base.dev);
unsigned int i, count = obj->base.size / sizeof(u32);
enum i915_map_type map_type =
- i915_coherent_map_type(i915, obj, false);
+ i915_coherent_map_type(gt, obj, false);
u32 *cur;
int err = 0;
@@ -66,7 +66,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
if (err)
continue;
- err = igt_fill_check_buffer(obj, true);
+ err = igt_fill_check_buffer(obj, gt, true);
if (err)
continue;
@@ -86,7 +86,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
if (err)
continue;
- err = igt_fill_check_buffer(obj, false);
+ err = igt_fill_check_buffer(obj, gt, false);
}
i915_gem_object_put(obj);
@@ -233,7 +233,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
continue;
if (!vma) {
- err = igt_fill_check_buffer(obj, true);
+ err = igt_fill_check_buffer(obj, gt, true);
if (err)
continue;
}
@@ -276,7 +276,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
if (err)
goto out_unlock;
} else {
- err = igt_fill_check_buffer(obj, false);
+ err = igt_fill_check_buffer(obj, gt, false);
}
out_unlock:
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 21af0ec52223..4cc9c5b8d28e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -39,7 +39,7 @@ static void dbg_poison_ce(struct intel_context *ce)
if (ce->state) {
struct drm_i915_gem_object *obj = ce->state->obj;
- int type = i915_coherent_map_type(ce->engine->i915, obj, true);
+ int type = i915_coherent_map_type(ce->engine->gt, obj, true);
void *map;
if (!i915_gem_object_trylock(obj, NULL))
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 9f64d61dd5fc..aaa282b0725a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -591,7 +591,7 @@ static int __engines_record_defaults(struct intel_gt *gt)
continue;
/* Keep a copy of the state's backing pages; free the obj */
- state = shmem_create_from_object(rq->context->state->obj);
+ state = shmem_create_from_object(rq->context->state->obj, gt);
if (IS_ERR(state)) {
err = PTR_ERR(state);
goto out;
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 731d9f2bbc56..48f3a30dbc99 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -89,7 +89,7 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
enum i915_map_type type;
void *vaddr;
- type = i915_coherent_map_type(vm->i915, obj, true);
+ type = i915_coherent_map_type(vm->gt, obj, true);
vaddr = i915_gem_object_pin_map_unlocked(obj, type);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
@@ -103,7 +103,7 @@ int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object
enum i915_map_type type;
void *vaddr;
- type = i915_coherent_map_type(vm->i915, obj, true);
+ type = i915_coherent_map_type(vm->gt, obj, true);
vaddr = i915_gem_object_pin_map(obj, type);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 1b710102390b..c45e6d8cbaac 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1191,7 +1191,7 @@ lrc_pre_pin(struct intel_context *ce,
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
*vaddr = i915_gem_object_pin_map(ce->state->obj,
- i915_coherent_map_type(ce->engine->i915,
+ i915_coherent_map_type(ce->engine->gt,
ce->state->obj,
false) |
I915_MAP_OVERRIDE);
diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
index fb99143be98e..a058532cc1b8 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring.c
@@ -56,7 +56,7 @@ int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915)) {
addr = (void __force *)i915_vma_pin_iomap(vma);
} else {
- int type = i915_coherent_map_type(vma->vm->i915, vma->obj, false);
+ int type = i915_coherent_map_type(vma->vm->gt, vma->obj, false);
addr = i915_gem_object_pin_map(vma->obj, type);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
index 76fbae358072..87fad1bc15a0 100644
--- a/drivers/gpu/drm/i915/gt/selftest_context.c
+++ b/drivers/gpu/drm/i915/gt/selftest_context.c
@@ -88,7 +88,7 @@ static int __live_context_size(struct intel_engine_cs *engine)
goto err;
vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
- i915_coherent_map_type(engine->i915,
+ i915_coherent_map_type(engine->gt,
ce->state->obj, false));
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 8b0d84f2aad2..fdc0b565ee21 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -73,7 +73,7 @@ static int hang_init(struct hang *h, struct intel_gt *gt)
h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
vaddr = i915_gem_object_pin_map_unlocked(h->obj,
- i915_coherent_map_type(gt->i915, h->obj, false));
+ i915_coherent_map_type(gt, h->obj, false));
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_unpin_hws;
@@ -119,7 +119,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
return ERR_CAST(obj);
}
- vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, false));
+ vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt, obj, false));
if (IS_ERR(vaddr)) {
i915_gem_object_put(obj);
i915_vm_put(vm);
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index a78a3d2c2e16..3d1daeac4c0c 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -1292,7 +1292,7 @@ static int compare_isolation(struct intel_engine_cs *engine,
}
lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
- i915_coherent_map_type(engine->i915,
+ i915_coherent_map_type(engine->gt,
ce->state->obj,
false));
if (IS_ERR(lrc)) {
diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c b/drivers/gpu/drm/i915/gt/shmem_utils.c
index 449c9ed44382..3f2fea18746d 100644
--- a/drivers/gpu/drm/i915/gt/shmem_utils.c
+++ b/drivers/gpu/drm/i915/gt/shmem_utils.c
@@ -31,9 +31,9 @@ struct file *shmem_create_from_data(const char *name, void *data, size_t len)
return file;
}
-struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
+struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
+ struct intel_gt *gt)
{
- struct drm_i915_private *i915 = to_i915(obj->base.dev);
enum i915_map_type map_type;
struct file *file;
void *ptr;
@@ -44,7 +44,7 @@ struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
return file;
}
- map_type = i915_coherent_map_type(i915, obj, true);
+ map_type = i915_coherent_map_type(gt, obj, true);
ptr = i915_gem_object_pin_map_unlocked(obj, map_type);
if (IS_ERR(ptr))
return ERR_CAST(ptr);
diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.h b/drivers/gpu/drm/i915/gt/shmem_utils.h
index b2b04d88c6e5..743a56307216 100644
--- a/drivers/gpu/drm/i915/gt/shmem_utils.h
+++ b/drivers/gpu/drm/i915/gt/shmem_utils.h
@@ -11,9 +11,11 @@
struct iosys_map;
struct drm_i915_gem_object;
struct file;
+struct intel_gt;
struct file *shmem_create_from_data(const char *name, void *data, size_t len);
-struct file *shmem_create_from_object(struct drm_i915_gem_object *obj);
+struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
+ struct intel_gt *gt);
void *shmem_pin_map(struct file *file);
void shmem_unpin_map(struct file *file, void *ptr);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
index ab1a456f833d..fb4933543f31 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
@@ -268,7 +268,6 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
{
struct intel_gt *gt = gsc_uc_to_gt(gsc);
- struct drm_i915_private *i915 = gt->i915;
void *src;
if (!gsc->local)
@@ -278,7 +277,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
return -ENOSPC;
src = i915_gem_object_pin_map_unlocked(gsc->fw.obj,
- i915_coherent_map_type(i915, gsc->fw.obj, true));
+ i915_coherent_map_type(gt, gsc->fw.obj, true));
if (IS_ERR(src))
return PTR_ERR(src);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 2eb891b270ae..effb37727093 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -792,7 +792,7 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
return PTR_ERR(vma);
vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
- i915_coherent_map_type(guc_to_gt(guc)->i915,
+ i915_coherent_map_type(guc_to_gt(guc),
vma->obj, true));
if (IS_ERR(vaddr)) {
i915_vma_unpin_and_release(&vma, 0);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
index 48f506a26e6d..ca95ddadc3a8 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
@@ -27,7 +27,6 @@ struct mtl_huc_auth_msg_out {
int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
{
struct intel_gt *gt = huc_to_gt(huc);
- struct drm_i915_private *i915 = gt->i915;
struct drm_i915_gem_object *obj;
struct mtl_huc_auth_msg_in *msg_in;
struct mtl_huc_auth_msg_out *msg_out;
@@ -43,7 +42,7 @@ int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
pkt_offset = i915_ggtt_offset(huc->heci_pkt);
pkt_vaddr = i915_gem_object_pin_map_unlocked(obj,
- i915_coherent_map_type(i915, obj, true));
+ i915_coherent_map_type(gt, obj, true));
if (IS_ERR(pkt_vaddr))
return PTR_ERR(pkt_vaddr);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 7aadad5639c3..4f316f010b55 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -1213,7 +1213,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
return PTR_ERR(vma);
vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
- i915_coherent_map_type(gt->i915, vma->obj, true));
+ i915_coherent_map_type(gt, vma->obj, true));
if (IS_ERR(vaddr)) {
i915_vma_unpin_and_release(&vma, 0);
err = PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
index c7df47364013..8b5d3d129881 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
@@ -336,7 +336,7 @@ gsccs_create_buffer(struct intel_gt *gt,
}
/* return a virtual pointer */
- *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
+ *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt, obj, true));
if (IS_ERR(*map)) {
drm_err(&i915->drm, "Failed to map gsccs backend %s.\n", bufname);
err = PTR_ERR(*map);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
index 1ce07d7e8769..00630a1c8e77 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -245,7 +245,7 @@ static int alloc_streaming_command(struct intel_pxp *pxp)
}
/* map the lmem into the virtual memory pointer */
- cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
+ cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(pxp->ctrl_gt, obj, true));
if (IS_ERR(cmd)) {
drm_err(&i915->drm, "Failed to map gsc message page!\n");
err = PTR_ERR(cmd);
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 618d9386d554..b09e56427299 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -97,7 +97,7 @@ int igt_spinner_pin(struct igt_spinner *spin,
if (!spin->batch) {
unsigned int mode;
- mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
+ mode = i915_coherent_map_type(spin->gt, spin->obj, false);
vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, &spin->batch_vma);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH dii-client 2/2] drm/i915/gt: Apply workaround 22016122933 correctly
2023-07-21 14:05 [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric Jonathan Cavitt
@ 2023-07-21 14:05 ` Jonathan Cavitt
2023-07-21 17:11 ` Yang, Fei
2023-07-24 10:24 ` Tvrtko Ursulin
2023-07-21 15:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [dii-client,1/2] drm/i915: Make i915_coherent_map_type GT-centric Patchwork
` (5 subsequent siblings)
6 siblings, 2 replies; 15+ messages in thread
From: Jonathan Cavitt @ 2023-07-21 14:05 UTC (permalink / raw)
To: intel-gfx
Cc: andi.shyti, matthew.d.roper, jonathan.cavitt, chris.p.wilson,
nirmoy.das
WA_22016122933 was recently applied to all MeteorLake engines, which is
simultaneously too broad (should only apply to Media engines) and too
specific (should apply to all platforms that use the same media engine
as MeteorLake). Correct this in cases where coherency settings are
modified.
There were also two additional places where the workaround was applied
unconditionally. The change was confirmed as necessary for all
platforms, so the workaround label was removed.
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Suggested-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 5 +++--
drivers/gpu/drm/i915/gt/intel_gt.h | 6 ++++++
drivers/gpu/drm/i915/gt/intel_lrc.c | 7 ++++---
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 4 ----
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 7 ++++---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 4 ----
6 files changed, 17 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 44d93ead96ff..4acdd008d1d3 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -470,9 +470,10 @@ enum i915_map_type i915_coherent_map_type(struct intel_gt *gt,
bool always_coherent)
{
/*
- * Wa_22016122933: always return I915_MAP_WC for MTL
+ * Wa_22016122933: always return I915_MAP_WC for Media
+ * version 13.0 when the object is on the Media GT
*/
- if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
+ if (i915_gem_object_is_lmem(obj) || intel_gt_needs_wa_22016122933(gt))
return I915_MAP_WC;
if (HAS_LLC(gt->i915) || always_coherent)
return I915_MAP_WB;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index d2f4fbde5f9f..4eb41a3b6e8b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -6,6 +6,7 @@
#ifndef __INTEL_GT__
#define __INTEL_GT__
+#include "i915_drv.h"
#include "intel_engine_types.h"
#include "intel_gt_types.h"
#include "intel_reset.h"
@@ -24,6 +25,11 @@ static inline bool gt_is_root(struct intel_gt *gt)
return !gt->info.id;
}
+static inline bool intel_gt_needs_wa_22016122933(struct intel_gt *gt)
+{
+ return MEDIA_VER_FULL(gt->i915) == IP_VER(13, 0) && gt->type == GT_MEDIA;
+}
+
static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
{
return container_of(uc, struct intel_gt, uc);
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index c45e6d8cbaac..668ed3fc7076 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1095,10 +1095,11 @@ __lrc_alloc_state(struct intel_context *ce, struct intel_engine_cs *engine)
if (IS_ERR(obj)) {
obj = i915_gem_object_create_shmem(engine->i915, context_size);
/*
- * Wa_22016122933: For MTL the shared memory needs to be mapped
- * as WC on CPU side and UC (PAT index 2) on GPU side
+ * Wa_22016122933: For Media version 13.0, all Media GT shared
+ * memory needs to be mapped as WC on CPU side and UC (PAT
+ * index 2) on GPU side.
*/
- if (IS_METEORLAKE(engine->i915))
+ if (intel_gt_needs_wa_22016122933(engine->gt))
i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
}
if (IS_ERR(obj))
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
index fb4933543f31..1093b47d3e06 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
@@ -284,10 +284,6 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
memcpy_toio(gsc->local_vaddr, src, gsc->fw.size);
memset_io(gsc->local_vaddr + gsc->fw.size, 0, gsc->local->size - gsc->fw.size);
- /*
- * Wa_22016122933: Making sure the data in dst is
- * visible to GSC right away
- */
intel_guc_write_barrier(>->uc.guc);
i915_gem_object_unpin_map(gsc->fw.obj);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index effb37727093..0000846f6029 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -745,10 +745,11 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
return ERR_CAST(obj);
/*
- * Wa_22016122933: For MTL the shared memory needs to be mapped
- * as WC on CPU side and UC (PAT index 2) on GPU side
+ * Wa_22016122933: For Media version 13.0, all Media GT shared
+ * memory needs to be mapped as WC on CPU side and UC (PAT
+ * index 2) on GPU side.
*/
- if (IS_METEORLAKE(gt->i915))
+ if (intel_gt_needs_wa_22016122933(gt))
i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
vma = i915_vma_instance(obj, >->ggtt->vm, NULL);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index f28a3a83742d..97eadd08181d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -960,10 +960,6 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg)
/* now update descriptor */
WRITE_ONCE(desc->head, head);
- /*
- * Wa_22016122933: Making sure the head update is
- * visible to GuC right away
- */
intel_guc_write_barrier(ct_to_guc(ct));
return available - len;
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [dii-client,1/2] drm/i915: Make i915_coherent_map_type GT-centric
2023-07-21 14:05 [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric Jonathan Cavitt
2023-07-21 14:05 ` [Intel-gfx] [PATCH dii-client 2/2] drm/i915/gt: Apply workaround 22016122933 correctly Jonathan Cavitt
@ 2023-07-21 15:17 ` Patchwork
2023-07-21 15:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (4 subsequent siblings)
6 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2023-07-21 15:17 UTC (permalink / raw)
To: Jonathan Cavitt; +Cc: intel-gfx
== Series Details ==
Series: series starting with [dii-client,1/2] drm/i915: Make i915_coherent_map_type GT-centric
URL : https://patchwork.freedesktop.org/series/121133/
State : warning
== Summary ==
Error: dim checkpatch failed
20d96369b3a6 drm/i915: Make i915_coherent_map_type GT-centric
-:372: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#372: FILE: drivers/gpu/drm/i915/pxp/intel_pxp_tee.c:248:
+ cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(pxp->ctrl_gt, obj, true));
total: 0 errors, 1 warnings, 0 checks, 262 lines checked
c4794405dd4d drm/i915/gt: Apply workaround 22016122933 correctly
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [dii-client,1/2] drm/i915: Make i915_coherent_map_type GT-centric
2023-07-21 14:05 [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric Jonathan Cavitt
2023-07-21 14:05 ` [Intel-gfx] [PATCH dii-client 2/2] drm/i915/gt: Apply workaround 22016122933 correctly Jonathan Cavitt
2023-07-21 15:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [dii-client,1/2] drm/i915: Make i915_coherent_map_type GT-centric Patchwork
@ 2023-07-21 15:17 ` Patchwork
2023-07-21 15:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2023-07-21 15:17 UTC (permalink / raw)
To: Jonathan Cavitt; +Cc: intel-gfx
== Series Details ==
Series: series starting with [dii-client,1/2] drm/i915: Make i915_coherent_map_type GT-centric
URL : https://patchwork.freedesktop.org/series/121133/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [dii-client,1/2] drm/i915: Make i915_coherent_map_type GT-centric
2023-07-21 14:05 [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric Jonathan Cavitt
` (2 preceding siblings ...)
2023-07-21 15:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2023-07-21 15:33 ` Patchwork
2023-07-21 17:05 ` [Intel-gfx] [PATCH dii-client 1/2] " Yang, Fei
` (2 subsequent siblings)
6 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2023-07-21 15:33 UTC (permalink / raw)
To: Jonathan Cavitt; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7739 bytes --]
== Series Details ==
Series: series starting with [dii-client,1/2] drm/i915: Make i915_coherent_map_type GT-centric
URL : https://patchwork.freedesktop.org/series/121133/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13404 -> Patchwork_121133v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_121133v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_121133v1, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/index.html
Participating hosts (42 -> 42)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_121133v1:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-tgl-1115g4: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/fi-tgl-1115g4/igt@gem_exec_fence@basic-busy@bcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/fi-tgl-1115g4/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_exec_fence@basic-busy@vecs0:
- fi-tgl-1115g4: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/fi-tgl-1115g4/igt@gem_exec_fence@basic-busy@vecs0.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/fi-tgl-1115g4/igt@gem_exec_fence@basic-busy@vecs0.html
Known issues
------------
Here are the changes found in Patchwork_121133v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@gt_pm:
- bat-rpls-2: [PASS][5] -> [DMESG-FAIL][6] ([i915#4258] / [i915#7913])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@migrate:
- bat-dg2-11: [PASS][7] -> [DMESG-WARN][8] ([i915#7699])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/bat-dg2-11/igt@i915_selftest@live@migrate.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-dg2-11/igt@i915_selftest@live@migrate.html
- bat-atsm-1: [PASS][9] -> [DMESG-FAIL][10] ([i915#7699] / [i915#7913])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/bat-atsm-1/igt@i915_selftest@live@migrate.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-atsm-1/igt@i915_selftest@live@migrate.html
* igt@i915_selftest@live@requests:
- bat-rpls-1: [PASS][11] -> [ABORT][12] ([i915#4983] / [i915#7911] / [i915#7920])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/bat-rpls-1/igt@i915_selftest@live@requests.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-rpls-1/igt@i915_selftest@live@requests.html
* igt@i915_selftest@live@slpc:
- bat-mtlp-8: [PASS][13] -> [DMESG-WARN][14] ([i915#6367])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/bat-mtlp-8/igt@i915_selftest@live@slpc.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-mtlp-8/igt@i915_selftest@live@slpc.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#7828])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-mtlp-8/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence:
- bat-adlp-9: NOTRUN -> [SKIP][16] ([i915#3546]) +2 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-adlp-9/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html
* igt@kms_psr@primary_mmap_gtt:
- bat-rplp-1: NOTRUN -> [SKIP][17] ([i915#1072]) +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-rplp-1/igt@kms_psr@primary_mmap_gtt.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-rplp-1: NOTRUN -> [ABORT][18] ([i915#8260] / [i915#8668])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-rplp-1/igt@kms_setmode@basic-clone-single-crtc.html
#### Warnings ####
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-cfl-8700k: [FAIL][19] ([i915#7691]) -> [FAIL][20] ([i915#7940])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/fi-cfl-8700k/igt@i915_pm_rpm@basic-pci-d3-state.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/fi-cfl-8700k/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_selftest@live@execlists:
- fi-bsw-n3050: [ABORT][21] ([i915#7913]) -> [ABORT][22] ([i915#7911] / [i915#7913])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/fi-bsw-n3050/igt@i915_selftest@live@execlists.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-mtlp-8: [ABORT][23] -> [SKIP][24] ([i915#6645])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/bat-mtlp-8/igt@i915_suspend@basic-s3-without-i915.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-mtlp-8/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_psr@cursor_plane_move:
- bat-rplp-1: [ABORT][25] ([i915#8434] / [i915#8668]) -> [SKIP][26] ([i915#1072])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13404/bat-rplp-1/igt@kms_psr@cursor_plane_move.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/bat-rplp-1/igt@kms_psr@cursor_plane_move.html
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#7691]: https://gitlab.freedesktop.org/drm/intel/issues/7691
[i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
[i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
[i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
[i915#7940]: https://gitlab.freedesktop.org/drm/intel/issues/7940
[i915#8260]: https://gitlab.freedesktop.org/drm/intel/issues/8260
[i915#8434]: https://gitlab.freedesktop.org/drm/intel/issues/8434
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
Build changes
-------------
* Linux: CI_DRM_13404 -> Patchwork_121133v1
CI-20190529: 20190529
CI_DRM_13404: 526f3e5b744ee37c2fd643a2efec898a1f967d36 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7398: 602cdd3c87fad86cab8b15fe4242f2a119ce48df @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_121133v1: 526f3e5b744ee37c2fd643a2efec898a1f967d36 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
f66b13da3daa drm/i915/gt: Apply workaround 22016122933 correctly
a9f14f2c374f drm/i915: Make i915_coherent_map_type GT-centric
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121133v1/index.html
[-- Attachment #2: Type: text/html, Size: 9187 bytes --]
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
2023-07-21 14:05 [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric Jonathan Cavitt
` (3 preceding siblings ...)
2023-07-21 15:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2023-07-21 17:05 ` Yang, Fei
2023-07-24 10:52 ` Tvrtko Ursulin
2023-07-25 13:23 ` Andi Shyti
6 siblings, 0 replies; 15+ messages in thread
From: Yang, Fei @ 2023-07-21 17:05 UTC (permalink / raw)
To: Cavitt, Jonathan, intel-gfx@lists.freedesktop.org
Cc: Shyti, Andi, chris.p.wilson@linux.intel.com, Roper, Matthew D,
Das, Nirmoy
> Refactor i915_coherent_map_type to be GT-centric rather than device-centric. Each GT may require different coherency handling due to hardware workarounds.
>
> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Acked-by: Fei Yang <fei.yang@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 2 +-
> drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 +-
> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 6 +++---
> .../gpu/drm/i915/gem/selftests/i915_gem_migrate.c | 12 ++++++------
> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_gtt.c | 4 ++--
> drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_ring.c | 2 +-
> drivers/gpu/drm/i915/gt/selftest_context.c | 2 +-
> drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
> drivers/gpu/drm/i915/gt/shmem_utils.c | 6 +++---
> drivers/gpu/drm/i915/gt/shmem_utils.h | 4 +++-
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 3 +--
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 3 +--
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 2 +-
> drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c | 2 +-
> drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 2 +-
> drivers/gpu/drm/i915/selftests/igt_spinner.c | 2 +-
> 21 files changed, 34 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> index ad0405375881..71da83f7e98b 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> @@ -632,7 +632,7 @@ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915,
> return PTR_ERR(obj);
> }
>
> - cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + cmd_in = i915_gem_object_pin_map_unlocked(obj,
> +i915_coherent_map_type(gt, obj, true));
> if (IS_ERR(cmd_in)) {
> drm_err(&i915->drm, "Failed to map gsc message page!\n");
> err = PTR_ERR(cmd_in);
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> index 884a17275b3a..06220494d246 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> @@ -716,7 +716,7 @@ void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj, void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
> enum i915_map_type type);
>
> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> +enum i915_map_type i915_coherent_map_type(struct intel_gt *gt,
> struct drm_i915_gem_object *obj,
> bool always_coherent);
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> index 89fc8ea6bcfc..44d93ead96ff 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> @@ -465,16 +465,16 @@ void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
> return ret;
> }
>
> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> +enum i915_map_type i915_coherent_map_type(struct intel_gt *gt,
> struct drm_i915_gem_object *obj,
> bool always_coherent)
> {
> /*
> * Wa_22016122933: always return I915_MAP_WC for MTL
> */
> - if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
> + if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
> return I915_MAP_WC;
> - if (HAS_LLC(i915) || always_coherent)
> + if (HAS_LLC(gt->i915) || always_coherent)
> return I915_MAP_WB;
> else
> return I915_MAP_WC;
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> index a93a90b15907..1ad18a872750 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> @@ -13,12 +13,12 @@
> #include "selftests/igt_spinner.h"
>
> static int igt_fill_check_buffer(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt,
> bool fill)
> {
> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> unsigned int i, count = obj->base.size / sizeof(u32);
> enum i915_map_type map_type =
> - i915_coherent_map_type(i915, obj, false);
> + i915_coherent_map_type(gt, obj, false);
> u32 *cur;
> int err = 0;
>
> @@ -66,7 +66,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
> if (err)
> continue;
>
> - err = igt_fill_check_buffer(obj, true);
> + err = igt_fill_check_buffer(obj, gt, true);
> if (err)
> continue;
>
> @@ -86,7 +86,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
> if (err)
> continue;
>
> - err = igt_fill_check_buffer(obj, false);
> + err = igt_fill_check_buffer(obj, gt, false);
> }
> i915_gem_object_put(obj);
>
> @@ -233,7 +233,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
> continue;
>
> if (!vma) {
> - err = igt_fill_check_buffer(obj, true);
> + err = igt_fill_check_buffer(obj, gt, true);
> if (err)
> continue;
> }
> @@ -276,7 +276,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
> if (err)
> goto out_unlock;
> } else {
> - err = igt_fill_check_buffer(obj, false);
> + err = igt_fill_check_buffer(obj, gt, false);
> }
>
> out_unlock:
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> index 21af0ec52223..4cc9c5b8d28e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> @@ -39,7 +39,7 @@ static void dbg_poison_ce(struct intel_context *ce)
>
> if (ce->state) {
> struct drm_i915_gem_object *obj = ce->state->obj;
> - int type = i915_coherent_map_type(ce->engine->i915, obj, true);
> + int type = i915_coherent_map_type(ce->engine->gt, obj, true);
> void *map;
>
> if (!i915_gem_object_trylock(obj, NULL)) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 9f64d61dd5fc..aaa282b0725a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -591,7 +591,7 @@ static int __engines_record_defaults(struct intel_gt *gt)
> continue;
>
> /* Keep a copy of the state's backing pages; free the obj */
> - state = shmem_create_from_object(rq->context->state->obj);
> + state = shmem_create_from_object(rq->context->state->obj, gt);
> if (IS_ERR(state)) {
> err = PTR_ERR(state);
> goto out;
> diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
> index 731d9f2bbc56..48f3a30dbc99 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
> @@ -89,7 +89,7 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
> enum i915_map_type type;
> void *vaddr;
>
> - type = i915_coherent_map_type(vm->i915, obj, true);
> + type = i915_coherent_map_type(vm->gt, obj, true);
> vaddr = i915_gem_object_pin_map_unlocked(obj, type);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
> @@ -103,7 +103,7 @@ int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object
> enum i915_map_type type;
> void *vaddr;
>
> - type = i915_coherent_map_type(vm->i915, obj, true);
> + type = i915_coherent_map_type(vm->gt, obj, true);
> vaddr = i915_gem_object_pin_map(obj, type);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 1b710102390b..c45e6d8cbaac 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1191,7 +1191,7 @@ lrc_pre_pin(struct intel_context *ce,
> GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
>
> *vaddr = i915_gem_object_pin_map(ce->state->obj,
> - i915_coherent_map_type(ce->engine->i915,
> + i915_coherent_map_type(ce->engine->gt,
> ce->state->obj,
> false) |
> I915_MAP_OVERRIDE);
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
> index fb99143be98e..a058532cc1b8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
> @@ -56,7 +56,7 @@ int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
> if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915)) {
> addr = (void __force *)i915_vma_pin_iomap(vma);
> } else {
> - int type = i915_coherent_map_type(vma->vm->i915, vma->obj, false);
> + int type = i915_coherent_map_type(vma->vm->gt, vma->obj, false);
>
> addr = i915_gem_object_pin_map(vma->obj, type);
> }
> diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
> index 76fbae358072..87fad1bc15a0 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_context.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_context.c
> @@ -88,7 +88,7 @@ static int __live_context_size(struct intel_engine_cs *engine)
> goto err;
>
> vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
> - i915_coherent_map_type(engine->i915,
> + i915_coherent_map_type(engine->gt,
> ce->state->obj, false));
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> index 8b0d84f2aad2..fdc0b565ee21 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> @@ -73,7 +73,7 @@ static int hang_init(struct hang *h, struct intel_gt *gt)
> h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
>
> vaddr = i915_gem_object_pin_map_unlocked(h->obj,
> - i915_coherent_map_type(gt->i915, h->obj, false));
> + i915_coherent_map_type(gt, h->obj, false));
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> goto err_unpin_hws;
> @@ -119,7 +119,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
> return ERR_CAST(obj);
> }
>
> - vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, false));
> + vaddr = i915_gem_object_pin_map_unlocked(obj,
> +i915_coherent_map_type(gt, obj, false));
> if (IS_ERR(vaddr)) {
> i915_gem_object_put(obj);
> i915_vm_put(vm);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index a78a3d2c2e16..3d1daeac4c0c 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -1292,7 +1292,7 @@ static int compare_isolation(struct intel_engine_cs *engine,
> }
>
> lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
> - i915_coherent_map_type(engine->i915,
> + i915_coherent_map_type(engine->gt,
> ce->state->obj,
> false));
> if (IS_ERR(lrc)) {
> diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c b/drivers/gpu/drm/i915/gt/shmem_utils.c
> index 449c9ed44382..3f2fea18746d 100644
> --- a/drivers/gpu/drm/i915/gt/shmem_utils.c
> +++ b/drivers/gpu/drm/i915/gt/shmem_utils.c
> @@ -31,9 +31,9 @@ struct file *shmem_create_from_data(const char *name, void *data, size_t len)
> return file;
> }
>
> -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
> +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt)
> {
> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> enum i915_map_type map_type;
> struct file *file;
> void *ptr;
> @@ -44,7 +44,7 @@ struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
> return file;
> }
>
> - map_type = i915_coherent_map_type(i915, obj, true);
> + map_type = i915_coherent_map_type(gt, obj, true);
> ptr = i915_gem_object_pin_map_unlocked(obj, map_type);
> if (IS_ERR(ptr))
> return ERR_CAST(ptr);
> diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.h b/drivers/gpu/drm/i915/gt/shmem_utils.h
> index b2b04d88c6e5..743a56307216 100644
> --- a/drivers/gpu/drm/i915/gt/shmem_utils.h
> +++ b/drivers/gpu/drm/i915/gt/shmem_utils.h
> @@ -11,9 +11,11 @@
> struct iosys_map;
> struct drm_i915_gem_object;
> struct file;
> +struct intel_gt;
>
> struct file *shmem_create_from_data(const char *name, void *data, size_t len); -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj);
> +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt);
>
> void *shmem_pin_map(struct file *file); void shmem_unpin_map(struct file *file, void *ptr); diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> index ab1a456f833d..fb4933543f31 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> @@ -268,7 +268,6 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc) static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc) {
> struct intel_gt *gt = gsc_uc_to_gt(gsc);
> - struct drm_i915_private *i915 = gt->i915;
> void *src;
>
> if (!gsc->local)
> @@ -278,7 +277,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> return -ENOSPC;
>
> src = i915_gem_object_pin_map_unlocked(gsc->fw.obj,
> - i915_coherent_map_type(i915, gsc->fw.obj, true));
> + i915_coherent_map_type(gt, gsc->fw.obj, true));
> if (IS_ERR(src))
> return PTR_ERR(src);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 2eb891b270ae..effb37727093 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -792,7 +792,7 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
> return PTR_ERR(vma);
>
> vaddr = i915_gem_object_pin_map_unlocked(vma->obj, > + i915_coherent_map_type(guc_to_gt(guc),
> vma->obj, true));
> if (IS_ERR(vaddr)) {
> i915_vma_unpin_and_release(&vma, 0);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> index 48f506a26e6d..ca95ddadc3a8 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> @@ -27,7 +27,6 @@ struct mtl_huc_auth_msg_out { int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc) {
> struct intel_gt *gt = huc_to_gt(huc);
> - struct drm_i915_private *i915 = gt->i915;
> struct drm_i915_gem_object *obj;
> struct mtl_huc_auth_msg_in *msg_in;
> struct mtl_huc_auth_msg_out *msg_out;
> @@ -43,7 +42,7 @@ int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
> pkt_offset = i915_ggtt_offset(huc->heci_pkt);
>
> pkt_vaddr = i915_gem_object_pin_map_unlocked(obj,
> - i915_coherent_map_type(i915, obj, true));
> + i915_coherent_map_type(gt, obj, true));
> if (IS_ERR(pkt_vaddr))
> return PTR_ERR(pkt_vaddr);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 7aadad5639c3..4f316f010b55 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -1213,7 +1213,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
> return PTR_ERR(vma);
>
> vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
> - i915_coherent_map_type(gt->i915, vma->obj, true));
> + i915_coherent_map_type(gt, vma->obj, true));
> if (IS_ERR(vaddr)) {
> i915_vma_unpin_and_release(&vma, 0);
> err = PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> index c7df47364013..8b5d3d129881 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> @@ -336,7 +336,7 @@ gsccs_create_buffer(struct intel_gt *gt,
> }
>
> /* return a virtual pointer */
> - *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + *map = i915_gem_object_pin_map_unlocked(obj,
> +i915_coherent_map_type(gt, obj, true));
> if (IS_ERR(*map)) {
> drm_err(&i915->drm, "Failed to map gsccs backend %s.\n", bufname);
> err = PTR_ERR(*map);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> index 1ce07d7e8769..00630a1c8e77 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> @@ -245,7 +245,7 @@ static int alloc_streaming_command(struct intel_pxp *pxp)
> }
>
> /* map the lmem into the virtual memory pointer */
> - cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + cmd = i915_gem_object_pin_map_unlocked(obj,
> +i915_coherent_map_type(pxp->ctrl_gt, obj, true));
> if (IS_ERR(cmd)) {
> drm_err(&i915->drm, "Failed to map gsc message page!\n");
> err = PTR_ERR(cmd);
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> index 618d9386d554..b09e56427299 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> @@ -97,7 +97,7 @@ int igt_spinner_pin(struct igt_spinner *spin,
> if (!spin->batch) {
> unsigned int mode;
>
> - mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
> + mode = i915_coherent_map_type(spin->gt, spin->obj, false);
> vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, &spin->batch_vma);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH dii-client 2/2] drm/i915/gt: Apply workaround 22016122933 correctly
2023-07-21 14:05 ` [Intel-gfx] [PATCH dii-client 2/2] drm/i915/gt: Apply workaround 22016122933 correctly Jonathan Cavitt
@ 2023-07-21 17:11 ` Yang, Fei
2023-07-24 10:24 ` Tvrtko Ursulin
1 sibling, 0 replies; 15+ messages in thread
From: Yang, Fei @ 2023-07-21 17:11 UTC (permalink / raw)
To: Cavitt, Jonathan, intel-gfx@lists.freedesktop.org
Cc: Shyti, Andi, chris.p.wilson@linux.intel.com, Roper, Matthew D,
Das, Nirmoy
> WA_22016122933 was recently applied to all MeteorLake engines,
> which is simultaneously too broad (should only apply to Media
> engines) and too specific (should apply to all platforms that
> use the same media engine as MeteorLake). Correct this in
> cases where coherency settings are modified.
>
> There were also two additional places where the workaround was
> applied unconditionally. The change was confirmed as necessary
> for all platforms, so the workaround label was removed.
>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Fei Yang <fei.yang@intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 5 +++--
> drivers/gpu/drm/i915/gt/intel_gt.h | 6 ++++++
> drivers/gpu/drm/i915/gt/intel_lrc.c | 7 ++++---
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 4 ----
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 7 ++++---
> drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 4 ----
> 6 files changed, 17 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> index 44d93ead96ff..4acdd008d1d3 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> @@ -470,9 +470,10 @@ enum i915_map_type i915_coherent_map_type(struct intel_gt *gt,
> bool always_coherent)
> {
> /*
> - * Wa_22016122933: always return I915_MAP_WC for MTL
> + * Wa_22016122933: always return I915_MAP_WC for Media
> + * version 13.0 when the object is on the Media GT
> */
> - if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
> + if (i915_gem_object_is_lmem(obj) || intel_gt_needs_wa_22016122933(gt))
> return I915_MAP_WC;
> if (HAS_LLC(gt->i915) || always_coherent)
> return I915_MAP_WB;
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index d2f4fbde5f9f..4eb41a3b6e8b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -6,6 +6,7 @@
> #ifndef __INTEL_GT__
> #define __INTEL_GT__
>
> +#include "i915_drv.h"
> #include "intel_engine_types.h"
> #include "intel_gt_types.h"
> #include "intel_reset.h"
> @@ -24,6 +25,11 @@ static inline bool gt_is_root(struct intel_gt *gt)
> return !gt->info.id;
> }
>
> +static inline bool intel_gt_needs_wa_22016122933(struct intel_gt *gt) {
> + return MEDIA_VER_FULL(gt->i915) == IP_VER(13, 0) && gt->type ==
> +GT_MEDIA; }
> +
> static inline struct intel_gt *uc_to_gt(struct intel_uc *uc) {
> return container_of(uc, struct intel_gt, uc);
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index c45e6d8cbaac..668ed3fc7076 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1095,10 +1095,11 @@ __lrc_alloc_state(struct intel_context *ce, struct intel_engine_cs *engine)
> if (IS_ERR(obj)) {
> obj = i915_gem_object_create_shmem(engine->i915, context_size);
> /*
> - * Wa_22016122933: For MTL the shared memory needs to be mapped
> - * as WC on CPU side and UC (PAT index 2) on GPU side
> + * Wa_22016122933: For Media version 13.0, all Media GT shared
> + * memory needs to be mapped as WC on CPU side and UC (PAT
> + * index 2) on GPU side.
> */
> - if (IS_METEORLAKE(engine->i915))
> + if (intel_gt_needs_wa_22016122933(engine->gt))
> i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
> }
> if (IS_ERR(obj))
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> index fb4933543f31..1093b47d3e06 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> @@ -284,10 +284,6 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> memcpy_toio(gsc->local_vaddr, src, gsc->fw.size);
> memset_io(gsc->local_vaddr + gsc->fw.size, 0, gsc->local->size - gsc->fw.size);
>
> - /*
> - * Wa_22016122933: Making sure the data in dst is
> - * visible to GSC right away
> - */
> intel_guc_write_barrier(>->uc.guc);
>
> i915_gem_object_unpin_map(gsc->fw.obj);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index effb37727093..0000846f6029 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -745,10 +745,11 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
> return ERR_CAST(obj);
>
> /*
> - * Wa_22016122933: For MTL the shared memory needs to be mapped
> - * as WC on CPU side and UC (PAT index 2) on GPU side
> + * Wa_22016122933: For Media version 13.0, all Media GT shared
> + * memory needs to be mapped as WC on CPU side and UC (PAT
> + * index 2) on GPU side.
> */
> - if (IS_METEORLAKE(gt->i915))
> + if (intel_gt_needs_wa_22016122933(gt))
> i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
>
> vma = i915_vma_instance(obj, >->ggtt->vm, NULL);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
> index f28a3a83742d..97eadd08181d 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
> @@ -960,10 +960,6 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg)
> /* now update descriptor */
> WRITE_ONCE(desc->head, head);
>
> - /*
> - * Wa_22016122933: Making sure the head update is
> - * visible to GuC right away
> - */
> intel_guc_write_barrier(ct_to_guc(ct));
>
> return available - len;
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH dii-client 2/2] drm/i915/gt: Apply workaround 22016122933 correctly
2023-07-21 14:05 ` [Intel-gfx] [PATCH dii-client 2/2] drm/i915/gt: Apply workaround 22016122933 correctly Jonathan Cavitt
2023-07-21 17:11 ` Yang, Fei
@ 2023-07-24 10:24 ` Tvrtko Ursulin
1 sibling, 0 replies; 15+ messages in thread
From: Tvrtko Ursulin @ 2023-07-24 10:24 UTC (permalink / raw)
To: Jonathan Cavitt, intel-gfx
Cc: matthew.d.roper, nirmoy.das, andi.shyti, chris.p.wilson
On 21/07/2023 15:05, Jonathan Cavitt wrote:
> WA_22016122933 was recently applied to all MeteorLake engines, which is
> simultaneously too broad (should only apply to Media engines) and too
> specific (should apply to all platforms that use the same media engine
> as MeteorLake). Correct this in cases where coherency settings are
> modified.
>
> There were also two additional places where the workaround was applied
> unconditionally. The change was confirmed as necessary for all
> platforms, so the workaround label was removed.
>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 5 +++--
> drivers/gpu/drm/i915/gt/intel_gt.h | 6 ++++++
> drivers/gpu/drm/i915/gt/intel_lrc.c | 7 ++++---
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 4 ----
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 7 ++++---
> drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 4 ----
> 6 files changed, 17 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> index 44d93ead96ff..4acdd008d1d3 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> @@ -470,9 +470,10 @@ enum i915_map_type i915_coherent_map_type(struct intel_gt *gt,
> bool always_coherent)
> {
> /*
> - * Wa_22016122933: always return I915_MAP_WC for MTL
> + * Wa_22016122933: always return I915_MAP_WC for Media
> + * version 13.0 when the object is on the Media GT
> */
> - if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
> + if (i915_gem_object_is_lmem(obj) || intel_gt_needs_wa_22016122933(gt))
> return I915_MAP_WC;
> if (HAS_LLC(gt->i915) || always_coherent)
> return I915_MAP_WB;
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index d2f4fbde5f9f..4eb41a3b6e8b 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -6,6 +6,7 @@
> #ifndef __INTEL_GT__
> #define __INTEL_GT__
>
> +#include "i915_drv.h"
> #include "intel_engine_types.h"
> #include "intel_gt_types.h"
> #include "intel_reset.h"
> @@ -24,6 +25,11 @@ static inline bool gt_is_root(struct intel_gt *gt)
> return !gt->info.id;
> }
>
> +static inline bool intel_gt_needs_wa_22016122933(struct intel_gt *gt)
> +{
> + return MEDIA_VER_FULL(gt->i915) == IP_VER(13, 0) && gt->type == GT_MEDIA;
Ah this is something Matt was recntly telling me is coming.
Would it make sense to store ipver in the gt? And then we could have:
return gt->type == GT_MEDIA && gt->info.ipver == IP_VER(13,0);
?
(Give or take the gt->info part, and macro or not.)
Reads a bit better to me to ask the same component about it's type and
version.
Regards,
Tvrtko
> +}
> +
> static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
> {
> return container_of(uc, struct intel_gt, uc);
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index c45e6d8cbaac..668ed3fc7076 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1095,10 +1095,11 @@ __lrc_alloc_state(struct intel_context *ce, struct intel_engine_cs *engine)
> if (IS_ERR(obj)) {
> obj = i915_gem_object_create_shmem(engine->i915, context_size);
> /*
> - * Wa_22016122933: For MTL the shared memory needs to be mapped
> - * as WC on CPU side and UC (PAT index 2) on GPU side
> + * Wa_22016122933: For Media version 13.0, all Media GT shared
> + * memory needs to be mapped as WC on CPU side and UC (PAT
> + * index 2) on GPU side.
> */
> - if (IS_METEORLAKE(engine->i915))
> + if (intel_gt_needs_wa_22016122933(engine->gt))
> i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
> }
> if (IS_ERR(obj))
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> index fb4933543f31..1093b47d3e06 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> @@ -284,10 +284,6 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> memcpy_toio(gsc->local_vaddr, src, gsc->fw.size);
> memset_io(gsc->local_vaddr + gsc->fw.size, 0, gsc->local->size - gsc->fw.size);
>
> - /*
> - * Wa_22016122933: Making sure the data in dst is
> - * visible to GSC right away
> - */
> intel_guc_write_barrier(>->uc.guc);
>
> i915_gem_object_unpin_map(gsc->fw.obj);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index effb37727093..0000846f6029 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -745,10 +745,11 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
> return ERR_CAST(obj);
>
> /*
> - * Wa_22016122933: For MTL the shared memory needs to be mapped
> - * as WC on CPU side and UC (PAT index 2) on GPU side
> + * Wa_22016122933: For Media version 13.0, all Media GT shared
> + * memory needs to be mapped as WC on CPU side and UC (PAT
> + * index 2) on GPU side.
> */
> - if (IS_METEORLAKE(gt->i915))
> + if (intel_gt_needs_wa_22016122933(gt))
> i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
>
> vma = i915_vma_instance(obj, >->ggtt->vm, NULL);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
> index f28a3a83742d..97eadd08181d 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
> @@ -960,10 +960,6 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg)
> /* now update descriptor */
> WRITE_ONCE(desc->head, head);
>
> - /*
> - * Wa_22016122933: Making sure the head update is
> - * visible to GuC right away
> - */
> intel_guc_write_barrier(ct_to_guc(ct));
>
> return available - len;
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
2023-07-21 14:05 [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric Jonathan Cavitt
` (4 preceding siblings ...)
2023-07-21 17:05 ` [Intel-gfx] [PATCH dii-client 1/2] " Yang, Fei
@ 2023-07-24 10:52 ` Tvrtko Ursulin
2023-07-25 13:23 ` Andi Shyti
6 siblings, 0 replies; 15+ messages in thread
From: Tvrtko Ursulin @ 2023-07-24 10:52 UTC (permalink / raw)
To: Jonathan Cavitt, intel-gfx
Cc: matthew.d.roper, nirmoy.das, andi.shyti, chris.p.wilson
On 21/07/2023 15:05, Jonathan Cavitt wrote:
> Refactor i915_coherent_map_type to be GT-centric rather than
> device-centric. Each GT may require different coherency
> handling due to hardware workarounds.
>
> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 2 +-
> drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 +-
> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 6 +++---
> .../gpu/drm/i915/gem/selftests/i915_gem_migrate.c | 12 ++++++------
> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_gtt.c | 4 ++--
> drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_ring.c | 2 +-
> drivers/gpu/drm/i915/gt/selftest_context.c | 2 +-
> drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
> drivers/gpu/drm/i915/gt/shmem_utils.c | 6 +++---
> drivers/gpu/drm/i915/gt/shmem_utils.h | 4 +++-
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 3 +--
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 3 +--
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 2 +-
> drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c | 2 +-
> drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 2 +-
> drivers/gpu/drm/i915/selftests/igt_spinner.c | 2 +-
> 21 files changed, 34 insertions(+), 34 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> index ad0405375881..71da83f7e98b 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> @@ -632,7 +632,7 @@ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915,
> return PTR_ERR(obj);
> }
>
> - cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt, obj, true));
> if (IS_ERR(cmd_in)) {
> drm_err(&i915->drm, "Failed to map gsc message page!\n");
> err = PTR_ERR(cmd_in);
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> index 884a17275b3a..06220494d246 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> @@ -716,7 +716,7 @@ void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
> void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
> enum i915_map_type type);
>
> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> +enum i915_map_type i915_coherent_map_type(struct intel_gt *gt,
> struct drm_i915_gem_object *obj,
> bool always_coherent);
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> index 89fc8ea6bcfc..44d93ead96ff 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> @@ -465,16 +465,16 @@ void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
> return ret;
> }
>
> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> +enum i915_map_type i915_coherent_map_type(struct intel_gt *gt,
> struct drm_i915_gem_object *obj,
> bool always_coherent)
> {
> /*
> * Wa_22016122933: always return I915_MAP_WC for MTL
> */
> - if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
> + if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
> return I915_MAP_WC;
> - if (HAS_LLC(i915) || always_coherent)
> + if (HAS_LLC(gt->i915) || always_coherent)
> return I915_MAP_WB;
> else
> return I915_MAP_WC;
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> index a93a90b15907..1ad18a872750 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> @@ -13,12 +13,12 @@
> #include "selftests/igt_spinner.h"
>
> static int igt_fill_check_buffer(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt,
> bool fill)
> {
> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> unsigned int i, count = obj->base.size / sizeof(u32);
> enum i915_map_type map_type =
> - i915_coherent_map_type(i915, obj, false);
> + i915_coherent_map_type(gt, obj, false);
> u32 *cur;
> int err = 0;
>
> @@ -66,7 +66,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
> if (err)
> continue;
>
> - err = igt_fill_check_buffer(obj, true);
> + err = igt_fill_check_buffer(obj, gt, true);
> if (err)
> continue;
>
> @@ -86,7 +86,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
> if (err)
> continue;
>
> - err = igt_fill_check_buffer(obj, false);
> + err = igt_fill_check_buffer(obj, gt, false);
> }
> i915_gem_object_put(obj);
>
> @@ -233,7 +233,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
> continue;
>
> if (!vma) {
> - err = igt_fill_check_buffer(obj, true);
> + err = igt_fill_check_buffer(obj, gt, true);
> if (err)
> continue;
> }
> @@ -276,7 +276,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
> if (err)
> goto out_unlock;
> } else {
> - err = igt_fill_check_buffer(obj, false);
> + err = igt_fill_check_buffer(obj, gt, false);
> }
>
> out_unlock:
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> index 21af0ec52223..4cc9c5b8d28e 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> @@ -39,7 +39,7 @@ static void dbg_poison_ce(struct intel_context *ce)
>
> if (ce->state) {
> struct drm_i915_gem_object *obj = ce->state->obj;
> - int type = i915_coherent_map_type(ce->engine->i915, obj, true);
> + int type = i915_coherent_map_type(ce->engine->gt, obj, true);
> void *map;
>
> if (!i915_gem_object_trylock(obj, NULL))
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 9f64d61dd5fc..aaa282b0725a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -591,7 +591,7 @@ static int __engines_record_defaults(struct intel_gt *gt)
> continue;
>
> /* Keep a copy of the state's backing pages; free the obj */
> - state = shmem_create_from_object(rq->context->state->obj);
> + state = shmem_create_from_object(rq->context->state->obj, gt);
> if (IS_ERR(state)) {
> err = PTR_ERR(state);
> goto out;
> diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
> index 731d9f2bbc56..48f3a30dbc99 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
> @@ -89,7 +89,7 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
> enum i915_map_type type;
> void *vaddr;
>
> - type = i915_coherent_map_type(vm->i915, obj, true);
> + type = i915_coherent_map_type(vm->gt, obj, true);
> vaddr = i915_gem_object_pin_map_unlocked(obj, type);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
> @@ -103,7 +103,7 @@ int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object
> enum i915_map_type type;
> void *vaddr;
>
> - type = i915_coherent_map_type(vm->i915, obj, true);
> + type = i915_coherent_map_type(vm->gt, obj, true);
> vaddr = i915_gem_object_pin_map(obj, type);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 1b710102390b..c45e6d8cbaac 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1191,7 +1191,7 @@ lrc_pre_pin(struct intel_context *ce,
> GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
>
> *vaddr = i915_gem_object_pin_map(ce->state->obj,
> - i915_coherent_map_type(ce->engine->i915,
> + i915_coherent_map_type(ce->engine->gt,
> ce->state->obj,
> false) |
> I915_MAP_OVERRIDE);
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
> index fb99143be98e..a058532cc1b8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
> @@ -56,7 +56,7 @@ int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
> if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915)) {
> addr = (void __force *)i915_vma_pin_iomap(vma);
> } else {
> - int type = i915_coherent_map_type(vma->vm->i915, vma->obj, false);
> + int type = i915_coherent_map_type(vma->vm->gt, vma->obj, false);
>
> addr = i915_gem_object_pin_map(vma->obj, type);
> }
> diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
> index 76fbae358072..87fad1bc15a0 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_context.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_context.c
> @@ -88,7 +88,7 @@ static int __live_context_size(struct intel_engine_cs *engine)
> goto err;
>
> vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
> - i915_coherent_map_type(engine->i915,
> + i915_coherent_map_type(engine->gt,
> ce->state->obj, false));
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> index 8b0d84f2aad2..fdc0b565ee21 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> @@ -73,7 +73,7 @@ static int hang_init(struct hang *h, struct intel_gt *gt)
> h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
>
> vaddr = i915_gem_object_pin_map_unlocked(h->obj,
> - i915_coherent_map_type(gt->i915, h->obj, false));
> + i915_coherent_map_type(gt, h->obj, false));
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> goto err_unpin_hws;
> @@ -119,7 +119,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
> return ERR_CAST(obj);
> }
>
> - vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, false));
> + vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt, obj, false));
> if (IS_ERR(vaddr)) {
> i915_gem_object_put(obj);
> i915_vm_put(vm);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index a78a3d2c2e16..3d1daeac4c0c 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -1292,7 +1292,7 @@ static int compare_isolation(struct intel_engine_cs *engine,
> }
>
> lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
> - i915_coherent_map_type(engine->i915,
> + i915_coherent_map_type(engine->gt,
> ce->state->obj,
> false));
> if (IS_ERR(lrc)) {
> diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c b/drivers/gpu/drm/i915/gt/shmem_utils.c
> index 449c9ed44382..3f2fea18746d 100644
> --- a/drivers/gpu/drm/i915/gt/shmem_utils.c
> +++ b/drivers/gpu/drm/i915/gt/shmem_utils.c
> @@ -31,9 +31,9 @@ struct file *shmem_create_from_data(const char *name, void *data, size_t len)
> return file;
> }
>
> -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
> +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt)
> {
> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> enum i915_map_type map_type;
> struct file *file;
> void *ptr;
> @@ -44,7 +44,7 @@ struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
> return file;
> }
>
> - map_type = i915_coherent_map_type(i915, obj, true);
> + map_type = i915_coherent_map_type(gt, obj, true);
> ptr = i915_gem_object_pin_map_unlocked(obj, map_type);
> if (IS_ERR(ptr))
> return ERR_CAST(ptr);
Semi-random place to comment, but it highlights well how IMO the API
change to i915_coherent_map_type is a bit questionable.
This is not a shared mapping so workaround should not apply. There is no
GT here at all so it is just a charade (passed in artificially to
satisfy the API change) and so wrong.
Another instance of where mapping looks to be not shared seems to be the
gsc_fw_load_prepare hunk, although I am not entirely sure about the
lifecycle there. Presumably we populate the fw image on the CPU and then
never touch it again at runtime but maybe that's not true, don't know.
Basically all GuC/HuC/PCP ones I am also not sure if they shared
mappings or not.
The other ones seem okay to me - I mean truly objects which can be
accesses by CPU and GPU simultaneously.
So question is can we do better in terms of API clarity and runtime
scope? For instance should we leave i915_coherent_map_type as is and
just have this smarter logic in a new intel_gt_coherent_map_type?
Downside is two APIs, which can add confusion too. Upside
shmem_create_from_object is not misleading and can use a more efficient
access. Maybe some other call sites too. How much efficient access
matters.. probably not a lot. So I am thinking mostly from the point of
view of being truthful to what is the issue.
Or even helpers should have explicit "shared" in the name?
Anyway, I think it is at least worth a short discussion.
Regards,
Tvrtko
> diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.h b/drivers/gpu/drm/i915/gt/shmem_utils.h
> index b2b04d88c6e5..743a56307216 100644
> --- a/drivers/gpu/drm/i915/gt/shmem_utils.h
> +++ b/drivers/gpu/drm/i915/gt/shmem_utils.h
> @@ -11,9 +11,11 @@
> struct iosys_map;
> struct drm_i915_gem_object;
> struct file;
> +struct intel_gt;
>
> struct file *shmem_create_from_data(const char *name, void *data, size_t len);
> -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj);
> +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt);
>
> void *shmem_pin_map(struct file *file);
> void shmem_unpin_map(struct file *file, void *ptr);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> index ab1a456f833d..fb4933543f31 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> @@ -268,7 +268,6 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
> static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> {
> struct intel_gt *gt = gsc_uc_to_gt(gsc);
> - struct drm_i915_private *i915 = gt->i915;
> void *src;
>
> if (!gsc->local)
> @@ -278,7 +277,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> return -ENOSPC;
>
> src = i915_gem_object_pin_map_unlocked(gsc->fw.obj,
> - i915_coherent_map_type(i915, gsc->fw.obj, true));
> + i915_coherent_map_type(gt, gsc->fw.obj, true));
> if (IS_ERR(src))
> return PTR_ERR(src);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 2eb891b270ae..effb37727093 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -792,7 +792,7 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
> return PTR_ERR(vma);
>
> vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
> - i915_coherent_map_type(guc_to_gt(guc)->i915,
> + i915_coherent_map_type(guc_to_gt(guc),
> vma->obj, true));
> if (IS_ERR(vaddr)) {
> i915_vma_unpin_and_release(&vma, 0);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> index 48f506a26e6d..ca95ddadc3a8 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> @@ -27,7 +27,6 @@ struct mtl_huc_auth_msg_out {
> int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
> {
> struct intel_gt *gt = huc_to_gt(huc);
> - struct drm_i915_private *i915 = gt->i915;
> struct drm_i915_gem_object *obj;
> struct mtl_huc_auth_msg_in *msg_in;
> struct mtl_huc_auth_msg_out *msg_out;
> @@ -43,7 +42,7 @@ int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
> pkt_offset = i915_ggtt_offset(huc->heci_pkt);
>
> pkt_vaddr = i915_gem_object_pin_map_unlocked(obj,
> - i915_coherent_map_type(i915, obj, true));
> + i915_coherent_map_type(gt, obj, true));
> if (IS_ERR(pkt_vaddr))
> return PTR_ERR(pkt_vaddr);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 7aadad5639c3..4f316f010b55 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -1213,7 +1213,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
> return PTR_ERR(vma);
>
> vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
> - i915_coherent_map_type(gt->i915, vma->obj, true));
> + i915_coherent_map_type(gt, vma->obj, true));
> if (IS_ERR(vaddr)) {
> i915_vma_unpin_and_release(&vma, 0);
> err = PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> index c7df47364013..8b5d3d129881 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> @@ -336,7 +336,7 @@ gsccs_create_buffer(struct intel_gt *gt,
> }
>
> /* return a virtual pointer */
> - *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt, obj, true));
> if (IS_ERR(*map)) {
> drm_err(&i915->drm, "Failed to map gsccs backend %s.\n", bufname);
> err = PTR_ERR(*map);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> index 1ce07d7e8769..00630a1c8e77 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> @@ -245,7 +245,7 @@ static int alloc_streaming_command(struct intel_pxp *pxp)
> }
>
> /* map the lmem into the virtual memory pointer */
> - cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(pxp->ctrl_gt, obj, true));
> if (IS_ERR(cmd)) {
> drm_err(&i915->drm, "Failed to map gsc message page!\n");
> err = PTR_ERR(cmd);
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> index 618d9386d554..b09e56427299 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> @@ -97,7 +97,7 @@ int igt_spinner_pin(struct igt_spinner *spin,
> if (!spin->batch) {
> unsigned int mode;
>
> - mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
> + mode = i915_coherent_map_type(spin->gt, spin->obj, false);
> vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, &spin->batch_vma);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
2023-07-21 14:05 [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric Jonathan Cavitt
` (5 preceding siblings ...)
2023-07-24 10:52 ` Tvrtko Ursulin
@ 2023-07-25 13:23 ` Andi Shyti
6 siblings, 0 replies; 15+ messages in thread
From: Andi Shyti @ 2023-07-25 13:23 UTC (permalink / raw)
To: Jonathan Cavitt; +Cc: chris.p.wilson, intel-gfx, matthew.d.roper, nirmoy.das
Hi Jonathan,
On Fri, Jul 21, 2023 at 07:05:58AM -0700, Jonathan Cavitt wrote:
> Refactor i915_coherent_map_type to be GT-centric rather than
> device-centric. Each GT may require different coherency
> handling due to hardware workarounds.
[...]
> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> +enum i915_map_type i915_coherent_map_type(struct intel_gt *gt,
> struct drm_i915_gem_object *obj,
> bool always_coherent)
> {
> /*
> * Wa_22016122933: always return I915_MAP_WC for MTL
> */
> - if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
> + if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
> return I915_MAP_WC;
> - if (HAS_LLC(i915) || always_coherent)
> + if (HAS_LLC(gt->i915) || always_coherent)
> return I915_MAP_WB;
> else
> return I915_MAP_WC;
this doesn't fully look right to me as gt-centric stuff need to
be in the gt/ directory.
As for this patch, here we don't need any reference to the gt.
You could eventually add some wrapper inside gt/ that perform the
per 'gt' checks and at the end call this function here.
Andi
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
@ 2023-07-25 16:01 Jonathan Cavitt
2023-07-25 16:23 ` Tvrtko Ursulin
2023-07-26 6:40 ` Yang, Fei
0 siblings, 2 replies; 15+ messages in thread
From: Jonathan Cavitt @ 2023-07-25 16:01 UTC (permalink / raw)
To: intel-gfx
Cc: andi.shyti, matthew.d.roper, jonathan.cavitt, chris.p.wilson,
nirmoy.das
Refactor i915_coherent_map_type to be GT-centric rather than
device-centric. Each GT may require different coherency
handling due to hardware workarounds.
Since the function now takes a GT instead of the i915, the function is
renamed and moved to the gt folder.
Suggested-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 3 ++-
drivers/gpu/drm/i915/gem/i915_gem_object.h | 4 ----
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 15 ---------------
.../drm/i915/gem/selftests/i915_gem_migrate.c | 12 ++++++------
drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
drivers/gpu/drm/i915/gt/intel_gt.c | 17 ++++++++++++++++-
drivers/gpu/drm/i915/gt/intel_gt.h | 3 +++
drivers/gpu/drm/i915/gt/intel_gtt.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ring.c | 3 ++-
drivers/gpu/drm/i915/gt/selftest_context.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
drivers/gpu/drm/i915/gt/shmem_utils.c | 7 ++++---
drivers/gpu/drm/i915/gt/shmem_utils.h | 4 +++-
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 3 +--
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 3 +--
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 3 ++-
drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c | 2 +-
drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 3 ++-
drivers/gpu/drm/i915/selftests/igt_spinner.c | 2 +-
22 files changed, 53 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
index ad0405375881..d753db3eef15 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
@@ -6,6 +6,7 @@
#include <drm/i915_hdcp_interface.h>
#include "gem/i915_gem_region.h"
+#include "gt/intel_gt.h"
#include "gt/uc/intel_gsc_uc_heci_cmd_submit.h"
#include "i915_drv.h"
#include "i915_utils.h"
@@ -632,7 +633,7 @@ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915,
return PTR_ERR(obj);
}
- cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
+ cmd_in = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, true));
if (IS_ERR(cmd_in)) {
drm_err(&i915->drm, "Failed to map gsc message page!\n");
err = PTR_ERR(cmd_in);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 884a17275b3a..0c695b4c129f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -716,10 +716,6 @@ void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
enum i915_map_type type);
-enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
- struct drm_i915_gem_object *obj,
- bool always_coherent);
-
void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
unsigned long offset,
unsigned long size);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 89fc8ea6bcfc..6d262d269c71 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -465,21 +465,6 @@ void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
return ret;
}
-enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
- struct drm_i915_gem_object *obj,
- bool always_coherent)
-{
- /*
- * Wa_22016122933: always return I915_MAP_WC for MTL
- */
- if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
- return I915_MAP_WC;
- if (HAS_LLC(i915) || always_coherent)
- return I915_MAP_WB;
- else
- return I915_MAP_WC;
-}
-
void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
unsigned long offset,
unsigned long size)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
index a93a90b15907..d8f4a10d71de 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
@@ -13,12 +13,12 @@
#include "selftests/igt_spinner.h"
static int igt_fill_check_buffer(struct drm_i915_gem_object *obj,
+ struct intel_gt *gt,
bool fill)
{
- struct drm_i915_private *i915 = to_i915(obj->base.dev);
unsigned int i, count = obj->base.size / sizeof(u32);
enum i915_map_type map_type =
- i915_coherent_map_type(i915, obj, false);
+ intel_gt_coherent_map_type(gt, obj, false);
u32 *cur;
int err = 0;
@@ -66,7 +66,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
if (err)
continue;
- err = igt_fill_check_buffer(obj, true);
+ err = igt_fill_check_buffer(obj, gt, true);
if (err)
continue;
@@ -86,7 +86,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
if (err)
continue;
- err = igt_fill_check_buffer(obj, false);
+ err = igt_fill_check_buffer(obj, gt, false);
}
i915_gem_object_put(obj);
@@ -233,7 +233,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
continue;
if (!vma) {
- err = igt_fill_check_buffer(obj, true);
+ err = igt_fill_check_buffer(obj, gt, true);
if (err)
continue;
}
@@ -276,7 +276,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
if (err)
goto out_unlock;
} else {
- err = igt_fill_check_buffer(obj, false);
+ err = igt_fill_check_buffer(obj, gt, false);
}
out_unlock:
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 21af0ec52223..b538b5c04948 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -39,7 +39,7 @@ static void dbg_poison_ce(struct intel_context *ce)
if (ce->state) {
struct drm_i915_gem_object *obj = ce->state->obj;
- int type = i915_coherent_map_type(ce->engine->i915, obj, true);
+ int type = intel_gt_coherent_map_type(ce->engine->gt, obj, true);
void *map;
if (!i915_gem_object_trylock(obj, NULL))
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 9f64d61dd5fc..6faf1dae965f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -591,7 +591,7 @@ static int __engines_record_defaults(struct intel_gt *gt)
continue;
/* Keep a copy of the state's backing pages; free the obj */
- state = shmem_create_from_object(rq->context->state->obj);
+ state = shmem_create_from_object(rq->context->state->obj, gt);
if (IS_ERR(state)) {
err = PTR_ERR(state);
goto out;
@@ -1134,6 +1134,21 @@ void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno)
}
}
+enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
+ struct drm_i915_gem_object *obj,
+ bool always_coherent)
+{
+ /*
+ * Wa_22016122933: always return I915_MAP_WC for MTL
+ */
+ if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
+ return I915_MAP_WC;
+ if (HAS_LLC(gt->i915) || always_coherent)
+ return I915_MAP_WB;
+ else
+ return I915_MAP_WC;
+}
+
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
#include "selftest_tlb.c"
#endif
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index d2f4fbde5f9f..adb442aaa522 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -119,4 +119,7 @@ static inline u32 intel_gt_next_invalidate_tlb_full(const struct intel_gt *gt)
void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno);
+enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
+ struct drm_i915_gem_object *obj,
+ bool always_coherent);
#endif /* __INTEL_GT_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 731d9f2bbc56..13944a14ea2d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -89,7 +89,7 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
enum i915_map_type type;
void *vaddr;
- type = i915_coherent_map_type(vm->i915, obj, true);
+ type = intel_gt_coherent_map_type(vm->gt, obj, true);
vaddr = i915_gem_object_pin_map_unlocked(obj, type);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
@@ -103,7 +103,7 @@ int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object
enum i915_map_type type;
void *vaddr;
- type = i915_coherent_map_type(vm->i915, obj, true);
+ type = intel_gt_coherent_map_type(vm->gt, obj, true);
vaddr = i915_gem_object_pin_map(obj, type);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 1b710102390b..e5a83d4932c8 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1191,7 +1191,7 @@ lrc_pre_pin(struct intel_context *ce,
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
*vaddr = i915_gem_object_pin_map(ce->state->obj,
- i915_coherent_map_type(ce->engine->i915,
+ intel_gt_coherent_map_type(ce->engine->gt,
ce->state->obj,
false) |
I915_MAP_OVERRIDE);
diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
index fb99143be98e..59da4b7bd262 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring.c
@@ -13,6 +13,7 @@
#include "intel_engine_regs.h"
#include "intel_gpu_commands.h"
#include "intel_ring.h"
+#include "intel_gt.h"
#include "intel_timeline.h"
unsigned int intel_ring_update_space(struct intel_ring *ring)
@@ -56,7 +57,7 @@ int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915)) {
addr = (void __force *)i915_vma_pin_iomap(vma);
} else {
- int type = i915_coherent_map_type(vma->vm->i915, vma->obj, false);
+ int type = intel_gt_coherent_map_type(vma->vm->gt, vma->obj, false);
addr = i915_gem_object_pin_map(vma->obj, type);
}
diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
index 76fbae358072..afce036bcaa8 100644
--- a/drivers/gpu/drm/i915/gt/selftest_context.c
+++ b/drivers/gpu/drm/i915/gt/selftest_context.c
@@ -88,7 +88,7 @@ static int __live_context_size(struct intel_engine_cs *engine)
goto err;
vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
- i915_coherent_map_type(engine->i915,
+ intel_gt_coherent_map_type(engine->gt,
ce->state->obj, false));
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 8b0d84f2aad2..0dd4d00ee894 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -73,7 +73,7 @@ static int hang_init(struct hang *h, struct intel_gt *gt)
h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
vaddr = i915_gem_object_pin_map_unlocked(h->obj,
- i915_coherent_map_type(gt->i915, h->obj, false));
+ intel_gt_coherent_map_type(gt, h->obj, false));
if (IS_ERR(vaddr)) {
err = PTR_ERR(vaddr);
goto err_unpin_hws;
@@ -119,7 +119,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
return ERR_CAST(obj);
}
- vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, false));
+ vaddr = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, false));
if (IS_ERR(vaddr)) {
i915_gem_object_put(obj);
i915_vm_put(vm);
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index a78a3d2c2e16..bc883de02295 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -1292,7 +1292,7 @@ static int compare_isolation(struct intel_engine_cs *engine,
}
lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
- i915_coherent_map_type(engine->i915,
+ intel_gt_coherent_map_type(engine->gt,
ce->state->obj,
false));
if (IS_ERR(lrc)) {
diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c b/drivers/gpu/drm/i915/gt/shmem_utils.c
index 449c9ed44382..ffd48839a825 100644
--- a/drivers/gpu/drm/i915/gt/shmem_utils.c
+++ b/drivers/gpu/drm/i915/gt/shmem_utils.c
@@ -11,6 +11,7 @@
#include "i915_drv.h"
#include "gem/i915_gem_object.h"
#include "gem/i915_gem_lmem.h"
+#include "gt/intel_gt.h"
#include "shmem_utils.h"
struct file *shmem_create_from_data(const char *name, void *data, size_t len)
@@ -31,9 +32,9 @@ struct file *shmem_create_from_data(const char *name, void *data, size_t len)
return file;
}
-struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
+struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
+ struct intel_gt *gt)
{
- struct drm_i915_private *i915 = to_i915(obj->base.dev);
enum i915_map_type map_type;
struct file *file;
void *ptr;
@@ -44,7 +45,7 @@ struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
return file;
}
- map_type = i915_coherent_map_type(i915, obj, true);
+ map_type = intel_gt_coherent_map_type(gt, obj, true);
ptr = i915_gem_object_pin_map_unlocked(obj, map_type);
if (IS_ERR(ptr))
return ERR_CAST(ptr);
diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.h b/drivers/gpu/drm/i915/gt/shmem_utils.h
index b2b04d88c6e5..743a56307216 100644
--- a/drivers/gpu/drm/i915/gt/shmem_utils.h
+++ b/drivers/gpu/drm/i915/gt/shmem_utils.h
@@ -11,9 +11,11 @@
struct iosys_map;
struct drm_i915_gem_object;
struct file;
+struct intel_gt;
struct file *shmem_create_from_data(const char *name, void *data, size_t len);
-struct file *shmem_create_from_object(struct drm_i915_gem_object *obj);
+struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
+ struct intel_gt *gt);
void *shmem_pin_map(struct file *file);
void shmem_unpin_map(struct file *file, void *ptr);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
index ab1a456f833d..6efb86c93bfc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
@@ -268,7 +268,6 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
{
struct intel_gt *gt = gsc_uc_to_gt(gsc);
- struct drm_i915_private *i915 = gt->i915;
void *src;
if (!gsc->local)
@@ -278,7 +277,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
return -ENOSPC;
src = i915_gem_object_pin_map_unlocked(gsc->fw.obj,
- i915_coherent_map_type(i915, gsc->fw.obj, true));
+ intel_gt_coherent_map_type(gt, gsc->fw.obj, true));
if (IS_ERR(src))
return PTR_ERR(src);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 2eb891b270ae..c0fa9d232205 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -792,7 +792,7 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
return PTR_ERR(vma);
vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
- i915_coherent_map_type(guc_to_gt(guc)->i915,
+ intel_gt_coherent_map_type(guc_to_gt(guc),
vma->obj, true));
if (IS_ERR(vaddr)) {
i915_vma_unpin_and_release(&vma, 0);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
index 48f506a26e6d..b648238cc675 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
@@ -27,7 +27,6 @@ struct mtl_huc_auth_msg_out {
int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
{
struct intel_gt *gt = huc_to_gt(huc);
- struct drm_i915_private *i915 = gt->i915;
struct drm_i915_gem_object *obj;
struct mtl_huc_auth_msg_in *msg_in;
struct mtl_huc_auth_msg_out *msg_out;
@@ -43,7 +42,7 @@ int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
pkt_offset = i915_ggtt_offset(huc->heci_pkt);
pkt_vaddr = i915_gem_object_pin_map_unlocked(obj,
- i915_coherent_map_type(i915, obj, true));
+ intel_gt_coherent_map_type(gt, obj, true));
if (IS_ERR(pkt_vaddr))
return PTR_ERR(pkt_vaddr);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index 7aadad5639c3..fc0d05d2df59 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -11,6 +11,7 @@
#include <drm/drm_print.h>
#include "gem/i915_gem_lmem.h"
+#include "gt/intel_gt.h"
#include "gt/intel_gt_print.h"
#include "intel_gsc_binary_headers.h"
#include "intel_gsc_fw.h"
@@ -1213,7 +1214,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
return PTR_ERR(vma);
vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
- i915_coherent_map_type(gt->i915, vma->obj, true));
+ intel_gt_coherent_map_type(gt, vma->obj, true));
if (IS_ERR(vaddr)) {
i915_vma_unpin_and_release(&vma, 0);
err = PTR_ERR(vaddr);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
index c7df47364013..c27fc5870608 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
@@ -336,7 +336,7 @@ gsccs_create_buffer(struct intel_gt *gt,
}
/* return a virtual pointer */
- *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
+ *map = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, true));
if (IS_ERR(*map)) {
drm_err(&i915->drm, "Failed to map gsccs backend %s.\n", bufname);
err = PTR_ERR(*map);
diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
index 1ce07d7e8769..8e0b5d48ddf6 100644
--- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
+++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
@@ -11,6 +11,7 @@
#include "gem/i915_gem_lmem.h"
#include "i915_drv.h"
+#include "gt/intel_gt.h"
#include "intel_pxp.h"
#include "intel_pxp_cmd_interface_42.h"
@@ -245,7 +246,7 @@ static int alloc_streaming_command(struct intel_pxp *pxp)
}
/* map the lmem into the virtual memory pointer */
- cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
+ cmd = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(pxp->ctrl_gt, obj, true));
if (IS_ERR(cmd)) {
drm_err(&i915->drm, "Failed to map gsc message page!\n");
err = PTR_ERR(cmd);
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 3c5e0952f1b8..0f064930ef11 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -97,7 +97,7 @@ int igt_spinner_pin(struct igt_spinner *spin,
if (!spin->batch) {
unsigned int mode;
- mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
+ mode = intel_gt_coherent_map_type(spin->gt, spin->obj, false);
vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, &spin->batch_vma);
if (IS_ERR(vaddr))
return PTR_ERR(vaddr);
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
2023-07-25 16:01 Jonathan Cavitt
@ 2023-07-25 16:23 ` Tvrtko Ursulin
2023-07-25 17:39 ` Cavitt, Jonathan
2023-07-26 6:40 ` Yang, Fei
1 sibling, 1 reply; 15+ messages in thread
From: Tvrtko Ursulin @ 2023-07-25 16:23 UTC (permalink / raw)
To: Jonathan Cavitt, intel-gfx
Cc: matthew.d.roper, nirmoy.das, andi.shyti, chris.p.wilson
On 25/07/2023 17:01, Jonathan Cavitt wrote:
> Refactor i915_coherent_map_type to be GT-centric rather than
> device-centric. Each GT may require different coherency
> handling due to hardware workarounds.
>
> Since the function now takes a GT instead of the i915, the function is
> renamed and moved to the gt folder.
What about the issue of fake gt passed to shmem_create_from_object I raised?
Regards,
Tvrtko
P.S. See if you can drop the dii-client part from the subject line going
forward.
>
> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 3 ++-
> drivers/gpu/drm/i915/gem/i915_gem_object.h | 4 ----
> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 15 ---------------
> .../drm/i915/gem/selftests/i915_gem_migrate.c | 12 ++++++------
> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 17 ++++++++++++++++-
> drivers/gpu/drm/i915/gt/intel_gt.h | 3 +++
> drivers/gpu/drm/i915/gt/intel_gtt.c | 4 ++--
> drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_ring.c | 3 ++-
> drivers/gpu/drm/i915/gt/selftest_context.c | 2 +-
> drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
> drivers/gpu/drm/i915/gt/shmem_utils.c | 7 ++++---
> drivers/gpu/drm/i915/gt/shmem_utils.h | 4 +++-
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 3 +--
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 3 +--
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 3 ++-
> drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c | 2 +-
> drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 3 ++-
> drivers/gpu/drm/i915/selftests/igt_spinner.c | 2 +-
> 22 files changed, 53 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> index ad0405375881..d753db3eef15 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> @@ -6,6 +6,7 @@
> #include <drm/i915_hdcp_interface.h>
>
> #include "gem/i915_gem_region.h"
> +#include "gt/intel_gt.h"
> #include "gt/uc/intel_gsc_uc_heci_cmd_submit.h"
> #include "i915_drv.h"
> #include "i915_utils.h"
> @@ -632,7 +633,7 @@ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915,
> return PTR_ERR(obj);
> }
>
> - cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + cmd_in = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, true));
> if (IS_ERR(cmd_in)) {
> drm_err(&i915->drm, "Failed to map gsc message page!\n");
> err = PTR_ERR(cmd_in);
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> index 884a17275b3a..0c695b4c129f 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> @@ -716,10 +716,6 @@ void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
> void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
> enum i915_map_type type);
>
> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> - struct drm_i915_gem_object *obj,
> - bool always_coherent);
> -
> void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
> unsigned long offset,
> unsigned long size);
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> index 89fc8ea6bcfc..6d262d269c71 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> @@ -465,21 +465,6 @@ void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
> return ret;
> }
>
> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> - struct drm_i915_gem_object *obj,
> - bool always_coherent)
> -{
> - /*
> - * Wa_22016122933: always return I915_MAP_WC for MTL
> - */
> - if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
> - return I915_MAP_WC;
> - if (HAS_LLC(i915) || always_coherent)
> - return I915_MAP_WB;
> - else
> - return I915_MAP_WC;
> -}
> -
> void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
> unsigned long offset,
> unsigned long size)
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> index a93a90b15907..d8f4a10d71de 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> @@ -13,12 +13,12 @@
> #include "selftests/igt_spinner.h"
>
> static int igt_fill_check_buffer(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt,
> bool fill)
> {
> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> unsigned int i, count = obj->base.size / sizeof(u32);
> enum i915_map_type map_type =
> - i915_coherent_map_type(i915, obj, false);
> + intel_gt_coherent_map_type(gt, obj, false);
> u32 *cur;
> int err = 0;
>
> @@ -66,7 +66,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
> if (err)
> continue;
>
> - err = igt_fill_check_buffer(obj, true);
> + err = igt_fill_check_buffer(obj, gt, true);
> if (err)
> continue;
>
> @@ -86,7 +86,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
> if (err)
> continue;
>
> - err = igt_fill_check_buffer(obj, false);
> + err = igt_fill_check_buffer(obj, gt, false);
> }
> i915_gem_object_put(obj);
>
> @@ -233,7 +233,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
> continue;
>
> if (!vma) {
> - err = igt_fill_check_buffer(obj, true);
> + err = igt_fill_check_buffer(obj, gt, true);
> if (err)
> continue;
> }
> @@ -276,7 +276,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
> if (err)
> goto out_unlock;
> } else {
> - err = igt_fill_check_buffer(obj, false);
> + err = igt_fill_check_buffer(obj, gt, false);
> }
>
> out_unlock:
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> index 21af0ec52223..b538b5c04948 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> @@ -39,7 +39,7 @@ static void dbg_poison_ce(struct intel_context *ce)
>
> if (ce->state) {
> struct drm_i915_gem_object *obj = ce->state->obj;
> - int type = i915_coherent_map_type(ce->engine->i915, obj, true);
> + int type = intel_gt_coherent_map_type(ce->engine->gt, obj, true);
> void *map;
>
> if (!i915_gem_object_trylock(obj, NULL))
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 9f64d61dd5fc..6faf1dae965f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -591,7 +591,7 @@ static int __engines_record_defaults(struct intel_gt *gt)
> continue;
>
> /* Keep a copy of the state's backing pages; free the obj */
> - state = shmem_create_from_object(rq->context->state->obj);
> + state = shmem_create_from_object(rq->context->state->obj, gt);
> if (IS_ERR(state)) {
> err = PTR_ERR(state);
> goto out;
> @@ -1134,6 +1134,21 @@ void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno)
> }
> }
>
> +enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
> + struct drm_i915_gem_object *obj,
> + bool always_coherent)
> +{
> + /*
> + * Wa_22016122933: always return I915_MAP_WC for MTL
> + */
> + if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
> + return I915_MAP_WC;
> + if (HAS_LLC(gt->i915) || always_coherent)
> + return I915_MAP_WB;
> + else
> + return I915_MAP_WC;
> +}
> +
> #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
> #include "selftest_tlb.c"
> #endif
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index d2f4fbde5f9f..adb442aaa522 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -119,4 +119,7 @@ static inline u32 intel_gt_next_invalidate_tlb_full(const struct intel_gt *gt)
>
> void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno);
>
> +enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
> + struct drm_i915_gem_object *obj,
> + bool always_coherent);
> #endif /* __INTEL_GT_H__ */
> diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
> index 731d9f2bbc56..13944a14ea2d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
> @@ -89,7 +89,7 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
> enum i915_map_type type;
> void *vaddr;
>
> - type = i915_coherent_map_type(vm->i915, obj, true);
> + type = intel_gt_coherent_map_type(vm->gt, obj, true);
> vaddr = i915_gem_object_pin_map_unlocked(obj, type);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
> @@ -103,7 +103,7 @@ int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object
> enum i915_map_type type;
> void *vaddr;
>
> - type = i915_coherent_map_type(vm->i915, obj, true);
> + type = intel_gt_coherent_map_type(vm->gt, obj, true);
> vaddr = i915_gem_object_pin_map(obj, type);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 1b710102390b..e5a83d4932c8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1191,7 +1191,7 @@ lrc_pre_pin(struct intel_context *ce,
> GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
>
> *vaddr = i915_gem_object_pin_map(ce->state->obj,
> - i915_coherent_map_type(ce->engine->i915,
> + intel_gt_coherent_map_type(ce->engine->gt,
> ce->state->obj,
> false) |
> I915_MAP_OVERRIDE);
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
> index fb99143be98e..59da4b7bd262 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
> @@ -13,6 +13,7 @@
> #include "intel_engine_regs.h"
> #include "intel_gpu_commands.h"
> #include "intel_ring.h"
> +#include "intel_gt.h"
> #include "intel_timeline.h"
>
> unsigned int intel_ring_update_space(struct intel_ring *ring)
> @@ -56,7 +57,7 @@ int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
> if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915)) {
> addr = (void __force *)i915_vma_pin_iomap(vma);
> } else {
> - int type = i915_coherent_map_type(vma->vm->i915, vma->obj, false);
> + int type = intel_gt_coherent_map_type(vma->vm->gt, vma->obj, false);
>
> addr = i915_gem_object_pin_map(vma->obj, type);
> }
> diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
> index 76fbae358072..afce036bcaa8 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_context.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_context.c
> @@ -88,7 +88,7 @@ static int __live_context_size(struct intel_engine_cs *engine)
> goto err;
>
> vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
> - i915_coherent_map_type(engine->i915,
> + intel_gt_coherent_map_type(engine->gt,
> ce->state->obj, false));
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> index 8b0d84f2aad2..0dd4d00ee894 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> @@ -73,7 +73,7 @@ static int hang_init(struct hang *h, struct intel_gt *gt)
> h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
>
> vaddr = i915_gem_object_pin_map_unlocked(h->obj,
> - i915_coherent_map_type(gt->i915, h->obj, false));
> + intel_gt_coherent_map_type(gt, h->obj, false));
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> goto err_unpin_hws;
> @@ -119,7 +119,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
> return ERR_CAST(obj);
> }
>
> - vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, false));
> + vaddr = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, false));
> if (IS_ERR(vaddr)) {
> i915_gem_object_put(obj);
> i915_vm_put(vm);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index a78a3d2c2e16..bc883de02295 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -1292,7 +1292,7 @@ static int compare_isolation(struct intel_engine_cs *engine,
> }
>
> lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
> - i915_coherent_map_type(engine->i915,
> + intel_gt_coherent_map_type(engine->gt,
> ce->state->obj,
> false));
> if (IS_ERR(lrc)) {
> diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c b/drivers/gpu/drm/i915/gt/shmem_utils.c
> index 449c9ed44382..ffd48839a825 100644
> --- a/drivers/gpu/drm/i915/gt/shmem_utils.c
> +++ b/drivers/gpu/drm/i915/gt/shmem_utils.c
> @@ -11,6 +11,7 @@
> #include "i915_drv.h"
> #include "gem/i915_gem_object.h"
> #include "gem/i915_gem_lmem.h"
> +#include "gt/intel_gt.h"
> #include "shmem_utils.h"
>
> struct file *shmem_create_from_data(const char *name, void *data, size_t len)
> @@ -31,9 +32,9 @@ struct file *shmem_create_from_data(const char *name, void *data, size_t len)
> return file;
> }
>
> -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
> +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt)
> {
> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> enum i915_map_type map_type;
> struct file *file;
> void *ptr;
> @@ -44,7 +45,7 @@ struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
> return file;
> }
>
> - map_type = i915_coherent_map_type(i915, obj, true);
> + map_type = intel_gt_coherent_map_type(gt, obj, true);
> ptr = i915_gem_object_pin_map_unlocked(obj, map_type);
> if (IS_ERR(ptr))
> return ERR_CAST(ptr);
> diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.h b/drivers/gpu/drm/i915/gt/shmem_utils.h
> index b2b04d88c6e5..743a56307216 100644
> --- a/drivers/gpu/drm/i915/gt/shmem_utils.h
> +++ b/drivers/gpu/drm/i915/gt/shmem_utils.h
> @@ -11,9 +11,11 @@
> struct iosys_map;
> struct drm_i915_gem_object;
> struct file;
> +struct intel_gt;
>
> struct file *shmem_create_from_data(const char *name, void *data, size_t len);
> -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj);
> +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt);
>
> void *shmem_pin_map(struct file *file);
> void shmem_unpin_map(struct file *file, void *ptr);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> index ab1a456f833d..6efb86c93bfc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> @@ -268,7 +268,6 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
> static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> {
> struct intel_gt *gt = gsc_uc_to_gt(gsc);
> - struct drm_i915_private *i915 = gt->i915;
> void *src;
>
> if (!gsc->local)
> @@ -278,7 +277,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> return -ENOSPC;
>
> src = i915_gem_object_pin_map_unlocked(gsc->fw.obj,
> - i915_coherent_map_type(i915, gsc->fw.obj, true));
> + intel_gt_coherent_map_type(gt, gsc->fw.obj, true));
> if (IS_ERR(src))
> return PTR_ERR(src);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 2eb891b270ae..c0fa9d232205 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -792,7 +792,7 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
> return PTR_ERR(vma);
>
> vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
> - i915_coherent_map_type(guc_to_gt(guc)->i915,
> + intel_gt_coherent_map_type(guc_to_gt(guc),
> vma->obj, true));
> if (IS_ERR(vaddr)) {
> i915_vma_unpin_and_release(&vma, 0);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> index 48f506a26e6d..b648238cc675 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> @@ -27,7 +27,6 @@ struct mtl_huc_auth_msg_out {
> int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
> {
> struct intel_gt *gt = huc_to_gt(huc);
> - struct drm_i915_private *i915 = gt->i915;
> struct drm_i915_gem_object *obj;
> struct mtl_huc_auth_msg_in *msg_in;
> struct mtl_huc_auth_msg_out *msg_out;
> @@ -43,7 +42,7 @@ int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
> pkt_offset = i915_ggtt_offset(huc->heci_pkt);
>
> pkt_vaddr = i915_gem_object_pin_map_unlocked(obj,
> - i915_coherent_map_type(i915, obj, true));
> + intel_gt_coherent_map_type(gt, obj, true));
> if (IS_ERR(pkt_vaddr))
> return PTR_ERR(pkt_vaddr);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 7aadad5639c3..fc0d05d2df59 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -11,6 +11,7 @@
> #include <drm/drm_print.h>
>
> #include "gem/i915_gem_lmem.h"
> +#include "gt/intel_gt.h"
> #include "gt/intel_gt_print.h"
> #include "intel_gsc_binary_headers.h"
> #include "intel_gsc_fw.h"
> @@ -1213,7 +1214,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
> return PTR_ERR(vma);
>
> vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
> - i915_coherent_map_type(gt->i915, vma->obj, true));
> + intel_gt_coherent_map_type(gt, vma->obj, true));
> if (IS_ERR(vaddr)) {
> i915_vma_unpin_and_release(&vma, 0);
> err = PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> index c7df47364013..c27fc5870608 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> @@ -336,7 +336,7 @@ gsccs_create_buffer(struct intel_gt *gt,
> }
>
> /* return a virtual pointer */
> - *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + *map = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, true));
> if (IS_ERR(*map)) {
> drm_err(&i915->drm, "Failed to map gsccs backend %s.\n", bufname);
> err = PTR_ERR(*map);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> index 1ce07d7e8769..8e0b5d48ddf6 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> @@ -11,6 +11,7 @@
> #include "gem/i915_gem_lmem.h"
>
> #include "i915_drv.h"
> +#include "gt/intel_gt.h"
>
> #include "intel_pxp.h"
> #include "intel_pxp_cmd_interface_42.h"
> @@ -245,7 +246,7 @@ static int alloc_streaming_command(struct intel_pxp *pxp)
> }
>
> /* map the lmem into the virtual memory pointer */
> - cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + cmd = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(pxp->ctrl_gt, obj, true));
> if (IS_ERR(cmd)) {
> drm_err(&i915->drm, "Failed to map gsc message page!\n");
> err = PTR_ERR(cmd);
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> index 3c5e0952f1b8..0f064930ef11 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> @@ -97,7 +97,7 @@ int igt_spinner_pin(struct igt_spinner *spin,
> if (!spin->batch) {
> unsigned int mode;
>
> - mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
> + mode = intel_gt_coherent_map_type(spin->gt, spin->obj, false);
> vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, &spin->batch_vma);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
2023-07-25 16:23 ` Tvrtko Ursulin
@ 2023-07-25 17:39 ` Cavitt, Jonathan
2023-07-26 9:11 ` Tvrtko Ursulin
0 siblings, 1 reply; 15+ messages in thread
From: Cavitt, Jonathan @ 2023-07-25 17:39 UTC (permalink / raw)
To: Tvrtko Ursulin, intel-gfx@lists.freedesktop.org
Cc: Roper, Matthew D, Das, Nirmoy, Shyti, Andi,
chris.p.wilson@linux.intel.com
-----Original Message-----
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Sent: Tuesday, July 25, 2023 9:23 AM
To: Cavitt, Jonathan <jonathan.cavitt@intel.com>; intel-gfx@lists.freedesktop.org
Cc: Shyti, Andi <andi.shyti@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>; chris.p.wilson@linux.intel.com; Das, Nirmoy <nirmoy.das@intel.com>
Subject: Re: [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
>
>
> On 25/07/2023 17:01, Jonathan Cavitt wrote:
> > Refactor i915_coherent_map_type to be GT-centric rather than
> > device-centric. Each GT may require different coherency
> > handling due to hardware workarounds.
> >
> > Since the function now takes a GT instead of the i915, the function is
> > renamed and moved to the gt folder.
>
> What about the issue of fake gt passed to shmem_create_from_object I raised?
The function is, presently, only called in __engines_record_defaults, as a part of
intel_gt_init. shmem_create_from_object uses i915_coherent_map_type to determine
the map_type to pass to i915_gem_object_pin_map_unlocked. This creates a pointer
that we pass to shmem_create_from_data. Aside from an i915_gem_object_is_shmem
check at the start, the function is otherwise just calling shmem_create_from_data...
which, itself, is only called by shmem_create_from_object.
I'd argue that any additional changes to shmem_create_from_object are unnecessary
as the function is only called from __engines_record_defaults. Additionally, the function
is a part of the gt library (shmem_utils.h is in the gt folder), so taking a gt argument should
be expected. However, if you still disagree, here's a few options for how we can rectify
this issue:
Debatably, we could just delete shmem_create_from_object and use the full expansion
in __engines_record_defaults. Though this may come with some additional complications,
such as the lost helper function being desirable in the future and needing to expand the
definition of shmem_create_from_data to include an object pinning requirement.
The second option is that we pass the map_type to the shmem_create_from_object function
instead of the GT, bypassing the need for i915_coherent_map_type in the function by breaking
it out as a part of __engines_record_defaults. I'll leave it to your judgement whether this would
be more or less confusing than just passing the GT.
Thirdly, we could just hard-code a specific map_type to use, though that seems ill-advised.
The last option is to rename the function to something more representative. Here's a few ideas
I can think of off the top of my head:
shmem_create
shmem_create_on_gt
shmem_create_from_gt
shmem_create_from_object_on_gt
intel_gt_create_shmem_from_object
If I had to recommend one approach over the rest, it would probably be the second option,
followed by the fourth.
-Jonathan Cavitt
>
> Regards,
>
> Tvrtko
>
> P.S. See if you can drop the dii-client part from the subject line going
> forward.
>
> >
> > Suggested-by: Matt Roper <matthew.d.roper@intel.com>
> > Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 3 ++-
> > drivers/gpu/drm/i915/gem/i915_gem_object.h | 4 ----
> > drivers/gpu/drm/i915/gem/i915_gem_pages.c | 15 ---------------
> > .../drm/i915/gem/selftests/i915_gem_migrate.c | 12 ++++++------
> > drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
> > drivers/gpu/drm/i915/gt/intel_gt.c | 17 ++++++++++++++++-
> > drivers/gpu/drm/i915/gt/intel_gt.h | 3 +++
> > drivers/gpu/drm/i915/gt/intel_gtt.c | 4 ++--
> > drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
> > drivers/gpu/drm/i915/gt/intel_ring.c | 3 ++-
> > drivers/gpu/drm/i915/gt/selftest_context.c | 2 +-
> > drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
> > drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
> > drivers/gpu/drm/i915/gt/shmem_utils.c | 7 ++++---
> > drivers/gpu/drm/i915/gt/shmem_utils.h | 4 +++-
> > drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 3 +--
> > drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
> > drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 3 +--
> > drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 3 ++-
> > drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c | 2 +-
> > drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 3 ++-
> > drivers/gpu/drm/i915/selftests/igt_spinner.c | 2 +-
> > 22 files changed, 53 insertions(+), 49 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> > index ad0405375881..d753db3eef15 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> > @@ -6,6 +6,7 @@
> > #include <drm/i915_hdcp_interface.h>
> >
> > #include "gem/i915_gem_region.h"
> > +#include "gt/intel_gt.h"
> > #include "gt/uc/intel_gsc_uc_heci_cmd_submit.h"
> > #include "i915_drv.h"
> > #include "i915_utils.h"
> > @@ -632,7 +633,7 @@ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915,
> > return PTR_ERR(obj);
> > }
> >
> > - cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> > + cmd_in = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, true));
> > if (IS_ERR(cmd_in)) {
> > drm_err(&i915->drm, "Failed to map gsc message page!\n");
> > err = PTR_ERR(cmd_in);
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> > index 884a17275b3a..0c695b4c129f 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> > @@ -716,10 +716,6 @@ void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
> > void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
> > enum i915_map_type type);
> >
> > -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> > - struct drm_i915_gem_object *obj,
> > - bool always_coherent);
> > -
> > void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
> > unsigned long offset,
> > unsigned long size);
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > index 89fc8ea6bcfc..6d262d269c71 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > @@ -465,21 +465,6 @@ void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
> > return ret;
> > }
> >
> > -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> > - struct drm_i915_gem_object *obj,
> > - bool always_coherent)
> > -{
> > - /*
> > - * Wa_22016122933: always return I915_MAP_WC for MTL
> > - */
> > - if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
> > - return I915_MAP_WC;
> > - if (HAS_LLC(i915) || always_coherent)
> > - return I915_MAP_WB;
> > - else
> > - return I915_MAP_WC;
> > -}
> > -
> > void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
> > unsigned long offset,
> > unsigned long size)
> > diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> > index a93a90b15907..d8f4a10d71de 100644
> > --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> > +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> > @@ -13,12 +13,12 @@
> > #include "selftests/igt_spinner.h"
> >
> > static int igt_fill_check_buffer(struct drm_i915_gem_object *obj,
> > + struct intel_gt *gt,
> > bool fill)
> > {
> > - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> > unsigned int i, count = obj->base.size / sizeof(u32);
> > enum i915_map_type map_type =
> > - i915_coherent_map_type(i915, obj, false);
> > + intel_gt_coherent_map_type(gt, obj, false);
> > u32 *cur;
> > int err = 0;
> >
> > @@ -66,7 +66,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
> > if (err)
> > continue;
> >
> > - err = igt_fill_check_buffer(obj, true);
> > + err = igt_fill_check_buffer(obj, gt, true);
> > if (err)
> > continue;
> >
> > @@ -86,7 +86,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
> > if (err)
> > continue;
> >
> > - err = igt_fill_check_buffer(obj, false);
> > + err = igt_fill_check_buffer(obj, gt, false);
> > }
> > i915_gem_object_put(obj);
> >
> > @@ -233,7 +233,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
> > continue;
> >
> > if (!vma) {
> > - err = igt_fill_check_buffer(obj, true);
> > + err = igt_fill_check_buffer(obj, gt, true);
> > if (err)
> > continue;
> > }
> > @@ -276,7 +276,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
> > if (err)
> > goto out_unlock;
> > } else {
> > - err = igt_fill_check_buffer(obj, false);
> > + err = igt_fill_check_buffer(obj, gt, false);
> > }
> >
> > out_unlock:
> > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> > index 21af0ec52223..b538b5c04948 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> > @@ -39,7 +39,7 @@ static void dbg_poison_ce(struct intel_context *ce)
> >
> > if (ce->state) {
> > struct drm_i915_gem_object *obj = ce->state->obj;
> > - int type = i915_coherent_map_type(ce->engine->i915, obj, true);
> > + int type = intel_gt_coherent_map_type(ce->engine->gt, obj, true);
> > void *map;
> >
> > if (!i915_gem_object_trylock(obj, NULL))
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> > index 9f64d61dd5fc..6faf1dae965f 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> > @@ -591,7 +591,7 @@ static int __engines_record_defaults(struct intel_gt *gt)
> > continue;
> >
> > /* Keep a copy of the state's backing pages; free the obj */
> > - state = shmem_create_from_object(rq->context->state->obj);
> > + state = shmem_create_from_object(rq->context->state->obj, gt);
> > if (IS_ERR(state)) {
> > err = PTR_ERR(state);
> > goto out;
> > @@ -1134,6 +1134,21 @@ void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno)
> > }
> > }
> >
> > +enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
> > + struct drm_i915_gem_object *obj,
> > + bool always_coherent)
> > +{
> > + /*
> > + * Wa_22016122933: always return I915_MAP_WC for MTL
> > + */
> > + if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
> > + return I915_MAP_WC;
> > + if (HAS_LLC(gt->i915) || always_coherent)
> > + return I915_MAP_WB;
> > + else
> > + return I915_MAP_WC;
> > +}
> > +
> > #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
> > #include "selftest_tlb.c"
> > #endif
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> > index d2f4fbde5f9f..adb442aaa522 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> > @@ -119,4 +119,7 @@ static inline u32 intel_gt_next_invalidate_tlb_full(const struct intel_gt *gt)
> >
> > void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno);
> >
> > +enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
> > + struct drm_i915_gem_object *obj,
> > + bool always_coherent);
> > #endif /* __INTEL_GT_H__ */
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
> > index 731d9f2bbc56..13944a14ea2d 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gtt.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
> > @@ -89,7 +89,7 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
> > enum i915_map_type type;
> > void *vaddr;
> >
> > - type = i915_coherent_map_type(vm->i915, obj, true);
> > + type = intel_gt_coherent_map_type(vm->gt, obj, true);
> > vaddr = i915_gem_object_pin_map_unlocked(obj, type);
> > if (IS_ERR(vaddr))
> > return PTR_ERR(vaddr);
> > @@ -103,7 +103,7 @@ int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object
> > enum i915_map_type type;
> > void *vaddr;
> >
> > - type = i915_coherent_map_type(vm->i915, obj, true);
> > + type = intel_gt_coherent_map_type(vm->gt, obj, true);
> > vaddr = i915_gem_object_pin_map(obj, type);
> > if (IS_ERR(vaddr))
> > return PTR_ERR(vaddr);
> > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> > index 1b710102390b..e5a83d4932c8 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> > @@ -1191,7 +1191,7 @@ lrc_pre_pin(struct intel_context *ce,
> > GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
> >
> > *vaddr = i915_gem_object_pin_map(ce->state->obj,
> > - i915_coherent_map_type(ce->engine->i915,
> > + intel_gt_coherent_map_type(ce->engine->gt,
> > ce->state->obj,
> > false) |
> > I915_MAP_OVERRIDE);
> > diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
> > index fb99143be98e..59da4b7bd262 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_ring.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
> > @@ -13,6 +13,7 @@
> > #include "intel_engine_regs.h"
> > #include "intel_gpu_commands.h"
> > #include "intel_ring.h"
> > +#include "intel_gt.h"
> > #include "intel_timeline.h"
> >
> > unsigned int intel_ring_update_space(struct intel_ring *ring)
> > @@ -56,7 +57,7 @@ int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
> > if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915)) {
> > addr = (void __force *)i915_vma_pin_iomap(vma);
> > } else {
> > - int type = i915_coherent_map_type(vma->vm->i915, vma->obj, false);
> > + int type = intel_gt_coherent_map_type(vma->vm->gt, vma->obj, false);
> >
> > addr = i915_gem_object_pin_map(vma->obj, type);
> > }
> > diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
> > index 76fbae358072..afce036bcaa8 100644
> > --- a/drivers/gpu/drm/i915/gt/selftest_context.c
> > +++ b/drivers/gpu/drm/i915/gt/selftest_context.c
> > @@ -88,7 +88,7 @@ static int __live_context_size(struct intel_engine_cs *engine)
> > goto err;
> >
> > vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
> > - i915_coherent_map_type(engine->i915,
> > + intel_gt_coherent_map_type(engine->gt,
> > ce->state->obj, false));
> > if (IS_ERR(vaddr)) {
> > err = PTR_ERR(vaddr);
> > diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> > index 8b0d84f2aad2..0dd4d00ee894 100644
> > --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> > +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> > @@ -73,7 +73,7 @@ static int hang_init(struct hang *h, struct intel_gt *gt)
> > h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
> >
> > vaddr = i915_gem_object_pin_map_unlocked(h->obj,
> > - i915_coherent_map_type(gt->i915, h->obj, false));
> > + intel_gt_coherent_map_type(gt, h->obj, false));
> > if (IS_ERR(vaddr)) {
> > err = PTR_ERR(vaddr);
> > goto err_unpin_hws;
> > @@ -119,7 +119,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
> > return ERR_CAST(obj);
> > }
> >
> > - vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, false));
> > + vaddr = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, false));
> > if (IS_ERR(vaddr)) {
> > i915_gem_object_put(obj);
> > i915_vm_put(vm);
> > diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> > index a78a3d2c2e16..bc883de02295 100644
> > --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> > +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> > @@ -1292,7 +1292,7 @@ static int compare_isolation(struct intel_engine_cs *engine,
> > }
> >
> > lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
> > - i915_coherent_map_type(engine->i915,
> > + intel_gt_coherent_map_type(engine->gt,
> > ce->state->obj,
> > false));
> > if (IS_ERR(lrc)) {
> > diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c b/drivers/gpu/drm/i915/gt/shmem_utils.c
> > index 449c9ed44382..ffd48839a825 100644
> > --- a/drivers/gpu/drm/i915/gt/shmem_utils.c
> > +++ b/drivers/gpu/drm/i915/gt/shmem_utils.c
> > @@ -11,6 +11,7 @@
> > #include "i915_drv.h"
> > #include "gem/i915_gem_object.h"
> > #include "gem/i915_gem_lmem.h"
> > +#include "gt/intel_gt.h"
> > #include "shmem_utils.h"
> >
> > struct file *shmem_create_from_data(const char *name, void *data, size_t len)
> > @@ -31,9 +32,9 @@ struct file *shmem_create_from_data(const char *name, void *data, size_t len)
> > return file;
> > }
> >
> > -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
> > +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
> > + struct intel_gt *gt)
> > {
> > - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> > enum i915_map_type map_type;
> > struct file *file;
> > void *ptr;
> > @@ -44,7 +45,7 @@ struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
> > return file;
> > }
> >
> > - map_type = i915_coherent_map_type(i915, obj, true);
> > + map_type = intel_gt_coherent_map_type(gt, obj, true);
> > ptr = i915_gem_object_pin_map_unlocked(obj, map_type);
> > if (IS_ERR(ptr))
> > return ERR_CAST(ptr);
> > diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.h b/drivers/gpu/drm/i915/gt/shmem_utils.h
> > index b2b04d88c6e5..743a56307216 100644
> > --- a/drivers/gpu/drm/i915/gt/shmem_utils.h
> > +++ b/drivers/gpu/drm/i915/gt/shmem_utils.h
> > @@ -11,9 +11,11 @@
> > struct iosys_map;
> > struct drm_i915_gem_object;
> > struct file;
> > +struct intel_gt;
> >
> > struct file *shmem_create_from_data(const char *name, void *data, size_t len);
> > -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj);
> > +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
> > + struct intel_gt *gt);
> >
> > void *shmem_pin_map(struct file *file);
> > void shmem_unpin_map(struct file *file, void *ptr);
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> > index ab1a456f833d..6efb86c93bfc 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> > @@ -268,7 +268,6 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
> > static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> > {
> > struct intel_gt *gt = gsc_uc_to_gt(gsc);
> > - struct drm_i915_private *i915 = gt->i915;
> > void *src;
> >
> > if (!gsc->local)
> > @@ -278,7 +277,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> > return -ENOSPC;
> >
> > src = i915_gem_object_pin_map_unlocked(gsc->fw.obj,
> > - i915_coherent_map_type(i915, gsc->fw.obj, true));
> > + intel_gt_coherent_map_type(gt, gsc->fw.obj, true));
> > if (IS_ERR(src))
> > return PTR_ERR(src);
> >
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> > index 2eb891b270ae..c0fa9d232205 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> > @@ -792,7 +792,7 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
> > return PTR_ERR(vma);
> >
> > vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
> > - i915_coherent_map_type(guc_to_gt(guc)->i915,
> > + intel_gt_coherent_map_type(guc_to_gt(guc),
> > vma->obj, true));
> > if (IS_ERR(vaddr)) {
> > i915_vma_unpin_and_release(&vma, 0);
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> > index 48f506a26e6d..b648238cc675 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> > @@ -27,7 +27,6 @@ struct mtl_huc_auth_msg_out {
> > int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
> > {
> > struct intel_gt *gt = huc_to_gt(huc);
> > - struct drm_i915_private *i915 = gt->i915;
> > struct drm_i915_gem_object *obj;
> > struct mtl_huc_auth_msg_in *msg_in;
> > struct mtl_huc_auth_msg_out *msg_out;
> > @@ -43,7 +42,7 @@ int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
> > pkt_offset = i915_ggtt_offset(huc->heci_pkt);
> >
> > pkt_vaddr = i915_gem_object_pin_map_unlocked(obj,
> > - i915_coherent_map_type(i915, obj, true));
> > + intel_gt_coherent_map_type(gt, obj, true));
> > if (IS_ERR(pkt_vaddr))
> > return PTR_ERR(pkt_vaddr);
> >
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> > index 7aadad5639c3..fc0d05d2df59 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> > @@ -11,6 +11,7 @@
> > #include <drm/drm_print.h>
> >
> > #include "gem/i915_gem_lmem.h"
> > +#include "gt/intel_gt.h"
> > #include "gt/intel_gt_print.h"
> > #include "intel_gsc_binary_headers.h"
> > #include "intel_gsc_fw.h"
> > @@ -1213,7 +1214,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
> > return PTR_ERR(vma);
> >
> > vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
> > - i915_coherent_map_type(gt->i915, vma->obj, true));
> > + intel_gt_coherent_map_type(gt, vma->obj, true));
> > if (IS_ERR(vaddr)) {
> > i915_vma_unpin_and_release(&vma, 0);
> > err = PTR_ERR(vaddr);
> > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> > index c7df47364013..c27fc5870608 100644
> > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> > @@ -336,7 +336,7 @@ gsccs_create_buffer(struct intel_gt *gt,
> > }
> >
> > /* return a virtual pointer */
> > - *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> > + *map = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, true));
> > if (IS_ERR(*map)) {
> > drm_err(&i915->drm, "Failed to map gsccs backend %s.\n", bufname);
> > err = PTR_ERR(*map);
> > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> > index 1ce07d7e8769..8e0b5d48ddf6 100644
> > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> > @@ -11,6 +11,7 @@
> > #include "gem/i915_gem_lmem.h"
> >
> > #include "i915_drv.h"
> > +#include "gt/intel_gt.h"
> >
> > #include "intel_pxp.h"
> > #include "intel_pxp_cmd_interface_42.h"
> > @@ -245,7 +246,7 @@ static int alloc_streaming_command(struct intel_pxp *pxp)
> > }
> >
> > /* map the lmem into the virtual memory pointer */
> > - cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> > + cmd = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(pxp->ctrl_gt, obj, true));
> > if (IS_ERR(cmd)) {
> > drm_err(&i915->drm, "Failed to map gsc message page!\n");
> > err = PTR_ERR(cmd);
> > diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> > index 3c5e0952f1b8..0f064930ef11 100644
> > --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> > +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> > @@ -97,7 +97,7 @@ int igt_spinner_pin(struct igt_spinner *spin,
> > if (!spin->batch) {
> > unsigned int mode;
> >
> > - mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
> > + mode = intel_gt_coherent_map_type(spin->gt, spin->obj, false);
> > vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, &spin->batch_vma);
> > if (IS_ERR(vaddr))
> > return PTR_ERR(vaddr);
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
2023-07-25 16:01 Jonathan Cavitt
2023-07-25 16:23 ` Tvrtko Ursulin
@ 2023-07-26 6:40 ` Yang, Fei
1 sibling, 0 replies; 15+ messages in thread
From: Yang, Fei @ 2023-07-26 6:40 UTC (permalink / raw)
To: Cavitt, Jonathan, intel-gfx@lists.freedesktop.org
Cc: Shyti, Andi, chris.p.wilson@linux.intel.com, Roper, Matthew D,
Das, Nirmoy
> Refactor i915_coherent_map_type to be GT-centric rather than
> device-centric. Each GT may require different coherency handling
> due to hardware workarounds.
>
> Since the function now takes a GT instead of the i915, the function
> is renamed and moved to the gt folder.
Remove dii-client in the title. Also need to fix the check-patch warnings.
Otherwise the patch looks good to me.
assume you address the above issues,
Acked-by: Fei Yang <fei.yang@intel.com>
> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 3 ++-
> drivers/gpu/drm/i915/gem/i915_gem_object.h | 4 ----
> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 15 ---------------
> .../drm/i915/gem/selftests/i915_gem_migrate.c | 12 ++++++------
> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_gt.c | 17 ++++++++++++++++-
> drivers/gpu/drm/i915/gt/intel_gt.h | 3 +++
> drivers/gpu/drm/i915/gt/intel_gtt.c | 4 ++--
> drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_ring.c | 3 ++-
> drivers/gpu/drm/i915/gt/selftest_context.c | 2 +-
> drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
> drivers/gpu/drm/i915/gt/shmem_utils.c | 7 ++++---
> drivers/gpu/drm/i915/gt/shmem_utils.h | 4 +++-
> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 3 +--
> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 3 +--
> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 3 ++-
> drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c | 2 +-
> drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 3 ++-
> drivers/gpu/drm/i915/selftests/igt_spinner.c | 2 +-
> 22 files changed, 53 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> index ad0405375881..d753db3eef15 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
> @@ -6,6 +6,7 @@
> #include <drm/i915_hdcp_interface.h>
>
> #include "gem/i915_gem_region.h"
> +#include "gt/intel_gt.h"
> #include "gt/uc/intel_gsc_uc_heci_cmd_submit.h"
> #include "i915_drv.h"
> #include "i915_utils.h"
> @@ -632,7 +633,7 @@ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915,
> return PTR_ERR(obj);
> }
>
> - cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + cmd_in = i915_gem_object_pin_map_unlocked(obj,
> +intel_gt_coherent_map_type(gt, obj, true));
> if (IS_ERR(cmd_in)) {
> drm_err(&i915->drm, "Failed to map gsc message page!\n");
> err = PTR_ERR(cmd_in);
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> index 884a17275b3a..0c695b4c129f 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> @@ -716,10 +716,6 @@ void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
> void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
> enum i915_map_type type);
>
> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> - struct drm_i915_gem_object *obj,
> - bool always_coherent);
> -
> void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
> unsigned long offset,
> unsigned long size);
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> index 89fc8ea6bcfc..6d262d269c71 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> @@ -465,21 +465,6 @@ void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
> return ret;
> }
>
> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
> - struct drm_i915_gem_object *obj,
> - bool always_coherent)
> -{
> - /*
> - * Wa_22016122933: always return I915_MAP_WC for MTL
> - */
> - if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
> - return I915_MAP_WC;
> - if (HAS_LLC(i915) || always_coherent)
> - return I915_MAP_WB;
> - else
> - return I915_MAP_WC;
> -}
> -
> void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
> unsigned long offset,
> unsigned long size)
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> index a93a90b15907..d8f4a10d71de 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
> @@ -13,12 +13,12 @@
> #include "selftests/igt_spinner.h"
>
> static int igt_fill_check_buffer(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt,
> bool fill)
> {
> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> unsigned int i, count = obj->base.size / sizeof(u32);
> enum i915_map_type map_type =
> - i915_coherent_map_type(i915, obj, false);
> + intel_gt_coherent_map_type(gt, obj, false);
> u32 *cur;
> int err = 0;
>
> @@ -66,7 +66,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
> if (err)
> continue;
>
> - err = igt_fill_check_buffer(obj, true);
> + err = igt_fill_check_buffer(obj, gt, true);
> if (err)
> continue;
>
> @@ -86,7 +86,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
> if (err)
> continue;
>
> - err = igt_fill_check_buffer(obj, false);
> + err = igt_fill_check_buffer(obj, gt, false);
> }
> i915_gem_object_put(obj);
>
> @@ -233,7 +233,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
> continue;
>
> if (!vma) {
> - err = igt_fill_check_buffer(obj, true);
> + err = igt_fill_check_buffer(obj, gt, true);
> if (err)
> continue;
> }
> @@ -276,7 +276,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
> if (err)
> goto out_unlock;
> } else {
> - err = igt_fill_check_buffer(obj, false);
> + err = igt_fill_check_buffer(obj, gt, false);
> }
>
> out_unlock:
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> index 21af0ec52223..b538b5c04948 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> @@ -39,7 +39,7 @@ static void dbg_poison_ce(struct intel_context *ce)
>
> if (ce->state) {
> struct drm_i915_gem_object *obj = ce->state->obj;
> - int type = i915_coherent_map_type(ce->engine->i915, obj, true);
> + int type = intel_gt_coherent_map_type(ce->engine->gt, obj, true);
> void *map;
>
> if (!i915_gem_object_trylock(obj, NULL)) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 9f64d61dd5fc..6faf1dae965f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -591,7 +591,7 @@ static int __engines_record_defaults(struct intel_gt *gt)
> continue;
>
> /* Keep a copy of the state's backing pages; free the obj */
> - state = shmem_create_from_object(rq->context->state->obj);
> + state = shmem_create_from_object(rq->context->state->obj, gt);
> if (IS_ERR(state)) {
> err = PTR_ERR(state);
> goto out;
> @@ -1134,6 +1134,21 @@ void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno)
> }
> }
>
> +enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
> + struct drm_i915_gem_object *obj,
> + bool always_coherent)
> +{
> + /*
> + * Wa_22016122933: always return I915_MAP_WC for MTL
> + */
> + if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
> + return I915_MAP_WC;
> + if (HAS_LLC(gt->i915) || always_coherent)
> + return I915_MAP_WB;
> + else
> + return I915_MAP_WC;
> +}
> +
> #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
> #include "selftest_tlb.c"
> #endif
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index d2f4fbde5f9f..adb442aaa522 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -119,4 +119,7 @@ static inline u32 intel_gt_next_invalidate_tlb_full(const struct intel_gt *gt)
>
> void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno);
>
> +enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
> + struct drm_i915_gem_object *obj,
> + bool always_coherent);
> #endif /* __INTEL_GT_H__ */
> diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
> index 731d9f2bbc56..13944a14ea2d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
> @@ -89,7 +89,7 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
> enum i915_map_type type;
> void *vaddr;
>
> - type = i915_coherent_map_type(vm->i915, obj, true);
> + type = intel_gt_coherent_map_type(vm->gt, obj, true);
> vaddr = i915_gem_object_pin_map_unlocked(obj, type);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
> @@ -103,7 +103,7 @@ int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object
> enum i915_map_type type;
> void *vaddr;
>
> - type = i915_coherent_map_type(vm->i915, obj, true);
> + type = intel_gt_coherent_map_type(vm->gt, obj, true);
> vaddr = i915_gem_object_pin_map(obj, type);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 1b710102390b..e5a83d4932c8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -1191,7 +1191,7 @@ lrc_pre_pin(struct intel_context *ce,
> GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
>
> *vaddr = i915_gem_object_pin_map(ce->state->obj,
> - i915_coherent_map_type(ce->engine->i915,
> + intel_gt_coherent_map_type(ce->engine->gt,
> ce->state->obj,
> false) |
> I915_MAP_OVERRIDE);
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
> index fb99143be98e..59da4b7bd262 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
> @@ -13,6 +13,7 @@
> #include "intel_engine_regs.h"
> #include "intel_gpu_commands.h"
> #include "intel_ring.h"
> +#include "intel_gt.h"
> #include "intel_timeline.h"
>
> unsigned int intel_ring_update_space(struct intel_ring *ring)
> @@ -56,7 +57,7 @@ int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
> if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915)) {
> addr = (void __force *)i915_vma_pin_iomap(vma);
> } else {
> - int type = i915_coherent_map_type(vma->vm->i915, vma->obj, false);
> + int type = intel_gt_coherent_map_type(vma->vm->gt, vma->obj, false);
>
> addr = i915_gem_object_pin_map(vma->obj, type);
> }
> diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
> index 76fbae358072..afce036bcaa8 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_context.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_context.c
> @@ -88,7 +88,7 @@ static int __live_context_size(struct intel_engine_cs *engine)
> goto err;
>
> vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
> - i915_coherent_map_type(engine->i915,
> + intel_gt_coherent_map_type(engine->gt,
> ce->state->obj, false));
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> index 8b0d84f2aad2..0dd4d00ee894 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
> @@ -73,7 +73,7 @@ static int hang_init(struct hang *h, struct intel_gt *gt)
> h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
>
> vaddr = i915_gem_object_pin_map_unlocked(h->obj,
> - i915_coherent_map_type(gt->i915, h->obj, false));
> + intel_gt_coherent_map_type(gt, h->obj, false));
> if (IS_ERR(vaddr)) {
> err = PTR_ERR(vaddr);
> goto err_unpin_hws;
> @@ -119,7 +119,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
> return ERR_CAST(obj);
> }
>
> - vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, false));
> + vaddr = i915_gem_object_pin_map_unlocked(obj,
> +intel_gt_coherent_map_type(gt, obj, false));
> if (IS_ERR(vaddr)) {
> i915_gem_object_put(obj);
> i915_vm_put(vm);
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index a78a3d2c2e16..bc883de02295 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -1292,7 +1292,7 @@ static int compare_isolation(struct intel_engine_cs *engine,
> }
>
> lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
> - i915_coherent_map_type(engine->i915,
> + intel_gt_coherent_map_type(engine->gt,
> ce->state->obj,
> false));
> if (IS_ERR(lrc)) {
> diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c b/drivers/gpu/drm/i915/gt/shmem_utils.c
> index 449c9ed44382..ffd48839a825 100644
> --- a/drivers/gpu/drm/i915/gt/shmem_utils.c
> +++ b/drivers/gpu/drm/i915/gt/shmem_utils.c
> @@ -11,6 +11,7 @@
> #include "i915_drv.h"
> #include "gem/i915_gem_object.h"
> #include "gem/i915_gem_lmem.h"
> +#include "gt/intel_gt.h"
> #include "shmem_utils.h"
>
> struct file *shmem_create_from_data(const char *name, void *data, size_t len)
> @@ -31,9 +32,9 @@ struct file *shmem_create_from_data(const char *name, void *data, size_t len)
> return file;
> }
>
> -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
> +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt)
> {
> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
> enum i915_map_type map_type;
> struct file *file;
> void *ptr;
> @@ -44,7 +45,7 @@ struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
> return file;
> }
>
> - map_type = i915_coherent_map_type(i915, obj, true);
> + map_type = intel_gt_coherent_map_type(gt, obj, true);
> ptr = i915_gem_object_pin_map_unlocked(obj, map_type);
> if (IS_ERR(ptr))
> return ERR_CAST(ptr);
> diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.h b/drivers/gpu/drm/i915/gt/shmem_utils.h
> index b2b04d88c6e5..743a56307216 100644
> --- a/drivers/gpu/drm/i915/gt/shmem_utils.h
> +++ b/drivers/gpu/drm/i915/gt/shmem_utils.h
> @@ -11,9 +11,11 @@
> struct iosys_map;
> struct drm_i915_gem_object;
> struct file;
> +struct intel_gt;
>
> struct file *shmem_create_from_data(const char *name, void *data, size_t len);
> -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj);
> +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
> + struct intel_gt *gt);
>
> void *shmem_pin_map(struct file *file);
> void shmem_unpin_map(struct file *file, void *ptr);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> index ab1a456f833d..6efb86c93bfc 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
> @@ -268,7 +268,6 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
> static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc) {
> struct intel_gt *gt = gsc_uc_to_gt(gsc);
> - struct drm_i915_private *i915 = gt->i915;
> void *src;
>
> if (!gsc->local)
> @@ -278,7 +277,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
> return -ENOSPC;
>
> src = i915_gem_object_pin_map_unlocked(gsc->fw.obj,
> - i915_coherent_map_type(i915, gsc->fw.obj, true));
> + intel_gt_coherent_map_type(gt, gsc->fw.obj, true));
> if (IS_ERR(src))
> return PTR_ERR(src);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 2eb891b270ae..c0fa9d232205 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -792,7 +792,7 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
> return PTR_ERR(vma);
>
> vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
> - i915_coherent_map_type(guc_to_gt(guc)->i915,
> + intel_gt_coherent_map_type(guc_to_gt(guc),
> vma->obj, true));
> if (IS_ERR(vaddr)) {
> i915_vma_unpin_and_release(&vma, 0);
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> index 48f506a26e6d..b648238cc675 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
> @@ -27,7 +27,6 @@ struct mtl_huc_auth_msg_out { int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc) {
> struct intel_gt *gt = huc_to_gt(huc);
> - struct drm_i915_private *i915 = gt->i915;
> struct drm_i915_gem_object *obj;
> struct mtl_huc_auth_msg_in *msg_in;
> struct mtl_huc_auth_msg_out *msg_out;
> @@ -43,7 +42,7 @@ int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
> pkt_offset = i915_ggtt_offset(huc->heci_pkt);
>
> pkt_vaddr = i915_gem_object_pin_map_unlocked(obj,
> - i915_coherent_map_type(i915, obj, true));
> + intel_gt_coherent_map_type(gt, obj, true));
> if (IS_ERR(pkt_vaddr))
> return PTR_ERR(pkt_vaddr);
>
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index 7aadad5639c3..fc0d05d2df59 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -11,6 +11,7 @@
> #include <drm/drm_print.h>
>
> #include "gem/i915_gem_lmem.h"
> +#include "gt/intel_gt.h"
> #include "gt/intel_gt_print.h"
> #include "intel_gsc_binary_headers.h"
> #include "intel_gsc_fw.h"
> @@ -1213,7 +1214,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
> return PTR_ERR(vma);
>
> vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
> - i915_coherent_map_type(gt->i915, vma->obj, true));
> + intel_gt_coherent_map_type(gt, vma->obj, true));
> if (IS_ERR(vaddr)) {
> i915_vma_unpin_and_release(&vma, 0);
> err = PTR_ERR(vaddr);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> index c7df47364013..c27fc5870608 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
> @@ -336,7 +336,7 @@ gsccs_create_buffer(struct intel_gt *gt,
> }
>
> /* return a virtual pointer */
> - *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + *map = i915_gem_object_pin_map_unlocked(obj,
> +intel_gt_coherent_map_type(gt, obj, true));
> if (IS_ERR(*map)) {
> drm_err(&i915->drm, "Failed to map gsccs backend %s.\n", bufname);
> err = PTR_ERR(*map);
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> index 1ce07d7e8769..8e0b5d48ddf6 100644
> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
> @@ -11,6 +11,7 @@
> #include "gem/i915_gem_lmem.h"
>
> #include "i915_drv.h"
> +#include "gt/intel_gt.h"
>
> #include "intel_pxp.h"
> #include "intel_pxp_cmd_interface_42.h"
> @@ -245,7 +246,7 @@ static int alloc_streaming_command(struct intel_pxp *pxp)
> }
>
> /* map the lmem into the virtual memory pointer */
> - cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
> + cmd = i915_gem_object_pin_map_unlocked(obj,
> +intel_gt_coherent_map_type(pxp->ctrl_gt, obj, true));
> if (IS_ERR(cmd)) {
> drm_err(&i915->drm, "Failed to map gsc message page!\n");
> err = PTR_ERR(cmd);
> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> index 3c5e0952f1b8..0f064930ef11 100644
> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
> @@ -97,7 +97,7 @@ int igt_spinner_pin(struct igt_spinner *spin,
> if (!spin->batch) {
> unsigned int mode;
>
> - mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
> + mode = intel_gt_coherent_map_type(spin->gt, spin->obj, false);
> vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, &spin->batch_vma);
> if (IS_ERR(vaddr))
> return PTR_ERR(vaddr);
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
2023-07-25 17:39 ` Cavitt, Jonathan
@ 2023-07-26 9:11 ` Tvrtko Ursulin
0 siblings, 0 replies; 15+ messages in thread
From: Tvrtko Ursulin @ 2023-07-26 9:11 UTC (permalink / raw)
To: Cavitt, Jonathan, intel-gfx@lists.freedesktop.org
Cc: Roper, Matthew D, Das, Nirmoy, Shyti, Andi,
chris.p.wilson@linux.intel.com
On 25/07/2023 18:39, Cavitt, Jonathan wrote:
> -----Original Message-----
> From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Sent: Tuesday, July 25, 2023 9:23 AM
> To: Cavitt, Jonathan <jonathan.cavitt@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: Shyti, Andi <andi.shyti@intel.com>; Roper, Matthew D <matthew.d.roper@intel.com>; chris.p.wilson@linux.intel.com; Das, Nirmoy <nirmoy.das@intel.com>
> Subject: Re: [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric
>>
>>
>> On 25/07/2023 17:01, Jonathan Cavitt wrote:
>>> Refactor i915_coherent_map_type to be GT-centric rather than
>>> device-centric. Each GT may require different coherency
>>> handling due to hardware workarounds.
>>>
>>> Since the function now takes a GT instead of the i915, the function is
>>> renamed and moved to the gt folder.
>>
>> What about the issue of fake gt passed to shmem_create_from_object I raised?
>
>
> The function is, presently, only called in __engines_record_defaults, as a part of
> intel_gt_init. shmem_create_from_object uses i915_coherent_map_type to determine
> the map_type to pass to i915_gem_object_pin_map_unlocked. This creates a pointer
> that we pass to shmem_create_from_data. Aside from an i915_gem_object_is_shmem
> check at the start, the function is otherwise just calling shmem_create_from_data...
> which, itself, is only called by shmem_create_from_object.
>
> I'd argue that any additional changes to shmem_create_from_object are unnecessary
> as the function is only called from __engines_record_defaults. Additionally, the function
> is a part of the gt library (shmem_utils.h is in the gt folder), so taking a gt argument should
> be expected. However, if you still disagree, here's a few options for how we can rectify
> this issue:
Looking at the content of shmem_utils.c it does seem wholly misplaced in
gt/. I would say we could move it (and should really, just no need in
scope of this series).
> Debatably, we could just delete shmem_create_from_object and use the full expansion
> in __engines_record_defaults. Though this may come with some additional complications,
> such as the lost helper function being desirable in the future and needing to expand the
> definition of shmem_create_from_data to include an object pinning requirement.
>
> The second option is that we pass the map_type to the shmem_create_from_object function
> instead of the GT, bypassing the need for i915_coherent_map_type in the function by breaking
> it out as a part of __engines_record_defaults. I'll leave it to your judgement whether this would
> be more or less confusing than just passing the GT.
>
> Thirdly, we could just hard-code a specific map_type to use, though that seems ill-advised.
Does the helper even need the coherent mapping if it is not setting up
shared access? AFAICS it is just a single use mapping with the sole
purpose to read the content of the whole object in bulk. And the whole
source object is also even a throw-away.
So in fact yes, why not just hardcode to something like:
type = i915_gem_object_is_lmem(obj) : I915_MMAP_WC : I915_MMAP_WB;
?
Regards,
Tvrtko
>
> The last option is to rename the function to something more representative. Here's a few ideas
> I can think of off the top of my head:
>
> shmem_create
> shmem_create_on_gt
> shmem_create_from_gt
> shmem_create_from_object_on_gt
> intel_gt_create_shmem_from_object
>
> If I had to recommend one approach over the rest, it would probably be the second option,
> followed by the fourth.
>
> -Jonathan Cavitt
>
>
>>
>> Regards,
>>
>> Tvrtko
>>
>> P.S. See if you can drop the dii-client part from the subject line going
>> forward.
>>
>>>
>>> Suggested-by: Matt Roper <matthew.d.roper@intel.com>
>>> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_hdcp_gsc.c | 3 ++-
>>> drivers/gpu/drm/i915/gem/i915_gem_object.h | 4 ----
>>> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 15 ---------------
>>> .../drm/i915/gem/selftests/i915_gem_migrate.c | 12 ++++++------
>>> drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +-
>>> drivers/gpu/drm/i915/gt/intel_gt.c | 17 ++++++++++++++++-
>>> drivers/gpu/drm/i915/gt/intel_gt.h | 3 +++
>>> drivers/gpu/drm/i915/gt/intel_gtt.c | 4 ++--
>>> drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
>>> drivers/gpu/drm/i915/gt/intel_ring.c | 3 ++-
>>> drivers/gpu/drm/i915/gt/selftest_context.c | 2 +-
>>> drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 4 ++--
>>> drivers/gpu/drm/i915/gt/selftest_lrc.c | 2 +-
>>> drivers/gpu/drm/i915/gt/shmem_utils.c | 7 ++++---
>>> drivers/gpu/drm/i915/gt/shmem_utils.h | 4 +++-
>>> drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c | 3 +--
>>> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
>>> drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c | 3 +--
>>> drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 3 ++-
>>> drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c | 2 +-
>>> drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 3 ++-
>>> drivers/gpu/drm/i915/selftests/igt_spinner.c | 2 +-
>>> 22 files changed, 53 insertions(+), 49 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
>>> index ad0405375881..d753db3eef15 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_hdcp_gsc.c
>>> @@ -6,6 +6,7 @@
>>> #include <drm/i915_hdcp_interface.h>
>>>
>>> #include "gem/i915_gem_region.h"
>>> +#include "gt/intel_gt.h"
>>> #include "gt/uc/intel_gsc_uc_heci_cmd_submit.h"
>>> #include "i915_drv.h"
>>> #include "i915_utils.h"
>>> @@ -632,7 +633,7 @@ static int intel_hdcp_gsc_initialize_message(struct drm_i915_private *i915,
>>> return PTR_ERR(obj);
>>> }
>>>
>>> - cmd_in = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
>>> + cmd_in = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, true));
>>> if (IS_ERR(cmd_in)) {
>>> drm_err(&i915->drm, "Failed to map gsc message page!\n");
>>> err = PTR_ERR(cmd_in);
>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
>>> index 884a17275b3a..0c695b4c129f 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
>>> @@ -716,10 +716,6 @@ void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj,
>>> void *__must_check i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
>>> enum i915_map_type type);
>>>
>>> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
>>> - struct drm_i915_gem_object *obj,
>>> - bool always_coherent);
>>> -
>>> void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
>>> unsigned long offset,
>>> unsigned long size);
>>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
>>> index 89fc8ea6bcfc..6d262d269c71 100644
>>> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
>>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
>>> @@ -465,21 +465,6 @@ void *i915_gem_object_pin_map_unlocked(struct drm_i915_gem_object *obj,
>>> return ret;
>>> }
>>>
>>> -enum i915_map_type i915_coherent_map_type(struct drm_i915_private *i915,
>>> - struct drm_i915_gem_object *obj,
>>> - bool always_coherent)
>>> -{
>>> - /*
>>> - * Wa_22016122933: always return I915_MAP_WC for MTL
>>> - */
>>> - if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(i915))
>>> - return I915_MAP_WC;
>>> - if (HAS_LLC(i915) || always_coherent)
>>> - return I915_MAP_WB;
>>> - else
>>> - return I915_MAP_WC;
>>> -}
>>> -
>>> void __i915_gem_object_flush_map(struct drm_i915_gem_object *obj,
>>> unsigned long offset,
>>> unsigned long size)
>>> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
>>> index a93a90b15907..d8f4a10d71de 100644
>>> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
>>> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_migrate.c
>>> @@ -13,12 +13,12 @@
>>> #include "selftests/igt_spinner.h"
>>>
>>> static int igt_fill_check_buffer(struct drm_i915_gem_object *obj,
>>> + struct intel_gt *gt,
>>> bool fill)
>>> {
>>> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
>>> unsigned int i, count = obj->base.size / sizeof(u32);
>>> enum i915_map_type map_type =
>>> - i915_coherent_map_type(i915, obj, false);
>>> + intel_gt_coherent_map_type(gt, obj, false);
>>> u32 *cur;
>>> int err = 0;
>>>
>>> @@ -66,7 +66,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
>>> if (err)
>>> continue;
>>>
>>> - err = igt_fill_check_buffer(obj, true);
>>> + err = igt_fill_check_buffer(obj, gt, true);
>>> if (err)
>>> continue;
>>>
>>> @@ -86,7 +86,7 @@ static int igt_create_migrate(struct intel_gt *gt, enum intel_region_id src,
>>> if (err)
>>> continue;
>>>
>>> - err = igt_fill_check_buffer(obj, false);
>>> + err = igt_fill_check_buffer(obj, gt, false);
>>> }
>>> i915_gem_object_put(obj);
>>>
>>> @@ -233,7 +233,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
>>> continue;
>>>
>>> if (!vma) {
>>> - err = igt_fill_check_buffer(obj, true);
>>> + err = igt_fill_check_buffer(obj, gt, true);
>>> if (err)
>>> continue;
>>> }
>>> @@ -276,7 +276,7 @@ static int __igt_lmem_pages_migrate(struct intel_gt *gt,
>>> if (err)
>>> goto out_unlock;
>>> } else {
>>> - err = igt_fill_check_buffer(obj, false);
>>> + err = igt_fill_check_buffer(obj, gt, false);
>>> }
>>>
>>> out_unlock:
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
>>> index 21af0ec52223..b538b5c04948 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
>>> @@ -39,7 +39,7 @@ static void dbg_poison_ce(struct intel_context *ce)
>>>
>>> if (ce->state) {
>>> struct drm_i915_gem_object *obj = ce->state->obj;
>>> - int type = i915_coherent_map_type(ce->engine->i915, obj, true);
>>> + int type = intel_gt_coherent_map_type(ce->engine->gt, obj, true);
>>> void *map;
>>>
>>> if (!i915_gem_object_trylock(obj, NULL))
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
>>> index 9f64d61dd5fc..6faf1dae965f 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
>>> @@ -591,7 +591,7 @@ static int __engines_record_defaults(struct intel_gt *gt)
>>> continue;
>>>
>>> /* Keep a copy of the state's backing pages; free the obj */
>>> - state = shmem_create_from_object(rq->context->state->obj);
>>> + state = shmem_create_from_object(rq->context->state->obj, gt);
>>> if (IS_ERR(state)) {
>>> err = PTR_ERR(state);
>>> goto out;
>>> @@ -1134,6 +1134,21 @@ void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno)
>>> }
>>> }
>>>
>>> +enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
>>> + struct drm_i915_gem_object *obj,
>>> + bool always_coherent)
>>> +{
>>> + /*
>>> + * Wa_22016122933: always return I915_MAP_WC for MTL
>>> + */
>>> + if (i915_gem_object_is_lmem(obj) || IS_METEORLAKE(gt->i915))
>>> + return I915_MAP_WC;
>>> + if (HAS_LLC(gt->i915) || always_coherent)
>>> + return I915_MAP_WB;
>>> + else
>>> + return I915_MAP_WC;
>>> +}
>>> +
>>> #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
>>> #include "selftest_tlb.c"
>>> #endif
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
>>> index d2f4fbde5f9f..adb442aaa522 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
>>> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
>>> @@ -119,4 +119,7 @@ static inline u32 intel_gt_next_invalidate_tlb_full(const struct intel_gt *gt)
>>>
>>> void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno);
>>>
>>> +enum i915_map_type intel_gt_coherent_map_type(struct intel_gt *gt,
>>> + struct drm_i915_gem_object *obj,
>>> + bool always_coherent);
>>> #endif /* __INTEL_GT_H__ */
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c b/drivers/gpu/drm/i915/gt/intel_gtt.c
>>> index 731d9f2bbc56..13944a14ea2d 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_gtt.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
>>> @@ -89,7 +89,7 @@ int map_pt_dma(struct i915_address_space *vm, struct drm_i915_gem_object *obj)
>>> enum i915_map_type type;
>>> void *vaddr;
>>>
>>> - type = i915_coherent_map_type(vm->i915, obj, true);
>>> + type = intel_gt_coherent_map_type(vm->gt, obj, true);
>>> vaddr = i915_gem_object_pin_map_unlocked(obj, type);
>>> if (IS_ERR(vaddr))
>>> return PTR_ERR(vaddr);
>>> @@ -103,7 +103,7 @@ int map_pt_dma_locked(struct i915_address_space *vm, struct drm_i915_gem_object
>>> enum i915_map_type type;
>>> void *vaddr;
>>>
>>> - type = i915_coherent_map_type(vm->i915, obj, true);
>>> + type = intel_gt_coherent_map_type(vm->gt, obj, true);
>>> vaddr = i915_gem_object_pin_map(obj, type);
>>> if (IS_ERR(vaddr))
>>> return PTR_ERR(vaddr);
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
>>> index 1b710102390b..e5a83d4932c8 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
>>> @@ -1191,7 +1191,7 @@ lrc_pre_pin(struct intel_context *ce,
>>> GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
>>>
>>> *vaddr = i915_gem_object_pin_map(ce->state->obj,
>>> - i915_coherent_map_type(ce->engine->i915,
>>> + intel_gt_coherent_map_type(ce->engine->gt,
>>> ce->state->obj,
>>> false) |
>>> I915_MAP_OVERRIDE);
>>> diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c b/drivers/gpu/drm/i915/gt/intel_ring.c
>>> index fb99143be98e..59da4b7bd262 100644
>>> --- a/drivers/gpu/drm/i915/gt/intel_ring.c
>>> +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
>>> @@ -13,6 +13,7 @@
>>> #include "intel_engine_regs.h"
>>> #include "intel_gpu_commands.h"
>>> #include "intel_ring.h"
>>> +#include "intel_gt.h"
>>> #include "intel_timeline.h"
>>>
>>> unsigned int intel_ring_update_space(struct intel_ring *ring)
>>> @@ -56,7 +57,7 @@ int intel_ring_pin(struct intel_ring *ring, struct i915_gem_ww_ctx *ww)
>>> if (i915_vma_is_map_and_fenceable(vma) && !HAS_LLC(vma->vm->i915)) {
>>> addr = (void __force *)i915_vma_pin_iomap(vma);
>>> } else {
>>> - int type = i915_coherent_map_type(vma->vm->i915, vma->obj, false);
>>> + int type = intel_gt_coherent_map_type(vma->vm->gt, vma->obj, false);
>>>
>>> addr = i915_gem_object_pin_map(vma->obj, type);
>>> }
>>> diff --git a/drivers/gpu/drm/i915/gt/selftest_context.c b/drivers/gpu/drm/i915/gt/selftest_context.c
>>> index 76fbae358072..afce036bcaa8 100644
>>> --- a/drivers/gpu/drm/i915/gt/selftest_context.c
>>> +++ b/drivers/gpu/drm/i915/gt/selftest_context.c
>>> @@ -88,7 +88,7 @@ static int __live_context_size(struct intel_engine_cs *engine)
>>> goto err;
>>>
>>> vaddr = i915_gem_object_pin_map_unlocked(ce->state->obj,
>>> - i915_coherent_map_type(engine->i915,
>>> + intel_gt_coherent_map_type(engine->gt,
>>> ce->state->obj, false));
>>> if (IS_ERR(vaddr)) {
>>> err = PTR_ERR(vaddr);
>>> diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
>>> index 8b0d84f2aad2..0dd4d00ee894 100644
>>> --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
>>> +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
>>> @@ -73,7 +73,7 @@ static int hang_init(struct hang *h, struct intel_gt *gt)
>>> h->seqno = memset(vaddr, 0xff, PAGE_SIZE);
>>>
>>> vaddr = i915_gem_object_pin_map_unlocked(h->obj,
>>> - i915_coherent_map_type(gt->i915, h->obj, false));
>>> + intel_gt_coherent_map_type(gt, h->obj, false));
>>> if (IS_ERR(vaddr)) {
>>> err = PTR_ERR(vaddr);
>>> goto err_unpin_hws;
>>> @@ -119,7 +119,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
>>> return ERR_CAST(obj);
>>> }
>>>
>>> - vaddr = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(gt->i915, obj, false));
>>> + vaddr = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, false));
>>> if (IS_ERR(vaddr)) {
>>> i915_gem_object_put(obj);
>>> i915_vm_put(vm);
>>> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
>>> index a78a3d2c2e16..bc883de02295 100644
>>> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
>>> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
>>> @@ -1292,7 +1292,7 @@ static int compare_isolation(struct intel_engine_cs *engine,
>>> }
>>>
>>> lrc = i915_gem_object_pin_map_unlocked(ce->state->obj,
>>> - i915_coherent_map_type(engine->i915,
>>> + intel_gt_coherent_map_type(engine->gt,
>>> ce->state->obj,
>>> false));
>>> if (IS_ERR(lrc)) {
>>> diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.c b/drivers/gpu/drm/i915/gt/shmem_utils.c
>>> index 449c9ed44382..ffd48839a825 100644
>>> --- a/drivers/gpu/drm/i915/gt/shmem_utils.c
>>> +++ b/drivers/gpu/drm/i915/gt/shmem_utils.c
>>> @@ -11,6 +11,7 @@
>>> #include "i915_drv.h"
>>> #include "gem/i915_gem_object.h"
>>> #include "gem/i915_gem_lmem.h"
>>> +#include "gt/intel_gt.h"
>>> #include "shmem_utils.h"
>>>
>>> struct file *shmem_create_from_data(const char *name, void *data, size_t len)
>>> @@ -31,9 +32,9 @@ struct file *shmem_create_from_data(const char *name, void *data, size_t len)
>>> return file;
>>> }
>>>
>>> -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
>>> +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
>>> + struct intel_gt *gt)
>>> {
>>> - struct drm_i915_private *i915 = to_i915(obj->base.dev);
>>> enum i915_map_type map_type;
>>> struct file *file;
>>> void *ptr;
>>> @@ -44,7 +45,7 @@ struct file *shmem_create_from_object(struct drm_i915_gem_object *obj)
>>> return file;
>>> }
>>>
>>> - map_type = i915_coherent_map_type(i915, obj, true);
>>> + map_type = intel_gt_coherent_map_type(gt, obj, true);
>>> ptr = i915_gem_object_pin_map_unlocked(obj, map_type);
>>> if (IS_ERR(ptr))
>>> return ERR_CAST(ptr);
>>> diff --git a/drivers/gpu/drm/i915/gt/shmem_utils.h b/drivers/gpu/drm/i915/gt/shmem_utils.h
>>> index b2b04d88c6e5..743a56307216 100644
>>> --- a/drivers/gpu/drm/i915/gt/shmem_utils.h
>>> +++ b/drivers/gpu/drm/i915/gt/shmem_utils.h
>>> @@ -11,9 +11,11 @@
>>> struct iosys_map;
>>> struct drm_i915_gem_object;
>>> struct file;
>>> +struct intel_gt;
>>>
>>> struct file *shmem_create_from_data(const char *name, void *data, size_t len);
>>> -struct file *shmem_create_from_object(struct drm_i915_gem_object *obj);
>>> +struct file *shmem_create_from_object(struct drm_i915_gem_object *obj,
>>> + struct intel_gt *gt);
>>>
>>> void *shmem_pin_map(struct file *file);
>>> void shmem_unpin_map(struct file *file, void *ptr);
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
>>> index ab1a456f833d..6efb86c93bfc 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c
>>> @@ -268,7 +268,6 @@ static int gsc_fw_load(struct intel_gsc_uc *gsc)
>>> static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
>>> {
>>> struct intel_gt *gt = gsc_uc_to_gt(gsc);
>>> - struct drm_i915_private *i915 = gt->i915;
>>> void *src;
>>>
>>> if (!gsc->local)
>>> @@ -278,7 +277,7 @@ static int gsc_fw_load_prepare(struct intel_gsc_uc *gsc)
>>> return -ENOSPC;
>>>
>>> src = i915_gem_object_pin_map_unlocked(gsc->fw.obj,
>>> - i915_coherent_map_type(i915, gsc->fw.obj, true));
>>> + intel_gt_coherent_map_type(gt, gsc->fw.obj, true));
>>> if (IS_ERR(src))
>>> return PTR_ERR(src);
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>>> index 2eb891b270ae..c0fa9d232205 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
>>> @@ -792,7 +792,7 @@ int intel_guc_allocate_and_map_vma(struct intel_guc *guc, u32 size,
>>> return PTR_ERR(vma);
>>>
>>> vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
>>> - i915_coherent_map_type(guc_to_gt(guc)->i915,
>>> + intel_gt_coherent_map_type(guc_to_gt(guc),
>>> vma->obj, true));
>>> if (IS_ERR(vaddr)) {
>>> i915_vma_unpin_and_release(&vma, 0);
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
>>> index 48f506a26e6d..b648238cc675 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc_fw.c
>>> @@ -27,7 +27,6 @@ struct mtl_huc_auth_msg_out {
>>> int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
>>> {
>>> struct intel_gt *gt = huc_to_gt(huc);
>>> - struct drm_i915_private *i915 = gt->i915;
>>> struct drm_i915_gem_object *obj;
>>> struct mtl_huc_auth_msg_in *msg_in;
>>> struct mtl_huc_auth_msg_out *msg_out;
>>> @@ -43,7 +42,7 @@ int intel_huc_fw_auth_via_gsccs(struct intel_huc *huc)
>>> pkt_offset = i915_ggtt_offset(huc->heci_pkt);
>>>
>>> pkt_vaddr = i915_gem_object_pin_map_unlocked(obj,
>>> - i915_coherent_map_type(i915, obj, true));
>>> + intel_gt_coherent_map_type(gt, obj, true));
>>> if (IS_ERR(pkt_vaddr))
>>> return PTR_ERR(pkt_vaddr);
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>>> index 7aadad5639c3..fc0d05d2df59 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
>>> @@ -11,6 +11,7 @@
>>> #include <drm/drm_print.h>
>>>
>>> #include "gem/i915_gem_lmem.h"
>>> +#include "gt/intel_gt.h"
>>> #include "gt/intel_gt_print.h"
>>> #include "intel_gsc_binary_headers.h"
>>> #include "intel_gsc_fw.h"
>>> @@ -1213,7 +1214,7 @@ static int uc_fw_rsa_data_create(struct intel_uc_fw *uc_fw)
>>> return PTR_ERR(vma);
>>>
>>> vaddr = i915_gem_object_pin_map_unlocked(vma->obj,
>>> - i915_coherent_map_type(gt->i915, vma->obj, true));
>>> + intel_gt_coherent_map_type(gt, vma->obj, true));
>>> if (IS_ERR(vaddr)) {
>>> i915_vma_unpin_and_release(&vma, 0);
>>> err = PTR_ERR(vaddr);
>>> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
>>> index c7df47364013..c27fc5870608 100644
>>> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
>>> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c
>>> @@ -336,7 +336,7 @@ gsccs_create_buffer(struct intel_gt *gt,
>>> }
>>>
>>> /* return a virtual pointer */
>>> - *map = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
>>> + *map = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(gt, obj, true));
>>> if (IS_ERR(*map)) {
>>> drm_err(&i915->drm, "Failed to map gsccs backend %s.\n", bufname);
>>> err = PTR_ERR(*map);
>>> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
>>> index 1ce07d7e8769..8e0b5d48ddf6 100644
>>> --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
>>> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c
>>> @@ -11,6 +11,7 @@
>>> #include "gem/i915_gem_lmem.h"
>>>
>>> #include "i915_drv.h"
>>> +#include "gt/intel_gt.h"
>>>
>>> #include "intel_pxp.h"
>>> #include "intel_pxp_cmd_interface_42.h"
>>> @@ -245,7 +246,7 @@ static int alloc_streaming_command(struct intel_pxp *pxp)
>>> }
>>>
>>> /* map the lmem into the virtual memory pointer */
>>> - cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
>>> + cmd = i915_gem_object_pin_map_unlocked(obj, intel_gt_coherent_map_type(pxp->ctrl_gt, obj, true));
>>> if (IS_ERR(cmd)) {
>>> drm_err(&i915->drm, "Failed to map gsc message page!\n");
>>> err = PTR_ERR(cmd);
>>> diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
>>> index 3c5e0952f1b8..0f064930ef11 100644
>>> --- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
>>> +++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
>>> @@ -97,7 +97,7 @@ int igt_spinner_pin(struct igt_spinner *spin,
>>> if (!spin->batch) {
>>> unsigned int mode;
>>>
>>> - mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
>>> + mode = intel_gt_coherent_map_type(spin->gt, spin->obj, false);
>>> vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, &spin->batch_vma);
>>> if (IS_ERR(vaddr))
>>> return PTR_ERR(vaddr);
>>
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2023-07-26 9:12 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-07-21 14:05 [Intel-gfx] [PATCH dii-client 1/2] drm/i915: Make i915_coherent_map_type GT-centric Jonathan Cavitt
2023-07-21 14:05 ` [Intel-gfx] [PATCH dii-client 2/2] drm/i915/gt: Apply workaround 22016122933 correctly Jonathan Cavitt
2023-07-21 17:11 ` Yang, Fei
2023-07-24 10:24 ` Tvrtko Ursulin
2023-07-21 15:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [dii-client,1/2] drm/i915: Make i915_coherent_map_type GT-centric Patchwork
2023-07-21 15:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-07-21 15:33 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-07-21 17:05 ` [Intel-gfx] [PATCH dii-client 1/2] " Yang, Fei
2023-07-24 10:52 ` Tvrtko Ursulin
2023-07-25 13:23 ` Andi Shyti
-- strict thread matches above, loose matches on Subject: below --
2023-07-25 16:01 Jonathan Cavitt
2023-07-25 16:23 ` Tvrtko Ursulin
2023-07-25 17:39 ` Cavitt, Jonathan
2023-07-26 9:11 ` Tvrtko Ursulin
2023-07-26 6:40 ` Yang, Fei
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