Re: [PATCH] drm/i915: Enable aspect/centering panel fitting for Ironlake.

From: Zhenyu Wang <zhenyuw@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Enable aspect/centering panel fitting for Ironlake.
Date: Thu, 5 Aug 2010 09:11:26 +0800	[thread overview]
Message-ID: <20100805011126.GA780@zhen-devel.sh.intel.com> (raw)
In-Reply-To: <1280930641-24502-1-git-send-email-chris@chris-wilson.co.uk>

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On 2010.08.04 15:04:01 +0100, Chris Wilson wrote:
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/i915_drv.h      |    2 +
>  drivers/gpu/drm/i915/intel_display.c |   16 +++----
>  drivers/gpu/drm/i915/intel_lvds.c    |   70 ++++++++++++++++++++++++++++++++--
>  3 files changed, 75 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ad8dab5..6da15d8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -610,6 +610,8 @@ typedef struct drm_i915_private {
>  	struct sdvo_device_mapping sdvo_mappings[2];
>  	/* indicate whether the LVDS_BORDER should be enabled or not */
>  	unsigned int lvds_border_bits;
> +	/* Panel fitter placement and size for Ironlake+ */
> +	u32 pch_pf_pos, pch_pf_size;
>  
>  	struct drm_crtc *plane_to_crtc_mapping[2];
>  	struct drm_crtc *pipe_to_crtc_mapping[2];
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 07f893f..9b5fab4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1914,15 +1914,13 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
>  		/* Enable panel fitting for LVDS */
>  		if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)
>  		    || HAS_eDP || intel_pch_has_edp(crtc)) {
> -			temp = I915_READ(pf_ctl_reg);
> -			I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
> -
> -			/* currently full aspect */
> -			I915_WRITE(pf_win_pos, 0);
> -
> -			I915_WRITE(pf_win_size,
> -				   (dev_priv->panel_fixed_mode->hdisplay << 16) |
> -				   (dev_priv->panel_fixed_mode->vdisplay));
> +			if (dev_priv->pch_pf_size) {
> +				temp = I915_READ(pf_ctl_reg);
> +				I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
> +				I915_WRITE(pf_win_pos, dev_priv->pch_pf_pos);
> +				I915_WRITE(pf_win_size, dev_priv->pch_pf_size);
> +			} else
> +				I915_WRITE(pf_ctl_reg, temp & ~PF_ENABLE);
>  		}

So this breaks panel fitting setting on eDP...

-- 
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