From: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915: add pipe enable/disable functions
Date: Thu, 30 Dec 2010 10:00:54 -0800 [thread overview]
Message-ID: <20101230100054.29429cd2@jbarnes-desktop> (raw)
In-Reply-To: <1293730600-5687-2-git-send-email-jbarnes@virtuousgeek.org>
On Thu, 30 Dec 2010 09:36:40 -0800
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> These allow us to check for pipe enable/disable requirements at
> enable/disable time (e.g. plane status, pll status, etc.).
>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
> drivers/gpu/drm/i915/intel_display.c | 161 +++++++++++++++++++++++++++-------
> 1 files changed, 128 insertions(+), 33 deletions(-)
>
Don't apply this one yet, I'm still adding checks for the various
conditions on gen3, gen4 and ILK+ display configurations.
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2010-12-30 18:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-30 17:36 [PATCH 1/2] drm/i915: avoid reading non-existent PLL reg on Ironlake+ Jesse Barnes
2010-12-30 17:36 ` [PATCH 2/2] drm/i915: add pipe enable/disable functions Jesse Barnes
2010-12-30 18:00 ` Jesse Barnes [this message]
2010-12-30 19:50 ` [PATCH 1/2] drm/i915: avoid reading non-existent PLL reg on Ironlake+ Chris Wilson
2010-12-30 20:22 ` Jesse Barnes
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