From: Ben Widawsky <ben@bwidawsk.net>
To: Keith Packard <keithp@keithp.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm: Add Panel Self Refresh DP addresses
Date: Tue, 4 Oct 2011 02:38:27 +0000 [thread overview]
Message-ID: <20111004023827.GA6319@cloud01> (raw)
In-Reply-To: <yun4nzpmz3p.fsf@aiko.keithp.com>
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On Mon, Oct 03, 2011 at 04:31:22PM -0700, Keith Packard wrote:
> On Mon, 3 Oct 2011 15:14:14 -0700, Ben Widawsky <ben@bwidawsk.net> wrote:
>
> > +# define DP_PSR_SUPPORTED 1
>
> That's PSR version 1, not just a simple boolean
Ok.
>
> > +# define DP_PSR_SETUP_TIME_330 (0 << 1)
> > +# define DP_PSR_SETUP_TIME_275 (1 << 1)
> > +# define DP_PSR_SETUP_TIME_220 (2 << 1)
> > +# define DP_PSR_SETUP_TIME_165 (3 << 1)
> > +# define DP_PSR_SETUP_TIME_110 (4 << 1)
> > +# define DP_PSR_SETUP_TIME_55 (5 << 1)
> > +# define DP_PSR_SETUP_TIME_0 (6 << 1)
>
> Need a DP_PSR_SETUP_TIME_MASK to indicate which bits are relevant here
Ok.
>
> > +# define DP_PSR_MAIN_LIKE_ACTIVE (1 << 1)
>
> LINK, I assume
Yes
>
>
> > +# define DP_PSR_SINK_INACTIVE (1 << 0)
> > +# define DP_PSR_SINK_ACTIVE_SRC_SYNCED (1 << 1)
> > +# define DP_PSR_SINK_ACTIVE_RFB (1 << 2)
> > +# define DP_PSR_SINK_ACTIVE_SINK_SYNCED (1 << 3)
> > +# define DP_PSR_SINK_ACTIVE_RESYNC (1 << 4)
> > +# define DP_PSR_SINK_INTERNAL_ERROR (1 << 7)
>
> These are all wrong. Bits 2:0 are a 3 bit field.
That's really odd. Not sure how I screwed that up so badly. Good catch.
I guess you'll want a mask here too then.
Ben
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prev parent reply other threads:[~2011-10-04 2:34 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-20 22:29 [PATCH 1/2] drm: Add Panel Self Refresh DP addresses Ben Widawsky
2011-10-03 21:25 ` Keith Packard
2011-10-03 22:14 ` Ben Widawsky
2011-10-03 23:31 ` Keith Packard
2011-10-04 2:38 ` Ben Widawsky [this message]
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