Re: [PATCH] drm/i915: Don't lock panel registers when downclocking

From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Sean Paul <seanpaul@chromium.org>
Cc: intel-gfx@lists.freedesktop.org, jglasgow@chromium.org
Subject: Re: [PATCH] drm/i915: Don't lock panel registers when downclocking
Date: Mon, 13 Feb 2012 11:02:39 -0800	[thread overview]
Message-ID: <20120213110239.03d94d67@jbarnes-desktop> (raw)
In-Reply-To: <1329156891-16759-1-git-send-email-seanpaul@chromium.org>

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On Mon, 13 Feb 2012 13:14:51 -0500
Sean Paul <seanpaul@chromium.org> wrote:

> This patch replaces the locking from the downclock routines with an assert
> to ensure the registers are indeed unlocked. Without this patch, pre-SNB
> devices would lock the registers when downclocking which would cause a
> WARNING on suspend/resume with downclocking enabled.
> 
> Note: To hit this bug, you need to have lvds downclocking enabled.
> 
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   14 ++------------
>  1 files changed, 2 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index ebe71ed..33ef4f3 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6968,9 +6968,7 @@ static void intel_increase_pllclock(struct drm_crtc *crtc)
>  	if (!HAS_PIPE_CXSR(dev) && (dpll & DISPLAY_RATE_SELECT_FPA1)) {
>  		DRM_DEBUG_DRIVER("upclocking LVDS\n");
>  
> -		/* Unlock panel regs */
> -		I915_WRITE(PP_CONTROL,
> -			   I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
> +		assert_panel_unlocked(dev_priv, pipe);
>  
>  		dpll &= ~DISPLAY_RATE_SELECT_FPA1;
>  		I915_WRITE(dpll_reg, dpll);
> @@ -6979,9 +6977,6 @@ static void intel_increase_pllclock(struct drm_crtc *crtc)
>  		dpll = I915_READ(dpll_reg);
>  		if (dpll & DISPLAY_RATE_SELECT_FPA1)
>  			DRM_DEBUG_DRIVER("failed to upclock LVDS!\n");
> -
> -		/* ...and lock them again */
> -		I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3);
>  	}
>  
>  	/* Schedule downclock */
> @@ -7011,9 +7006,7 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
>  	if (!HAS_PIPE_CXSR(dev) && intel_crtc->lowfreq_avail) {
>  		DRM_DEBUG_DRIVER("downclocking LVDS\n");
>  
> -		/* Unlock panel regs */
> -		I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) |
> -			   PANEL_UNLOCK_REGS);
> +		assert_panel_unlocked(dev_priv, pipe);
>  
>  		dpll |= DISPLAY_RATE_SELECT_FPA1;
>  		I915_WRITE(dpll_reg, dpll);
> @@ -7021,9 +7014,6 @@ static void intel_decrease_pllclock(struct drm_crtc *crtc)
>  		dpll = I915_READ(dpll_reg);
>  		if (!(dpll & DISPLAY_RATE_SELECT_FPA1))
>  			DRM_DEBUG_DRIVER("failed to downclock LVDS!\n");
> -
> -		/* ...and lock them again */
> -		I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) & 0x3);
>  	}
>  
>  }

Yeah, looks good.

Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>

-- 
Jesse Barnes, Intel Open Source Technology Center

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