From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915: add missing SDVO bits for interlaced modes on ILK
Date: Tue, 14 Feb 2012 11:27:49 -0800 [thread overview]
Message-ID: <20120214112749.279162d6@jbarnes-desktop> (raw)
In-Reply-To: <1329246430-21453-1-git-send-email-przanoni@gmail.com>
[-- Attachment #1.1: Type: text/plain, Size: 2225 bytes --]
On Tue, 14 Feb 2012 17:07:09 -0200
Paulo Zanoni <przanoni@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> This was pointed by Jesse Barnes. The code now seems to follow the
> specification but I don't have an SDVO device to really test this.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_display.c | 7 ++++++-
> 2 files changed, 7 insertions(+), 1 deletions(-)
>
> Did someone test interlaced modes with SDVO?
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 5c62b78..52a06be 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3365,6 +3365,7 @@
> #define TRANS_INTERLACE_MASK (7<<21)
> #define TRANS_PROGRESSIVE (0<<21)
> #define TRANS_INTERLACED (3<<21)
> +#define TRANS_LEGACY_INTERLACED_ILK (2<<21)
> #define TRANS_8BPC (0<<5)
> #define TRANS_10BPC (1<<5)
> #define TRANS_6BPC (2<<5)
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index db7ccbb..3c8a332 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1267,6 +1267,7 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
> {
> int reg;
> u32 val, pipeconf_val;
> + struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
>
> /* PCH only available on ILK+ */
> BUG_ON(dev_priv->info->gen < 5);
> @@ -1293,7 +1294,11 @@ static void intel_enable_transcoder(struct drm_i915_private *dev_priv,
>
> val &= ~TRANS_INTERLACE_MASK;
> if ((pipeconf_val & PIPECONF_INTERLACE_MASK) == PIPECONF_INTERLACED_ILK)
> - val |= TRANS_INTERLACED;
> + if (HAS_PCH_IBX(dev_priv->dev) &&
> + intel_pipe_has_type(crtc, INTEL_OUTPUT_SDVO))
> + val |= TRANS_LEGACY_INTERLACED_ILK;
> + else
> + val |= TRANS_INTERLACED;
> else
> val |= TRANS_PROGRESSIVE;
>
Yep, looks correct. Thanks Paulo.
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 836 bytes --]
[-- Attachment #2: Type: text/plain, Size: 159 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2012-02-14 19:27 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20120210085936.76488e6b@jbarnes-desktop>
2012-02-14 19:07 ` [PATCH] drm/i915: add missing SDVO bits for interlaced modes on ILK Paulo Zanoni
2012-02-14 19:27 ` Jesse Barnes [this message]
2012-02-14 19:33 ` Daniel Vetter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20120214112749.279162d6@jbarnes-desktop \
--to=jbarnes@virtuousgeek.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=paulo.r.zanoni@intel.com \
--cc=przanoni@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox