From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Ben Widawsky <ben@bwidawsk.net>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/5] drm/i915: Dynamic Parity Detection handling
Date: Fri, 25 May 2012 11:06:13 -0700 [thread overview]
Message-ID: <20120525110613.50dc03e3@jbarnes-desktop> (raw)
In-Reply-To: <20120525103458.3f1831b4@jbarnes-desktop>
On Fri, 25 May 2012 10:34:58 -0700
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> > + misccpctl = I915_READ(GEN7_MISCCPCTL);
> > + I915_WRITE(GEN7_MISCCPCTL, misccpctl & ~GEN7_DOP_CLOCK_GATE_ENABLE);
>
> DOP clock gating should be unconditionally disabled, you can move this
> to the clock gating routine.
Ok I dug into this at your prodding and take it back. We can leave DOP
clock gating enabled; only VLV needs the unconditional disable, so we
don't need to worry about this if/until we add DPF there.
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2012-05-25 18:06 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-04-28 0:40 [PATCH 0/5] Dynamic Parity Detection/Correction Ben Widawsky
2012-04-28 0:40 ` [PATCH 1/5] drm/i915: Use a global lock for modifying global irq flags Ben Widawsky
2012-04-28 0:40 ` [PATCH 2/5] drm/i915: Dynamic Parity Detection handling Ben Widawsky
2012-05-01 18:05 ` Daniel Vetter
2012-05-25 17:34 ` Jesse Barnes
2012-05-25 18:06 ` Jesse Barnes [this message]
2012-05-25 18:25 ` Ben Widawsky
2012-04-28 0:40 ` [PATCH 3/5] drm/i915: enable parity error interrupts Ben Widawsky
2012-05-25 17:37 ` Jesse Barnes
2012-04-28 0:40 ` [PATCH 4/5] drm/i915: remap l3 on hw init Ben Widawsky
2012-05-25 17:39 ` Jesse Barnes
2012-05-25 18:41 ` Ben Widawsky
2012-04-28 0:40 ` [PATCH 5/5] drm/i915: l3 parity sysfs interface Ben Widawsky
2012-05-01 18:24 ` Daniel Vetter
2012-05-01 18:40 ` Ben Widawsky
2012-05-25 17:51 ` Jesse Barnes
2012-05-25 20:50 ` Ben Widawsky
2012-04-28 0:40 ` [PATCH] l3 parity tool Ben Widawsky
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