From: Ben Widawsky <ben@bwidawsk.net>
To: Ben Widawsky <ben@bwidawsk.net>
Cc: mesa-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 2/3] intel: wait render header updates
Date: Wed, 6 Jun 2012 14:13:49 -0700 [thread overview]
Message-ID: <20120606141349.6008bd35@bwidawsk.net> (raw)
In-Reply-To: <1338936159-26918-1-git-send-email-ben@bwidawsk.net>
On Tue, 5 Jun 2012 15:42:39 -0700
Ben Widawsky <ben@bwidawsk.net> wrote:
> make headers_install in kernel. Copy to here.
>
> v2: signed ns_timeout
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
This has been pushed with IRC
Acked-by Kenneth Graunke <kenneth@whitecape.org>
> ---
> include/drm/i915_drm.h | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
> index 725a8de..4931107 100644
> --- a/include/drm/i915_drm.h
> +++ b/include/drm/i915_drm.h
> @@ -192,6 +192,7 @@ typedef struct _drm_i915_sarea {
> #define DRM_I915_GEM_EXECBUFFER2 0x29
> #define DRM_I915_GET_SPRITE_COLORKEY 0x2a
> #define DRM_I915_SET_SPRITE_COLORKEY 0x2b
> +#define DRM_I915_GEM_WAIT 0x2c
>
> #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
> #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
> @@ -235,6 +236,7 @@ typedef struct _drm_i915_sarea {
> #define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs)
> #define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
> #define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
> +#define DRM_IOCTL_I915_GEM_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_WAIT, struct drm_i915_gem_wait)
>
> /* Allow drivers to submit batchbuffers directly to hardware, relying
> * on the security mechanisms provided by hardware.
> @@ -290,6 +292,7 @@ typedef struct drm_i915_irq_wait {
> #define I915_PARAM_HAS_GEN7_SOL_RESET 16
> #define I915_PARAM_HAS_LLC 17
> #define I915_PARAM_HAS_ALIASING_PPGTT 18
> +#define I915_PARAM_HAS_WAIT_TIMEOUT 19
>
> typedef struct drm_i915_getparam {
> int param;
> @@ -878,4 +881,12 @@ struct drm_intel_sprite_colorkey {
> __u32 flags;
> };
>
> +struct drm_i915_gem_wait {
> + /** Handle of BO we shall wait on */
> + __u32 bo_handle;
> + __u32 flags;
> + /** Number of nanoseconds to wait, Returns time remaining. */
> + __s64 timeout_ns;
> +};
> +
> #endif /* _I915_DRM_H_ */
--
Ben Widawsky, Intel Open Source Technology Center
next prev parent reply other threads:[~2012-06-06 21:13 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-05 18:58 [PATCH 1/3] intel: sanitize i915_drm.h Ben Widawsky
2012-06-05 18:58 ` [PATCH 2/3] intel: wait render header updates Ben Widawsky
2012-06-05 22:42 ` Ben Widawsky
2012-06-06 21:13 ` Ben Widawsky [this message]
2012-06-05 18:58 ` [PATCH 3/3] intel: wait render timeout implementation Ben Widawsky
2012-06-05 22:35 ` Ben Widawsky
2012-06-05 22:43 ` Ben Widawsky
2012-06-06 9:33 ` Daniel Vetter
2012-06-06 21:26 ` Ben Widawsky
2012-06-06 21:16 ` [PATCH 1/3] intel: sanitize i915_drm.h Ben Widawsky
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