From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Add comments to explain the BSD tail write workaround
Date: Wed, 11 Jul 2012 00:47:07 +0200 [thread overview]
Message-ID: <20120710224707.GE5108@phenom.ffwll.local> (raw)
In-Reply-To: <1341504841-7832-1-git-send-email-chris@chris-wilson.co.uk>
On Thu, Jul 05, 2012 at 05:14:01PM +0100, Chris Wilson wrote:
> Having had to dive into the bspec to understand what each stage of the
> workaround meant, and how that the ring broadcasting IDLE corresponded
> with the GT powering down the ring (i.e. rc6) add comments to aide
> the next reader.
>
> And since the register "is used to control all aspects of PSMI and power
> saving functions" that makes it quite interesting to inspect with
> regards to RC6 hangs, so add it to the error-state.
>
> v2: Rediscover the piece of magic, set the RNCID to 0 before waiting for
> the ring to wake up.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Mail: daniel@ffwll.ch
Mobile: +41 (0)79 365 57 48
prev parent reply other threads:[~2012-07-10 22:47 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-05 15:25 [PATCH] drm/i915: Add comments to explain the BSD tail write workaround Chris Wilson
2012-07-05 16:14 ` Chris Wilson
2012-07-10 22:47 ` Daniel Vetter [this message]
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