From: Daniel Vetter <daniel@ffwll.ch>
To: "Lespiau, Damien" <damien.lespiau@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915: don't implement WaDisableEarlyCull for Haswell
Date: Wed, 10 Oct 2012 23:46:43 +0200 [thread overview]
Message-ID: <20121010214642.GA10810@phenom.ffwll.local> (raw)
In-Reply-To: <CAPX-8+9m4yUiN1mPNRDqNRysu1BPcvkm5oxW4=7TeAZDZCGdGg@mail.gmail.com>
On Wed, Oct 10, 2012 at 10:42:52PM +0100, Lespiau, Damien wrote:
> On Wed, Oct 10, 2012 at 10:09 PM, Paulo Zanoni <przanoni@gmail.com> wrote:
> > From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >
> > Introduced in commit 87f8020ec9e3069597746040a4e8655189bc0c1a:
> > drm/i915: implement WaDisableEarlyCull for VLV and IVB
> >
> > Notice that the original patch sent to the mailing list did not
> > include the Haswell chunk, it was added later.
> >
> > The bit set by the commit does not exist on Haswell machines (at least
> > that's what the documentation says). Also, the commit gives me a GPU
> > hang every time we're loading the driver. So let's revert the Haswell
> > chunk, making the patch do only what its title actually says.
> >
> > Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> Indeed the bit definition has disappeared in the documentation, but
> the wa is listed in the wa database. A hang is very handy to decide
> who is right :)
>
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
prev parent reply other threads:[~2012-10-10 21:45 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-10 21:09 [PATCH] drm/i915: don't implement WaDisableEarlyCull for Haswell Paulo Zanoni
2012-10-10 21:42 ` Lespiau, Damien
2012-10-10 21:46 ` Daniel Vetter [this message]
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