From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: implement hsw WaDisableVFUnitClockGating
Date: Thu, 18 Oct 2012 21:42:51 +0200 [thread overview]
Message-ID: <20121018194251.GD5309@phenom.ffwll.local> (raw)
In-Reply-To: <CA+gsUGR-eZri--QmWNGgg=+iY+wncPA4xtunktwrtfVx2tbsKA@mail.gmail.com>
On Thu, Oct 18, 2012 at 02:06:28PM -0300, Paulo Zanoni wrote:
> Hi
>
> 2012/10/17 Daniel Vetter <daniel.vetter@ffwll.ch>:
> > Found while strolling for ilk workarounds since this one is listed
> > there, too. I think that's a mistake though, since the w/a isn't
> > listed for snb/ivb, and the relevant register doesn't seem to exist on
> > ilk.
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> This needs a comment saying that it's just for pre-production
> hardware, needs to be removed later. With that:
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Meh, I've missed that totally. In that case I think I'll drop this patch
here. Thanks anyway for review&testing.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
prev parent reply other threads:[~2012-10-18 19:41 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-17 19:58 [PATCH] drm/i915: implement hsw WaDisableVFUnitClockGating Daniel Vetter
2012-10-18 17:06 ` Paulo Zanoni
2012-10-18 19:42 ` Daniel Vetter [this message]
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