[PATCH] drm/i915: implement hsw WaDisableVFUnitClockGating

[PATCH] drm/i915: implement hsw WaDisableVFUnitClockGating

[Daniel Vetter]

Found while strolling for ilk workarounds since this one is listed
there, too. I think that's a mistake though, since the w/a isn't
listed for snb/ivb, and the relevant register doesn't seem to exist on
ilk.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/i915_reg.h |    1 +
 drivers/gpu/drm/i915/intel_pm.c |    7 +++++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a4162dd..555a90f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4126,6 +4126,7 @@
 # define GEN6_CSUNIT_CLOCK_GATE_DISABLE			(1 << 7)
 
 #define GEN6_UCGCTL2				0x9404
+# define GEN7_VFUNIT_CLOCK_GATE_DISABLE		(1<<31)
 # define GEN7_VDSUNIT_CLOCK_GATE_DISABLE		(1 << 30)
 # define GEN7_TDLUNIT_CLOCK_GATE_DISABLE		(1 << 22)
 # define GEN6_RCZUNIT_CLOCK_GATE_DISABLE		(1 << 13)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 72f41aa..48bbcc1 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3507,8 +3507,11 @@ static void haswell_init_clock_gating(struct drm_device *dev)
 
 	/* According to the spec, bit 13 (RCZUNIT) must be set on IVB.
 	 * This implements the WaDisableRCZUnitClockGating workaround.
-	 */
-	I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
+	 * New w/a on hsw: bit 31 must be set, too. This implements for
+	 * WaDisableVFUnitClockGating */
+	I915_WRITE(GEN6_UCGCTL2,
+		   GEN6_RCZUNIT_CLOCK_GATE_DISABLE |
+		   GEN7_VFUNIT_CLOCK_GATE_DISABLE);
 
 	I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
 
-- 
1.7.10.4

Re: [PATCH] drm/i915: implement hsw WaDisableVFUnitClockGating

[Paulo Zanoni]

Hi

2012/10/17 Daniel Vetter <daniel.vetter@ffwll.ch>:
> Found while strolling for ilk workarounds since this one is listed
> there, too. I think that's a mistake though, since the w/a isn't
> listed for snb/ivb, and the relevant register doesn't seem to exist on
> ilk.
>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

This needs a comment saying that it's just for pre-production
hardware, needs to be removed later. With that:
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_reg.h |    1 +
>  drivers/gpu/drm/i915/intel_pm.c |    7 +++++--
>  2 files changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index a4162dd..555a90f 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4126,6 +4126,7 @@
>  # define GEN6_CSUNIT_CLOCK_GATE_DISABLE                        (1 << 7)
>
>  #define GEN6_UCGCTL2                           0x9404
> +# define GEN7_VFUNIT_CLOCK_GATE_DISABLE                (1<<31)
>  # define GEN7_VDSUNIT_CLOCK_GATE_DISABLE               (1 << 30)
>  # define GEN7_TDLUNIT_CLOCK_GATE_DISABLE               (1 << 22)
>  # define GEN6_RCZUNIT_CLOCK_GATE_DISABLE               (1 << 13)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 72f41aa..48bbcc1 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3507,8 +3507,11 @@ static void haswell_init_clock_gating(struct drm_device *dev)
>
>         /* According to the spec, bit 13 (RCZUNIT) must be set on IVB.
>          * This implements the WaDisableRCZUnitClockGating workaround.
> -        */
> -       I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
> +        * New w/a on hsw: bit 31 must be set, too. This implements for
> +        * WaDisableVFUnitClockGating */
> +       I915_WRITE(GEN6_UCGCTL2,
> +                  GEN6_RCZUNIT_CLOCK_GATE_DISABLE |
> +                  GEN7_VFUNIT_CLOCK_GATE_DISABLE);
>
>         I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
>
> --
> 1.7.10.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni

Re: [PATCH] drm/i915: implement hsw WaDisableVFUnitClockGating

[Daniel Vetter]

On Thu, Oct 18, 2012 at 02:06:28PM -0300, Paulo Zanoni wrote:
> Hi
> 
> 2012/10/17 Daniel Vetter <daniel.vetter@ffwll.ch>:
> > Found while strolling for ilk workarounds since this one is listed
> > there, too. I think that's a mistake though, since the w/a isn't
> > listed for snb/ivb, and the relevant register doesn't seem to exist on
> > ilk.
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> This needs a comment saying that it's just for pre-production
> hardware, needs to be removed later. With that:
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Meh, I've missed that totally. In that case I think I'll drop this patch
here. Thanks anyway for review&testing.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch