From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 07/11] drm/i915: pixel_size == cpp
Date: Wed, 31 Oct 2012 13:27:08 -0700 [thread overview]
Message-ID: <20121031132708.68527c7b@jbarnes-desktop> (raw)
In-Reply-To: <1351698624-26626-8-git-send-email-ville.syrjala@linux.intel.com>
On Wed, 31 Oct 2012 17:50:20 +0200
ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Use drm_format_plane_cpp() to get 'pixel_size' in the sprite code.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_sprite.c | 19 +++----------------
> 1 files changed, 3 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index e69035d..a4fe7f5 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -48,7 +48,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
> struct intel_plane *intel_plane = to_intel_plane(plane);
> int pipe = intel_plane->pipe;
> u32 sprctl, sprscale = 0;
> - int pixel_size;
> + int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
>
> sprctl = I915_READ(SPRCTL(pipe));
>
> @@ -61,32 +61,25 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
> switch (fb->pixel_format) {
> case DRM_FORMAT_XBGR8888:
> sprctl |= SPRITE_FORMAT_RGBX888 | SPRITE_RGB_ORDER_RGBX;
> - pixel_size = 4;
> break;
> case DRM_FORMAT_XRGB8888:
> sprctl |= SPRITE_FORMAT_RGBX888;
> - pixel_size = 4;
> break;
> case DRM_FORMAT_YUYV:
> sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_YUYV;
> - pixel_size = 2;
> break;
> case DRM_FORMAT_YVYU:
> sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_YVYU;
> - pixel_size = 2;
> break;
> case DRM_FORMAT_UYVY:
> sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_UYVY;
> - pixel_size = 2;
> break;
> case DRM_FORMAT_VYUY:
> sprctl |= SPRITE_FORMAT_YUV422 | SPRITE_YUV_ORDER_VYUY;
> - pixel_size = 2;
> break;
> default:
> DRM_DEBUG_DRIVER("bad pixel format, assuming RGBX888\n");
> sprctl |= SPRITE_FORMAT_RGBX888;
> - pixel_size = 4;
> break;
> }
>
> @@ -227,8 +220,9 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
> struct drm_device *dev = plane->dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_plane *intel_plane = to_intel_plane(plane);
> - int pipe = intel_plane->pipe, pixel_size;
> + int pipe = intel_plane->pipe;
> u32 dvscntr, dvsscale;
> + int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
>
> dvscntr = I915_READ(DVSCNTR(pipe));
>
> @@ -241,32 +235,25 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
> switch (fb->pixel_format) {
> case DRM_FORMAT_XBGR8888:
> dvscntr |= DVS_FORMAT_RGBX888 | DVS_RGB_ORDER_XBGR;
> - pixel_size = 4;
> break;
> case DRM_FORMAT_XRGB8888:
> dvscntr |= DVS_FORMAT_RGBX888;
> - pixel_size = 4;
> break;
> case DRM_FORMAT_YUYV:
> dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_YUYV;
> - pixel_size = 2;
> break;
> case DRM_FORMAT_YVYU:
> dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_YVYU;
> - pixel_size = 2;
> break;
> case DRM_FORMAT_UYVY:
> dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_UYVY;
> - pixel_size = 2;
> break;
> case DRM_FORMAT_VYUY:
> dvscntr |= DVS_FORMAT_YUV422 | DVS_YUV_ORDER_VYUY;
> - pixel_size = 2;
> break;
> default:
> DRM_DEBUG_DRIVER("bad pixel format, assuming RGBX888\n");
> dvscntr |= DVS_FORMAT_RGBX888;
> - pixel_size = 4;
> break;
> }
>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
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Intel-gfx mailing list
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next prev parent reply other threads:[~2012-10-31 20:26 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-31 15:50 [PATCH 00/11] drm/i915: Patches cherry-picked from drm_atomic ville.syrjala
2012-10-31 15:50 ` [PATCH 01/11] drm/i915: Fix display pixel format handling ville.syrjala
2012-10-31 20:20 ` Jesse Barnes
2012-11-01 14:03 ` Ville Syrjälä
2012-11-01 14:06 ` Chris Wilson
2012-10-31 15:50 ` [PATCH 02/11] drm/i915: Add SURFLIVE register definitions ville.syrjala
2012-10-31 20:23 ` Jesse Barnes
2012-10-31 22:57 ` Daniel Vetter
2012-11-01 14:16 ` Ville Syrjälä
2012-11-01 14:19 ` Daniel Vetter
2012-11-01 14:23 ` Ville Syrjälä
2012-10-31 15:50 ` [PATCH 03/11] drm/i915: Implement execbuffer wait for all planes ville.syrjala
2012-10-31 15:59 ` Chris Wilson
2012-10-31 15:50 ` [PATCH 04/11] drm/i915: Factor out i9xx_compute_clocks() like ironlake_compute_clocks() ville.syrjala
2012-10-31 16:28 ` Daniel Vetter
2012-10-31 17:04 ` Ville Syrjälä
2012-10-31 18:29 ` Daniel Vetter
2012-10-31 15:50 ` [PATCH 05/11] drm/i915: Check framebuffer stride more thoroughly ville.syrjala
2012-10-31 20:25 ` Jesse Barnes
2012-11-01 14:06 ` Ville Syrjälä
2012-10-31 15:50 ` [PATCH 06/11] drm/i915: Check the framebuffer offset ville.syrjala
2012-10-31 20:26 ` Jesse Barnes
2012-11-01 14:09 ` Ville Syrjälä
2012-11-01 14:18 ` Daniel Vetter
2012-11-01 14:40 ` Jesse Barnes
2012-11-01 14:40 ` Ville Syrjälä
2012-10-31 15:50 ` [PATCH 07/11] drm/i915: pixel_size == cpp ville.syrjala
2012-10-31 20:27 ` Jesse Barnes [this message]
2012-10-31 15:50 ` [PATCH 08/11] drm/i915: Bad pixel formats can't reach the sprite code ville.syrjala
2012-10-31 20:27 ` Jesse Barnes
2012-10-31 15:50 ` [PATCH 09/11] drm/i915: Consitify adjusted_mode parameter ville.syrjala
2012-10-31 15:50 ` [PATCH 10/11] drm/i915: Constify mode argument to intel_modeset_adjusted_mode() ville.syrjala
2012-10-31 15:50 ` [PATCH 11/11] drm/i915: Introduce intel_crtc_update_sarea_pos() ville.syrjala
2012-10-31 20:27 ` Jesse Barnes
2012-10-31 23:02 ` Daniel Vetter
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