add lpt_init_pch_refclk bike-sheds

add lpt_init_pch_refclk bike-sheds

[Damien Lespiau]

As Paulo is on holidays, here are the bikesheds as patches on top of his

commit 88ab6308995e7180d25489ef35e323fcb6373601
Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
Date:   Sat Dec 1 12:04:25 2012 -0200

    drm/i915: add lpt_init_pch_refclk

As those changes are not tested (but hopefully should be straightforward to
counter review :) I've joined them as patches that can be squashed into his 
at will.

HTH,

--
Damien

[PATCH 1/3] drm/i915: Introduce an IS_SDV() macro

[Damien Lespiau]

From: Damien Lespiau <damien.lespiau@intel.com>

Not to have raw checks on the PCI ID in the code. Make
lpt_init_pch_refclk() use it.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      |    2 ++
 drivers/gpu/drm/i915/intel_display.c |   16 ++++++----------
 2 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a1885c3..70df0c4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1166,6 +1166,8 @@ struct drm_i915_file_private {
 #define IS_VALLEYVIEW(dev)	(INTEL_INFO(dev)->is_valleyview)
 #define IS_HASWELL(dev)	(INTEL_INFO(dev)->is_haswell)
 #define IS_MOBILE(dev)		(INTEL_INFO(dev)->is_mobile)
+#define IS_SDV(dev)		(IS_HASWELL(dev) && \
+				 ((dev)->pci_device & 0xFF00) == 0x0C00)
 #define IS_ULT(dev)		(IS_HASWELL(dev) && \
 				 ((dev)->pci_device & 0xFF00) == 0x0A00)
 
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6e6a143..9f5c1dc 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4985,7 +4985,6 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
 	struct drm_mode_config *mode_config = &dev->mode_config;
 	struct intel_encoder *encoder;
 	bool has_vga = false;
-	bool is_sdv = false;
 	u32 tmp;
 
 	list_for_each_entry(encoder, &mode_config->encoder_list, base.head) {
@@ -4999,9 +4998,6 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
 	if (!has_vga)
 		return;
 
-	if (IS_HASWELL(dev) && (dev->pci_device & 0xFF00) == 0x0C00)
-		is_sdv = true;
-
 	tmp = intel_sbi_read(dev_priv, SBI_SSCCTL, SBI_ICLK);
 	tmp &= ~SBI_SSCCTL_DISABLE;
 	tmp |= SBI_SSCCTL_PATHALT;
@@ -5013,7 +5009,7 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
 	tmp &= ~SBI_SSCCTL_PATHALT;
 	intel_sbi_write(dev_priv, SBI_SSCCTL, tmp, SBI_ICLK);
 
-	if (!is_sdv) {
+	if (!IS_SDV(dev)) {
 		tmp = I915_READ(SOUTH_CHICKEN2);
 		tmp |= FDI_MPHY_IOSFSB_RESET_CTL;
 		I915_WRITE(SOUTH_CHICKEN2, tmp);
@@ -5037,14 +5033,14 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
 	tmp |= (0x12 << 24);
 	intel_sbi_write(dev_priv, 0x8008, tmp, SBI_MPHY);
 
-	if (!is_sdv) {
+	if (!IS_SDV(dev)) {
 		tmp = intel_sbi_read(dev_priv, 0x808C, SBI_MPHY);
 		tmp &= ~(0x3 << 6);
 		tmp |= (1 << 6) | (1 << 0);
 		intel_sbi_write(dev_priv, 0x808C, tmp, SBI_MPHY);
 	}
 
-	if (is_sdv) {
+	if (IS_SDV(dev)) {
 		tmp = intel_sbi_read(dev_priv, 0x800C, SBI_MPHY);
 		tmp |= 0x7FFF;
 		intel_sbi_write(dev_priv, 0x800C, tmp, SBI_MPHY);
@@ -5058,7 +5054,7 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
 	tmp |= (1 << 11);
 	intel_sbi_write(dev_priv, 0x2108, tmp, SBI_MPHY);
 
-	if (is_sdv) {
+	if (IS_SDV(dev)) {
 		tmp = intel_sbi_read(dev_priv, 0x2038, SBI_MPHY);
 		tmp |= (0x3F << 24) | (0xF << 20) | (0xF << 16);
 		intel_sbi_write(dev_priv, 0x2038, tmp, SBI_MPHY);
@@ -5084,7 +5080,7 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
 	tmp |= (1 << 24) | (1 << 21) | (1 << 18);
 	intel_sbi_write(dev_priv, 0x216C, tmp, SBI_MPHY);
 
-	if (!is_sdv) {
+	if (!IS_SDV(dev)) {
 		tmp = intel_sbi_read(dev_priv, 0x2080, SBI_MPHY);
 		tmp &= ~(7 << 13);
 		tmp |= (5 << 13);
@@ -5116,7 +5112,7 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
 	tmp |= (0x1C << 16);
 	intel_sbi_write(dev_priv, 0x2198, tmp, SBI_MPHY);
 
-	if (!is_sdv) {
+	if (!IS_SDV(dev)) {
 		tmp = intel_sbi_read(dev_priv, 0x20C4, SBI_MPHY);
 		tmp |= (1 << 27);
 		intel_sbi_write(dev_priv, 0x20C4, tmp, SBI_MPHY);
-- 
1.7.7.5

[PATCH 2/3] drm/i915: Fix a typo in a lpt_init_pch_refclk() error message

[Damien Lespiau]

From: Damien Lespiau <damien.lespiau@intel.com>

s/resert/reset/

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9f5c1dc..0eba466 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5016,7 +5016,7 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
 
 		if (wait_for_atomic_us(I915_READ(SOUTH_CHICKEN2) &
 				       FDI_MPHY_IOSFSB_RESET_STATUS, 100))
-			DRM_ERROR("FDI mPHY resert assert timeout\n");
+			DRM_ERROR("FDI mPHY reset assert timeout\n");
 
 		tmp = I915_READ(SOUTH_CHICKEN2);
 		tmp &= ~FDI_MPHY_IOSFSB_RESET_CTL;
-- 
1.7.7.5

Re: [PATCH 2/3] drm/i915: Fix a typo in a lpt_init_pch_refclk() error message

[Daniel Vetter]

On Sat, Dec 08, 2012 at 06:08:10PM +0000, Damien Lespiau wrote:
> From: Damien Lespiau <damien.lespiau@intel.com>
> 
> s/resert/reset/
> 
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>

Squashed into Paulo's patch, thanks for reviewing that sucker. I've punted
on the other two, we better rip out the sdv stuff as soon as we don't need
it any more instead of beautifying it, and for the ULT thing I've added a
comment.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

[PATCH 3/3] drm/i915: Correctly enable CLKOUT_DP for ULT platoforms

[Damien Lespiau]

From: Damien Lespiau <damien.lespiau@intel.com>

SBI_GEN0 is used instead of SBI_DBUFF0 on ULT platforms.

Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h      |    2 ++
 drivers/gpu/drm/i915/intel_display.c |   12 +++++++++---
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index acf768d..90c4f43 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4563,6 +4563,8 @@
 #define   SBI_SSCAUXDIV_FINALDIV2SEL(x)		((x)<<4)
 #define  SBI_DBUFF0				0x2a00
 #define   SBI_DBUFF0_ENABLE			(1<<0)
+#define  SBI_GEN0				0x1f00
+#define   SBI_GEN0_ENABLE			(1<<0)
 
 /* LPT PIXCLK_GATE */
 #define PIXCLK_GATE			0xC6020
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0eba466..6472065 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5132,9 +5132,15 @@ static void lpt_init_pch_refclk(struct drm_device *dev)
 		intel_sbi_write(dev_priv, 0x21EC, tmp, SBI_MPHY);
 	}
 
-	tmp = intel_sbi_read(dev_priv, SBI_DBUFF0, SBI_ICLK);
-	tmp |= SBI_DBUFF0_ENABLE;
-	intel_sbi_write(dev_priv, SBI_DBUFF0, tmp, SBI_ICLK);
+	if (IS_ULT(dev)) {
+		tmp = intel_sbi_read(dev_priv, SBI_GEN0, SBI_ICLK);
+		tmp |= SBI_GEN0_ENABLE;
+		intel_sbi_write(dev_priv, SBI_GEN0, tmp, SBI_ICLK);
+	} else {
+		tmp = intel_sbi_read(dev_priv, SBI_DBUFF0, SBI_ICLK);
+		tmp |= SBI_DBUFF0_ENABLE;
+		intel_sbi_write(dev_priv, SBI_DBUFF0, tmp, SBI_ICLK);
+	}
 }
 
 /*
-- 
1.7.7.5