From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 07/10] drm/i915: print Gen5+ CPU poison interrupts
Date: Fri, 8 Feb 2013 11:42:39 -0800 [thread overview]
Message-ID: <20130208114239.44cf5bf6@jbarnes-desktop> (raw)
In-Reply-To: <1360352121-3989-8-git-send-email-przanoni@gmail.com>
On Fri, 8 Feb 2013 17:35:18 -0200
Paulo Zanoni <przanoni@gmail.com> wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> On ILK/SNB all we need to do is to enable the "poison" bit, but on
> IVB/HSW we need to enable the CPU error interrupt register, which is
> responsible not only for poison interrupts, but also other things.
> This includes the "unclaimed register" interrupt, so on the IVB irq
> handler we now need to: (i) check whether the interrupt was triggered by an
> unclaimed register and (ii) mask the error interrupt bit so we don't
> risk generating "unclaimed register" interrupts form inside the
> interrupt handler.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
OTOH there's nothing the user can do about it... so we might do a
WARN_ONCE or something here instead. But even then, I'm not sure
there's much *we* can do about these, as they indicate a corruption in
the communication between the CPU and PCH.
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2013-02-08 19:42 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-08 19:35 [PATCH 00/10] Display error reporting Paulo Zanoni
2013-02-08 19:35 ` [PATCH 01/10] drm/i915: drm/i915: create macros for the "unclaimed register" checks Paulo Zanoni
2013-02-18 18:11 ` Daniel Vetter
2013-02-08 19:35 ` [PATCH 02/10] drm/i915: use FPGA_DBG " Paulo Zanoni
2013-02-08 19:35 ` [PATCH 03/10] drm/i915: clear the FPGA_DBG_RM_NOCLAIM bit at driver init Paulo Zanoni
2013-02-09 17:19 ` Ben Widawsky
2013-02-14 20:26 ` Paulo Zanoni
2013-02-15 4:07 ` Ben Widawsky
2013-02-08 19:35 ` [PATCH 04/10] drm/i915: add ibx_irq_postinstall Paulo Zanoni
2013-02-09 17:27 ` Ben Widawsky
2013-02-09 19:07 ` Daniel Vetter
2013-02-08 19:35 ` [PATCH 05/10] drm/i915: also disable south interrupts when handling them Paulo Zanoni
2013-02-09 19:29 ` Daniel Vetter
2013-02-20 20:06 ` Paulo Zanoni
2013-02-20 20:24 ` Daniel Vetter
2013-02-08 19:35 ` [PATCH 06/10] drm/i915: print PCH poison interrupts Paulo Zanoni
2013-02-08 19:35 ` [PATCH 07/10] drm/i915: print Gen5+ CPU " Paulo Zanoni
2013-02-08 19:42 ` Jesse Barnes [this message]
2013-02-08 19:54 ` Paulo Zanoni
2013-02-08 20:01 ` Jesse Barnes
2013-02-09 17:30 ` Ben Widawsky
2013-02-14 20:35 ` Paulo Zanoni
2013-02-15 4:05 ` Ben Widawsky
2013-02-08 19:35 ` [PATCH 08/10] drm/i915: print PCH FIFO underrun interrupts Paulo Zanoni
2013-02-09 19:43 ` Daniel Vetter
2013-02-14 20:53 ` Paulo Zanoni
2013-02-14 21:13 ` Daniel Vetter
2013-02-14 21:32 ` Paulo Zanoni
2013-02-08 19:35 ` [PATCH 09/10] drm/i915: print CPU FIFO underruns Paulo Zanoni
2013-02-08 19:35 ` [PATCH 10/10] drm/i915: also POSTING_READ(DEIER) on ivybridge_irq_handler Paulo Zanoni
2013-02-09 17:34 ` Ben Widawsky
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