From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 01/10] drm/i915: drm/i915: create macros for the "unclaimed register" checks
Date: Mon, 18 Feb 2013 19:11:38 +0100 [thread overview]
Message-ID: <20130218181138.GS5813@phenom.ffwll.local> (raw)
In-Reply-To: <1360352121-3989-2-git-send-email-przanoni@gmail.com>
On Fri, Feb 08, 2013 at 05:35:12PM -0200, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> This avoids polluting i915_write##x and also allows us to reuse code
> on i915_read##x.
>
> v2: Rebase
>
> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> (v1)
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Checkpatch complained about the macro parameters not being enclosed in
(reg) params. I tend to agree, so maybe just extract the entire thing into
a static inline function while at it?
-Daniel
> ---
> drivers/gpu/drm/i915/i915_drv.c | 24 ++++++++++++++++--------
> 1 file changed, 16 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index c5b8c81..e24c337 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1131,6 +1131,20 @@ ilk_dummy_write(struct drm_i915_private *dev_priv)
> I915_WRITE_NOTRACE(MI_MODE, 0);
> }
>
> +#define UNCLAIMED_REG_CLEAR(dev_priv, reg) \
> + if (IS_HASWELL(dev_priv->dev) && \
> + (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
> + DRM_ERROR("Unknown unclaimed register before writing to %x\n", reg); \
> + I915_WRITE_NOTRACE(GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED); \
> + }
> +
> +#define UNCLAIMED_REG_CHECK(dev_priv, reg) \
> + if (IS_HASWELL(dev_priv->dev) && \
> + (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
> + DRM_ERROR("Unclaimed write to %x\n", reg); \
> + writel(ERR_INT_MMIO_UNCLAIMED, dev_priv->regs + GEN7_ERR_INT); \
> + }
> +
> #define __i915_read(x, y) \
> u##x i915_read##x(struct drm_i915_private *dev_priv, u32 reg) { \
> u##x val = 0; \
> @@ -1167,18 +1181,12 @@ void i915_write##x(struct drm_i915_private *dev_priv, u32 reg, u##x val) { \
> } \
> if (IS_GEN5(dev_priv->dev)) \
> ilk_dummy_write(dev_priv); \
> - if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
> - DRM_ERROR("Unknown unclaimed register before writing to %x\n", reg); \
> - I915_WRITE_NOTRACE(GEN7_ERR_INT, ERR_INT_MMIO_UNCLAIMED); \
> - } \
> + UNCLAIMED_REG_CLEAR(dev_priv, reg); \
> write##y(val, dev_priv->regs + reg); \
> if (unlikely(__fifo_ret)) { \
> gen6_gt_check_fifodbg(dev_priv); \
> } \
> - if (IS_HASWELL(dev_priv->dev) && (I915_READ_NOTRACE(GEN7_ERR_INT) & ERR_INT_MMIO_UNCLAIMED)) { \
> - DRM_ERROR("Unclaimed write to %x\n", reg); \
> - writel(ERR_INT_MMIO_UNCLAIMED, dev_priv->regs + GEN7_ERR_INT); \
> - } \
> + UNCLAIMED_REG_CHECK(dev_priv, reg); \
> }
> __i915_write(8, b)
> __i915_write(16, w)
> --
> 1.7.10.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2013-02-18 18:09 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-02-08 19:35 [PATCH 00/10] Display error reporting Paulo Zanoni
2013-02-08 19:35 ` [PATCH 01/10] drm/i915: drm/i915: create macros for the "unclaimed register" checks Paulo Zanoni
2013-02-18 18:11 ` Daniel Vetter [this message]
2013-02-08 19:35 ` [PATCH 02/10] drm/i915: use FPGA_DBG " Paulo Zanoni
2013-02-08 19:35 ` [PATCH 03/10] drm/i915: clear the FPGA_DBG_RM_NOCLAIM bit at driver init Paulo Zanoni
2013-02-09 17:19 ` Ben Widawsky
2013-02-14 20:26 ` Paulo Zanoni
2013-02-15 4:07 ` Ben Widawsky
2013-02-08 19:35 ` [PATCH 04/10] drm/i915: add ibx_irq_postinstall Paulo Zanoni
2013-02-09 17:27 ` Ben Widawsky
2013-02-09 19:07 ` Daniel Vetter
2013-02-08 19:35 ` [PATCH 05/10] drm/i915: also disable south interrupts when handling them Paulo Zanoni
2013-02-09 19:29 ` Daniel Vetter
2013-02-20 20:06 ` Paulo Zanoni
2013-02-20 20:24 ` Daniel Vetter
2013-02-08 19:35 ` [PATCH 06/10] drm/i915: print PCH poison interrupts Paulo Zanoni
2013-02-08 19:35 ` [PATCH 07/10] drm/i915: print Gen5+ CPU " Paulo Zanoni
2013-02-08 19:42 ` Jesse Barnes
2013-02-08 19:54 ` Paulo Zanoni
2013-02-08 20:01 ` Jesse Barnes
2013-02-09 17:30 ` Ben Widawsky
2013-02-14 20:35 ` Paulo Zanoni
2013-02-15 4:05 ` Ben Widawsky
2013-02-08 19:35 ` [PATCH 08/10] drm/i915: print PCH FIFO underrun interrupts Paulo Zanoni
2013-02-09 19:43 ` Daniel Vetter
2013-02-14 20:53 ` Paulo Zanoni
2013-02-14 21:13 ` Daniel Vetter
2013-02-14 21:32 ` Paulo Zanoni
2013-02-08 19:35 ` [PATCH 09/10] drm/i915: print CPU FIFO underruns Paulo Zanoni
2013-02-08 19:35 ` [PATCH 10/10] drm/i915: also POSTING_READ(DEIER) on ivybridge_irq_handler Paulo Zanoni
2013-02-09 17:34 ` Ben Widawsky
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