Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 08/28] drm/i915: implement WaGTEnableMiFlush on VLV
Date: Fri, 1 Mar 2013 23:47:01 +0200	[thread overview]
Message-ID: <20130301214701.GF4469@intel.com> (raw)
In-Reply-To: <1362172471-7643-9-git-send-email-jbarnes@virtuousgeek.org>

On Fri, Mar 01, 2013 at 01:14:11PM -0800, Jesse Barnes wrote:
> We don't generally use MI_FLUSH these days, but this bit may affect
> other flushing logic, so set it to be safe.

My earlier question stands. Why are we doing this only for VLV, when
the WA applies to everything since SNB?

> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_ringbuffer.c |    6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 1d5d613..e82b994 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -524,10 +524,14 @@ static int init_render_ring(struct intel_ring_buffer *ring)
>  		I915_WRITE(GFX_MODE,
>  			   _MASKED_BIT_ENABLE(GFX_TLB_INVALIDATE_ALWAYS));
>  
> -	if (IS_GEN7(dev))
> +	if (IS_GEN7(dev)) {
>  		I915_WRITE(GFX_MODE_GEN7,
>  			   _MASKED_BIT_DISABLE(GFX_TLB_INVALIDATE_ALWAYS) |
>  			   _MASKED_BIT_ENABLE(GFX_REPLAY_MODE));
> +		if (IS_VALLEYVIEW(dev))
> +			I915_WRITE(MI_MODE, I915_READ(MI_MODE) |
> +				   _MASKED_BIT_ENABLE(MI_FLUSH_ENABLE));
> +	}
>  
>  	if (INTEL_INFO(dev)->gen >= 5) {
>  		ret = init_pipe_control(ring);
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC

  reply	other threads:[~2013-03-01 21:47 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-01 21:14 VLV updates Jesse Barnes
2013-03-01 21:14 ` [PATCH 01/28] drm/i915: sprite support for ValleyView Jesse Barnes
2013-03-04 18:23   ` Ville Syrjälä
2013-03-01 21:14 ` [PATCH 02/28] drm/i915: add sprite assertion function for VLV Jesse Barnes
2013-03-04 18:29   ` Ville Syrjälä
2013-03-07 23:24     ` Jesse Barnes
2013-03-01 21:14 ` [PATCH 03/28] drm/i915: add constant alpha support to sprite ioctl Jesse Barnes
2013-03-01 21:14 ` [PATCH 04/28] drm/i915: update VLV PLL and DPIO code Jesse Barnes
2013-03-01 21:14 ` [PATCH 05/28] drm/i915: panel power sequencing for VLV eDP Jesse Barnes
2013-03-01 21:43   ` Ville Syrjälä
2013-03-01 21:57     ` Jesse Barnes
2013-03-01 21:14 ` [PATCH 06/28] drm/i915: add more VLV IDs Jesse Barnes
2013-03-01 21:14 ` [PATCH 07/28] drm/i915: implement WaForceL3Serialization on VLV and IVB Jesse Barnes
2013-03-01 21:43   ` Ville Syrjälä
2013-03-01 21:58     ` Jesse Barnes
2013-03-01 21:14 ` [PATCH 08/28] drm/i915: implement WaGTEnableMiFlush on VLV Jesse Barnes
2013-03-01 21:47   ` Ville Syrjälä [this message]
2013-03-01 21:58     ` Jesse Barnes
2013-03-01 21:14 ` [PATCH 09/28] drm/i915: implement WaDisablePSDDualDispatchEnable " Jesse Barnes
2013-03-01 21:14 ` [PATCH 10/28] drm/i915: VLV has force wake Jesse Barnes
2013-03-06 18:53   ` Daniel Vetter
2013-03-01 21:14 ` [PATCH 11/28] drm/i915: add power context allocation and setup on VLV Jesse Barnes
2013-03-01 21:14 ` [PATCH 12/28] drm/i915: add more clock gating for VLV, allow force wake at init Jesse Barnes
2013-03-06 18:54   ` Daniel Vetter
2013-03-01 21:14 ` [PATCH 13/28] drm/i915: fix VLV limits and m/n/p calculations Jesse Barnes
2013-03-05 11:49   ` Ville Syrjälä
2013-03-01 21:14 ` [PATCH 14/28] drm/i915: disable watermarks on VLV, pondicherry takes care of this Jesse Barnes
2013-03-06 18:56   ` Daniel Vetter
2013-03-06 19:09     ` Ville Syrjälä
2013-03-06 19:14       ` Daniel Vetter
2013-03-06 19:19         ` Ville Syrjälä
2013-03-06 19:32           ` Daniel Vetter
2013-03-07 23:12             ` Jesse Barnes
2013-03-01 21:14 ` [PATCH 15/28] drm/i915: use gen6 stolen check on VLV Jesse Barnes
2013-03-01 21:14 ` [PATCH 16/28] drm/i915: add Punit read/write routines for VLV Jesse Barnes
2013-03-04  8:43   ` Jani Nikula
2013-03-04 16:35     ` Jesse Barnes
2013-03-01 21:14 ` [PATCH 17/28] drm/i915: add media well to VLV force wake routines Jesse Barnes
2013-03-01 21:14 ` [PATCH 18/28] drm/i915: turbo & RC6 support for VLV Jesse Barnes
2013-03-01 21:14 ` [PATCH 19/28] drm/i915: remove VLV MSI IRQ hack Jesse Barnes
2013-03-01 21:14 ` [PATCH 20/28] drm/i915: don't enumerate VGA on VLV Jesse Barnes
2013-03-06 18:58   ` Daniel Vetter
2013-03-06 19:00   ` Ville Syrjälä
2013-03-06 19:09     ` Jesse Barnes
2013-03-06 19:14       ` Ville Syrjälä
2013-03-01 21:14 ` [PATCH 21/28] drm/i915: DSPFW and BLC regs are in the display offset range Jesse Barnes
2013-03-01 21:14 ` [PATCH 22/28] drm/i915: don't use plane pipe select on VLV Jesse Barnes
2013-03-01 21:14 ` [PATCH 23/28] drm/i915: use VLV DIP routines " Jesse Barnes
2013-03-06 19:00   ` Daniel Vetter
2013-03-06 19:09     ` Jesse Barnes
2013-03-01 21:14 ` [PATCH 24/28] drm/i915: export intel_dpio_write for use in intel_dp.c Jesse Barnes
2013-03-06 19:02   ` Daniel Vetter
2013-03-06 19:10     ` Jesse Barnes
2013-03-01 21:14 ` [PATCH 25/28] drm/i915/dp: program VSwing and Preemphasis control settings on VLV Jesse Barnes
2013-03-01 21:14 ` [PATCH 26/28] drm/i915: VLV doesn't have HDMI on port C Jesse Barnes
2013-03-01 21:14 ` [PATCH 27/28] drm/i915/dp: don't use ILK paths on VLV Jesse Barnes
2013-03-06 19:04   ` Daniel Vetter
2013-03-01 21:14 ` [PATCH 28/28] drm/i915/dp: add pre-PCH eDP checking to DP detect for VLV Jesse Barnes
2013-03-06 19:05   ` Daniel Vetter
2013-03-06 20:55     ` Jesse Barnes
2013-03-06 21:02       ` Daniel Vetter
2013-03-01 21:59 ` VLV updates Jesse Barnes

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20130301214701.GF4469@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jbarnes@virtuousgeek.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox