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From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
	Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
	"for 3.8 only" <stable@vger.kernel.org>,
	Mika Kuoppala <mika.kuoppala@intel.com>
Subject: Re: [PATCH] drm/i915: enable irqs earlier when resuming
Date: Tue, 5 Mar 2013 10:06:25 +0100	[thread overview]
Message-ID: <20130305090625.GG9021@phenom.ffwll.local> (raw)
In-Reply-To: <20130305085326.GA27641@cantiga.alporthouse.com>

On Tue, Mar 05, 2013 at 08:53:48AM +0000, Chris Wilson wrote:
> On Tue, Mar 05, 2013 at 09:50:58AM +0100, Daniel Vetter wrote:
> > We need it to restore the ilk rc6 context, since the gpu wait no
> > requires interrupts. But in general having interrupts around should
> > help in code sanity, since more and more stuff is interrupt driven.
> > 
> > This regression has been introduced in
> > 
> > commit 3e9605018ab3e333d51cc90fccfde2031886763b
> > Author: Chris Wilson <chris@chris-wilson.co.uk>
> > Date:   Tue Nov 27 16:22:54 2012 +0000
> > 
> >     drm/i915: Rearrange code to only have a single method for waiting upon the ring
> 
> Not entirely, as we can also regard this as an oversight from fixing up
> the irq sequence during initialisation... :-p

Added a citation to the relevant commit ...
> > 
> > Like in the driver load code we need to make sure that hotplug
> > interrupts don't cause havoc with our modeset state, hence block them
> > with the existing infrastructure. Again we ignore races where we might
> > loose hotplug interrupts ...
> > 
> > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=54691
> > Cc: stable@vger.kernel.org (for 3.8 only)
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Mika Kuoppala <mika.kuoppala@intel.com>
> > Reported-and-Tested-by: Ilya Tumaykin <itumaykin@gmail.com>
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> 
> Reviewed-by: Chris wilson <chris@chris-wilson.co.uk>

... and merged to -fixes, thanks for the review.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

      reply	other threads:[~2013-03-05  9:06 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-05  8:50 [PATCH] drm/i915: enable irqs earlier when resuming Daniel Vetter
2013-03-05  8:53 ` Chris Wilson
2013-03-05  9:06   ` Daniel Vetter [this message]

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