From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 07/13] drm/i915: add pipe_config->limited_color_range
Date: Wed, 27 Mar 2013 10:09:06 -0700 [thread overview]
Message-ID: <20130327100906.3eddd0a2@jbarnes-desktop> (raw)
In-Reply-To: <1364341502-1184-8-git-send-email-daniel.vetter@ffwll.ch>
On Wed, 27 Mar 2013 00:44:56 +0100
Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> Now that we have a useful struct for this, let's use it. Some neat
> pointer-chasing required, but it's all there already.
>
> v2: Rebased on top of the added Haswell limited color range support.
>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/i915/intel_display.c | 13 ++++++-------
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> drivers/gpu/drm/i915/intel_drv.h | 12 +++++++-----
> drivers/gpu/drm/i915/intel_hdmi.c | 5 +++--
> drivers/gpu/drm/i915/intel_sdvo.c | 5 +++--
> 5 files changed, 20 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index fda0754..bfed546 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5173,7 +5173,7 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc,
> else
> val |= PIPECONF_PROGRESSIVE;
>
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> val |= PIPECONF_COLOR_RANGE_SELECT;
> else
> val &= ~PIPECONF_COLOR_RANGE_SELECT;
> @@ -5189,8 +5189,7 @@ static void ironlake_set_pipeconf(struct drm_crtc *crtc,
> * is supported, but eventually this should handle various
> * RGB<->YCbCr scenarios as well.
> */
> -static void intel_set_pipe_csc(struct drm_crtc *crtc,
> - const struct drm_display_mode *adjusted_mode)
> +static void intel_set_pipe_csc(struct drm_crtc *crtc)
> {
> struct drm_device *dev = crtc->dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -5205,7 +5204,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc,
> * consideration.
> */
>
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> coeff = ((235 - 16) * (1 << 12) / 255) & 0xff8; /* 0.xxx... */
>
> /*
> @@ -5229,7 +5228,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc,
> if (INTEL_INFO(dev)->gen > 6) {
> uint16_t postoff = 0;
>
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> postoff = (16 * (1 << 13) / 255) & 0x1fff;
>
> I915_WRITE(PIPE_CSC_POSTOFF_HI(pipe), postoff);
> @@ -5240,7 +5239,7 @@ static void intel_set_pipe_csc(struct drm_crtc *crtc,
> } else {
> uint32_t mode = CSC_MODE_YUV_TO_RGB;
>
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> mode |= CSC_BLACK_SCREEN_OFFSET;
>
> I915_WRITE(PIPE_CSC_MODE(pipe), mode);
> @@ -5841,7 +5840,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc,
>
> haswell_set_pipeconf(crtc, adjusted_mode, dither);
>
> - intel_set_pipe_csc(crtc, adjusted_mode);
> + intel_set_pipe_csc(crtc);
>
> /* Set up the display plane register */
> I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE | DISPPLANE_PIPE_CSC_ENABLE);
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index bc73e5e..d7c1403 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -739,7 +739,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> }
>
> if (intel_dp->color_range)
> - adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE;
> + pipe_config->limited_color_range = true;
>
> mode_rate = intel_dp_link_required(adjusted_mode->clock, bpp);
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 8de1855..63160c6 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -103,11 +103,6 @@
>
> /* drm_display_mode->private_flags */
> #define INTEL_MODE_DP_FORCE_6BPC (0x10)
> -/*
> - * Set when limited 16-235 (as opposed to full 0-255) RGB color range is
> - * to be used.
> - */
> -#define INTEL_MODE_LIMITED_COLOR_RANGE (0x40)
>
> struct intel_framebuffer {
> struct drm_framebuffer base;
> @@ -193,6 +188,13 @@ struct intel_crtc_config {
> /* Whether to set up the PCH/FDI. Note that we never allow sharing
> * between pch encoders and cpu encoders. */
> bool has_pch_encoder;
> +
> + /*
> + * Use reduced/limited/broadcast rbg range, compressing from the full
> + * range fed into the crtcs.
> + */
> + bool limited_color_range;
> +
> /* Used by SDVO (and if we ever fix it, HDMI). */
> unsigned pixel_multiplier;
> };
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index b588e6c..5508687 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -333,6 +333,7 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
> struct drm_display_mode *adjusted_mode)
> {
> struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
> + struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
> struct dip_infoframe avi_if = {
> .type = DIP_TYPE_AVI,
> .ver = DIP_VERSION_AVI,
> @@ -343,7 +344,7 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
> avi_if.body.avi.YQ_CN_PR |= DIP_AVI_PR_2;
>
> if (intel_hdmi->rgb_quant_range_selectable) {
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
> else
> avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
> @@ -785,7 +786,7 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
> }
>
> if (intel_hdmi->color_range)
> - adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE;
> + pipe_config->limited_color_range = true;
>
> if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev))
> pipe_config->has_pch_encoder = true;
> diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
> index 5f3f9e9..c6fbfd1 100644
> --- a/drivers/gpu/drm/i915/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/intel_sdvo.c
> @@ -956,9 +956,10 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
> .len = DIP_LEN_AVI,
> };
> uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
> + struct intel_crtc *intel_crtc = to_intel_crtc(intel_sdvo->base.base.crtc);
>
> if (intel_sdvo->rgb_quant_range_selectable) {
> - if (adjusted_mode->private_flags & INTEL_MODE_LIMITED_COLOR_RANGE)
> + if (intel_crtc->config.limited_color_range)
> avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_LIMITED;
> else
> avi_if.body.avi.ITC_EC_Q_SC |= DIP_AVI_RGB_QUANT_RANGE_FULL;
> @@ -1091,7 +1092,7 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
> }
>
> if (intel_sdvo->color_range)
> - adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE;
> + pipe_config->limited_color_range = true;
>
> return true;
> }
Looks nice.
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2013-03-27 17:08 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-26 23:44 [PATCH 00/13] pipe_config basic infrastructure Daniel Vetter
2013-03-26 23:44 ` [PATCH 01/13] drm/i915: introduce struct intel_crtc_config Daniel Vetter
2013-03-27 16:43 ` Jesse Barnes
2013-03-26 23:44 ` [PATCH 02/13] drm/i915: compute pipe_config earlier Daniel Vetter
2013-03-27 16:45 ` Jesse Barnes
2013-03-26 23:44 ` [PATCH 03/13] drm/i915: add pipe_config->timings_set Daniel Vetter
2013-03-27 16:49 ` Jesse Barnes
2013-03-27 16:59 ` Daniel Vetter
2013-03-27 17:00 ` Daniel Vetter
2013-03-27 16:59 ` Jesse Barnes
2013-03-27 17:06 ` Daniel Vetter
2013-03-27 17:15 ` Jesse Barnes
2013-03-26 23:44 ` [PATCH 04/13] drm/i915: add pipe_config->pixel_multiplier Daniel Vetter
2013-03-27 16:54 ` Jesse Barnes
2013-03-27 17:03 ` Daniel Vetter
2013-03-26 23:44 ` [PATCH 05/13] drm/i915: drop helper vtable for sdvo encoder Daniel Vetter
2013-03-27 16:55 ` Jesse Barnes
2013-03-26 23:44 ` [PATCH 06/13] drm/i915: add pipe_config->has_pch_encoder Daniel Vetter
2013-03-27 17:06 ` Jesse Barnes
2013-03-27 17:11 ` Daniel Vetter
2013-03-26 23:44 ` [PATCH 07/13] drm/i915: add pipe_config->limited_color_range Daniel Vetter
2013-03-27 17:09 ` Jesse Barnes [this message]
2013-03-26 23:44 ` [PATCH 08/13] drm/i915: introduce pipe_config->dither|pipe_bpp Daniel Vetter
2013-03-27 17:11 ` Jesse Barnes
2013-03-26 23:44 ` [PATCH 09/13] drm/i915: precompute pipe bpp before touching the hw Daniel Vetter
2013-03-27 17:24 ` Jesse Barnes
2013-03-27 18:58 ` Daniel Vetter
2013-03-26 23:44 ` [PATCH 10/13] drm/i915: convert DP autodither code to new infrastructure Daniel Vetter
2013-03-27 21:13 ` Jesse Barnes
2013-03-26 23:45 ` [PATCH 11/13] drm/i915: clean up plane bpp confusion Daniel Vetter
2013-03-27 21:15 ` Jesse Barnes
2013-03-28 11:26 ` Ville Syrjälä
2013-03-28 11:46 ` Daniel Vetter
2013-03-28 11:59 ` Ville Syrjälä
2013-03-28 12:49 ` [PATCH 1/2] drm/i915: check fb->pixel_format instead of bits_per_pixel Daniel Vetter
2013-03-28 12:49 ` [PATCH 2/2] drm/i915: fixup fb bpp computation in pipe_config_set_bpp Daniel Vetter
2013-03-28 15:13 ` Ville Syrjälä
2013-03-28 15:36 ` [PATCH] drm/i915: remove "inline" keyword from ironlake_disable_display_irq Daniel Vetter
2013-03-28 15:38 ` [PATCH] drm/i915: fixup fb bpp computation in pipe_config_set_bpp Daniel Vetter
2013-03-28 15:45 ` Ville Syrjälä
2013-03-28 15:55 ` Daniel Vetter
2013-03-28 14:42 ` [PATCH 1/2] drm/i915: check fb->pixel_format instead of bits_per_pixel Ville Syrjälä
2013-03-28 15:01 ` [PATCH] " Daniel Vetter
2013-03-28 15:16 ` Ville Syrjälä
2013-03-28 12:51 ` [PATCH 11/13] drm/i915: clean up plane bpp confusion Daniel Vetter
2013-03-26 23:45 ` [PATCH 12/13] drm/i915: clean up pipe " Daniel Vetter
2013-03-27 21:28 ` Jesse Barnes
2013-03-27 22:41 ` Daniel Vetter
2013-03-27 23:13 ` Jesse Barnes
2013-03-27 23:50 ` Daniel Vetter
2013-03-26 23:45 ` [PATCH 13/13] drm/i915: clear up the fdi/dp set_m_n confusion Daniel Vetter
2013-03-27 0:14 ` Daniel Vetter
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