From: Daniel Vetter <daniel@ffwll.ch>
To: Kenneth Graunke <kenneth@whitecape.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/4] drm/i915: set proper DPIO post divider for VGA on VLV v4
Date: Mon, 6 May 2013 22:50:29 +0200 [thread overview]
Message-ID: <20130506205029.GJ5763@phenom.ffwll.local> (raw)
In-Reply-To: <5187EDE4.2090501@whitecape.org>
On Mon, May 06, 2013 at 10:52:36AM -0700, Kenneth Graunke wrote:
> On 05/02/2013 10:48 AM, Jesse Barnes wrote:
> >Supposedly we should use the DAC divider for <300MHz pixel clocks, but as
> >that doesn't actually work as well as the high freq divider here in
> >practice, just use the high freq divider all the time.
> >
> >v2: remove unconditional write (Jesse)
> > check for pixel rate properly (Jesse)
> >v3: give up, the DAC divider apparently doesn't work, and low res modes
> > work ok (Jesse)
> > remove debug msg (Jesse)
> >
> >Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
>
> VGA is broken with today's drm-intel-next-queued (3a2128bcac1ae).
> Applying this patch fixes it. Thanks!
>
> Tested-by: Kenneth Graunke <kenneth@whitecape.org>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2013-05-06 20:47 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-02 17:48 [PATCH 1/4] drm/i915: read current freq from Punit on VLV Jesse Barnes
2013-05-02 17:48 ` [PATCH 2/4] drm/i915: go back to switch for VLV mem freq detection v2 Jesse Barnes
2013-05-03 17:52 ` Ben Widawsky
2013-05-06 15:30 ` Daniel Vetter
2013-05-02 17:48 ` [PATCH 3/4] drm/i915: set proper DPIO post divider for VGA on VLV v4 Jesse Barnes
2013-05-06 17:52 ` Kenneth Graunke
2013-05-06 20:50 ` Daniel Vetter [this message]
2013-05-02 17:48 ` [PATCH 4/4] drm/i915: BIOS and power context stolen mem handling for VLV Jesse Barnes
2013-05-03 18:05 ` Ben Widawsky
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