* [PATCH 1/2] drm/i915: explicitly cast pipe -> cpu_transcoder
@ 2013-07-04 10:01 Daniel Vetter
2013-07-04 10:01 ` [PATCH 2/2] drm/i915: Explicitly cast pipe -> intel_dpll_id Daniel Vetter
2013-07-04 10:23 ` [PATCH 1/2] drm/i915: explicitly cast pipe -> cpu_transcoder Damien Lespiau
0 siblings, 2 replies; 4+ messages in thread
From: Daniel Vetter @ 2013-07-04 10:01 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter
This makes sparse happy and also makes it a bit more obvious where we
pull off this trick - after all we're only allowed to do it eithe as a
default or on platforms where there is no disdinction between the pipe
and the cpu transcoder.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/intel_display.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 8b48a72..745631f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4935,7 +4935,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
struct drm_i915_private *dev_priv = dev->dev_private;
uint32_t tmp;
- pipe_config->cpu_transcoder = crtc->pipe;
+ pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
pipe_config->shared_dpll = DPLL_ID_PRIVATE;
tmp = I915_READ(PIPECONF(crtc->pipe));
@@ -5806,7 +5806,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
struct drm_i915_private *dev_priv = dev->dev_private;
uint32_t tmp;
- pipe_config->cpu_transcoder = crtc->pipe;
+ pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
pipe_config->shared_dpll = DPLL_ID_PRIVATE;
tmp = I915_READ(PIPECONF(crtc->pipe));
@@ -5922,7 +5922,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
enum intel_display_power_domain pfit_domain;
uint32_t tmp;
- pipe_config->cpu_transcoder = crtc->pipe;
+ pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
pipe_config->shared_dpll = DPLL_ID_PRIVATE;
tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
@@ -7020,7 +7020,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
* Note, if LVDS ever uses a non-1 pixel multiplier, we'll need
* to use a real value here instead.
*/
- pipe_config.cpu_transcoder = intel_crtc->pipe;
+ pipe_config.cpu_transcoder = (enum transcoder) intel_crtc->pipe;
pipe_config.pixel_multiplier = 1;
i9xx_crtc_clock_get(intel_crtc, &pipe_config);
@@ -7850,7 +7850,8 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
drm_mode_copy(&pipe_config->adjusted_mode, mode);
drm_mode_copy(&pipe_config->requested_mode, mode);
- pipe_config->cpu_transcoder = to_intel_crtc(crtc)->pipe;
+ pipe_config->cpu_transcoder =
+ (enum transcoder) to_intel_crtc(crtc)->pipe;
pipe_config->shared_dpll = DPLL_ID_PRIVATE;
/* Compute a starting value for pipe_config->pipe_bpp taking the source
--
1.7.11.7
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] drm/i915: Explicitly cast pipe -> intel_dpll_id
2013-07-04 10:01 [PATCH 1/2] drm/i915: explicitly cast pipe -> cpu_transcoder Daniel Vetter
@ 2013-07-04 10:01 ` Daniel Vetter
2013-07-04 10:23 ` [PATCH 1/2] drm/i915: explicitly cast pipe -> cpu_transcoder Damien Lespiau
1 sibling, 0 replies; 4+ messages in thread
From: Daniel Vetter @ 2013-07-04 10:01 UTC (permalink / raw)
To: Intel Graphics Development; +Cc: Daniel Vetter
We only do this on IBX where there's a fixed pch dpll to pipe
assignment. Being explicit about it can't really hurt and makes
sparse happy.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/intel_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 745631f..6c1003d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3081,7 +3081,7 @@ static struct intel_shared_dpll *intel_get_shared_dpll(struct intel_crtc *crtc)
if (HAS_PCH_IBX(dev_priv->dev)) {
/* Ironlake PCH has a fixed PLL->PCH pipe mapping. */
- i = crtc->pipe;
+ i = (enum intel_dpll_id) crtc->pipe;
pll = &dev_priv->shared_dplls[i];
DRM_DEBUG_KMS("CRTC:%d using pre-allocated %s\n",
@@ -5825,7 +5825,8 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
ironlake_get_fdi_m_n_config(crtc, pipe_config);
if (HAS_PCH_IBX(dev_priv->dev)) {
- pipe_config->shared_dpll = crtc->pipe;
+ pipe_config->shared_dpll =
+ (enum intel_dpll_id) crtc->pipe;
} else {
tmp = I915_READ(PCH_DPLL_SEL);
if (tmp & TRANS_DPLLB_SEL(crtc->pipe))
--
1.7.11.7
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] drm/i915: explicitly cast pipe -> cpu_transcoder
2013-07-04 10:01 [PATCH 1/2] drm/i915: explicitly cast pipe -> cpu_transcoder Daniel Vetter
2013-07-04 10:01 ` [PATCH 2/2] drm/i915: Explicitly cast pipe -> intel_dpll_id Daniel Vetter
@ 2013-07-04 10:23 ` Damien Lespiau
2013-07-04 12:41 ` Daniel Vetter
1 sibling, 1 reply; 4+ messages in thread
From: Damien Lespiau @ 2013-07-04 10:23 UTC (permalink / raw)
To: Daniel Vetter; +Cc: Intel Graphics Development
On Thu, Jul 04, 2013 at 12:01:15PM +0200, Daniel Vetter wrote:
> This makes sparse happy and also makes it a bit more obvious where we
> pull off this trick - after all we're only allowed to do it eithe as a
> default or on platforms where there is no disdinction between the pipe
> and the cpu transcoder.
>
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
For both patches:
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
--
Damien
> ---
> drivers/gpu/drm/i915/intel_display.c | 11 ++++++-----
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 8b48a72..745631f 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4935,7 +4935,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
> struct drm_i915_private *dev_priv = dev->dev_private;
> uint32_t tmp;
>
> - pipe_config->cpu_transcoder = crtc->pipe;
> + pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> pipe_config->shared_dpll = DPLL_ID_PRIVATE;
>
> tmp = I915_READ(PIPECONF(crtc->pipe));
> @@ -5806,7 +5806,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
> struct drm_i915_private *dev_priv = dev->dev_private;
> uint32_t tmp;
>
> - pipe_config->cpu_transcoder = crtc->pipe;
> + pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> pipe_config->shared_dpll = DPLL_ID_PRIVATE;
>
> tmp = I915_READ(PIPECONF(crtc->pipe));
> @@ -5922,7 +5922,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
> enum intel_display_power_domain pfit_domain;
> uint32_t tmp;
>
> - pipe_config->cpu_transcoder = crtc->pipe;
> + pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> pipe_config->shared_dpll = DPLL_ID_PRIVATE;
>
> tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
> @@ -7020,7 +7020,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
> * Note, if LVDS ever uses a non-1 pixel multiplier, we'll need
> * to use a real value here instead.
> */
> - pipe_config.cpu_transcoder = intel_crtc->pipe;
> + pipe_config.cpu_transcoder = (enum transcoder) intel_crtc->pipe;
> pipe_config.pixel_multiplier = 1;
> i9xx_crtc_clock_get(intel_crtc, &pipe_config);
>
> @@ -7850,7 +7850,8 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
>
> drm_mode_copy(&pipe_config->adjusted_mode, mode);
> drm_mode_copy(&pipe_config->requested_mode, mode);
> - pipe_config->cpu_transcoder = to_intel_crtc(crtc)->pipe;
> + pipe_config->cpu_transcoder =
> + (enum transcoder) to_intel_crtc(crtc)->pipe;
> pipe_config->shared_dpll = DPLL_ID_PRIVATE;
>
> /* Compute a starting value for pipe_config->pipe_bpp taking the source
> --
> 1.7.11.7
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] drm/i915: explicitly cast pipe -> cpu_transcoder
2013-07-04 10:23 ` [PATCH 1/2] drm/i915: explicitly cast pipe -> cpu_transcoder Damien Lespiau
@ 2013-07-04 12:41 ` Daniel Vetter
0 siblings, 0 replies; 4+ messages in thread
From: Daniel Vetter @ 2013-07-04 12:41 UTC (permalink / raw)
To: Damien Lespiau; +Cc: Daniel Vetter, Intel Graphics Development
On Thu, Jul 04, 2013 at 11:23:52AM +0100, Damien Lespiau wrote:
> On Thu, Jul 04, 2013 at 12:01:15PM +0200, Daniel Vetter wrote:
> > This makes sparse happy and also makes it a bit more obvious where we
> > pull off this trick - after all we're only allowed to do it eithe as a
> > default or on platforms where there is no disdinction between the pipe
> > and the cpu transcoder.
> >
> > Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
>
> For both patches:
>
> Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Both merged, thanks for the review.
-Daniel
>
> --
> Damien
>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 11 ++++++-----
> > 1 file changed, 6 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 8b48a72..745631f 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -4935,7 +4935,7 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > uint32_t tmp;
> >
> > - pipe_config->cpu_transcoder = crtc->pipe;
> > + pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> > pipe_config->shared_dpll = DPLL_ID_PRIVATE;
> >
> > tmp = I915_READ(PIPECONF(crtc->pipe));
> > @@ -5806,7 +5806,7 @@ static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > uint32_t tmp;
> >
> > - pipe_config->cpu_transcoder = crtc->pipe;
> > + pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> > pipe_config->shared_dpll = DPLL_ID_PRIVATE;
> >
> > tmp = I915_READ(PIPECONF(crtc->pipe));
> > @@ -5922,7 +5922,7 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
> > enum intel_display_power_domain pfit_domain;
> > uint32_t tmp;
> >
> > - pipe_config->cpu_transcoder = crtc->pipe;
> > + pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> > pipe_config->shared_dpll = DPLL_ID_PRIVATE;
> >
> > tmp = I915_READ(TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
> > @@ -7020,7 +7020,7 @@ struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
> > * Note, if LVDS ever uses a non-1 pixel multiplier, we'll need
> > * to use a real value here instead.
> > */
> > - pipe_config.cpu_transcoder = intel_crtc->pipe;
> > + pipe_config.cpu_transcoder = (enum transcoder) intel_crtc->pipe;
> > pipe_config.pixel_multiplier = 1;
> > i9xx_crtc_clock_get(intel_crtc, &pipe_config);
> >
> > @@ -7850,7 +7850,8 @@ intel_modeset_pipe_config(struct drm_crtc *crtc,
> >
> > drm_mode_copy(&pipe_config->adjusted_mode, mode);
> > drm_mode_copy(&pipe_config->requested_mode, mode);
> > - pipe_config->cpu_transcoder = to_intel_crtc(crtc)->pipe;
> > + pipe_config->cpu_transcoder =
> > + (enum transcoder) to_intel_crtc(crtc)->pipe;
> > pipe_config->shared_dpll = DPLL_ID_PRIVATE;
> >
> > /* Compute a starting value for pipe_config->pipe_bpp taking the source
> > --
> > 1.7.11.7
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 4+ messages in thread
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