From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 30/35] drm/i915: Replace the ILK/SNB/IVB/HSW watermark code
Date: Fri, 5 Jul 2013 21:11:30 +0300 [thread overview]
Message-ID: <20130705181130.GK5004@intel.com> (raw)
In-Reply-To: <CA+gsUGSLZUVzmNM+5B1tYcRJ-v9XOodH5h8nj6eYDOnMW0FuVg@mail.gmail.com>
On Fri, Jul 05, 2013 at 02:51:36PM -0300, Paulo Zanoni wrote:
> 2013/7/5 <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > There is a major problem with the watermark registers; they're not
> > double buffered. So we need to make sure we update them at the correct
> > time when messing about with planes. The correct time is the beginning
> > of vblank.
> >
> > So when we determine that the watermarks need to updated hand in hand
> > with the next vblank, we store the pre-computed watermarks under
> > intel_crtc, and when the vblank happens, we promote the pending
> > watermarks to active status.
> >
> > on HSW when the watermarks for any pipe change, we must merge the
> > watermarks from all pipes so that we can determine the correct LP1+
> > watermark levels. For simplicity we follow the same codepaths for
> > pre-HSW hardware as well, but there all the LP1+ watermarks will be
> > disabled when multiple pipes are enabled. Once the watermarks are
> > merged we check them for validity, disabling any invalid levels.
> >
> > Touching the watermark registers causes the hardware to re-evaluate the
> > watermarks, which expeds some power. So after merging the watermarks
> > we check which watermark registers actually need to be changed. And
> > finally we write the watermarks registers in the correct order.
>
> This patch is way too big for us, poor reviewers. Can you split this
> into many many many tiny patches? I see *a lot* of different changes
> here.
Well, it's one change "rip out the old, bring in the new", or is that
two changes? :P
One problem with more splitting is that the intermediate steps might
not end up making much sense at some point if it's just churning code
around, or adding new bits that do nothing until the full system
is in place.
But I did actaully want to split it up a bit more at least. But I ran
out of time, so it will need to wait until I get back from vacation.
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2013-07-05 18:11 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-05 8:57 [PATCH 00/35] drm/i915: ILK+ watermark rewrite ville.syrjala
2013-07-05 8:57 ` [PATCH 01/35] drm/i915: Add scaled paramater to update_sprite_watermarks() ville.syrjala
2013-07-30 18:26 ` Paulo Zanoni
2013-07-30 18:30 ` Ville Syrjälä
2013-07-30 18:49 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 02/35] drm/i915: Pass the actual sprite width to watermarks functions ville.syrjala
2013-07-30 18:32 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 03/35] drm/i915: Calculate the sprite WM based on the source width instead of the destination width ville.syrjala
2013-07-30 19:01 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 04/35] drm/i915: Rename hsw_wm_get_pixel_rate to ilk_pipe_pixel_rate ville.syrjala
2013-07-30 19:20 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 05/35] drm/i915: Rename most wm compute functions to ilk_ prefix ville.syrjala
2013-07-30 19:37 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 06/35] drm/i915: Pass the watermark level to primary WM compute functions ville.syrjala
2013-07-30 19:49 ` Paulo Zanoni
2013-08-01 8:01 ` Ville Syrjälä
2013-07-05 8:57 ` [PATCH 07/35] drm/i915: Don't pass "mem_value" to ilk_compute_fbc_wm ville.syrjala
2013-07-30 19:54 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 08/35] drm/i915: Change the watermark latency type to uint16_t ville.syrjala
2013-07-30 20:01 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 09/35] drm/i915: Split out reading of HSW watermark latency values ville.syrjala
2013-07-05 9:19 ` Chris Wilson
2013-07-05 10:51 ` Ville Syrjälä
2013-07-30 20:09 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 10/35] drm/i915: Don't multiply the watermark latency values too early ville.syrjala
2013-07-30 20:21 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 11/35] drm/i915: Add SNB/IVB support to intel_read_wm_latency ville.syrjala
2013-07-30 21:01 ` Paulo Zanoni
2013-08-05 5:23 ` Daniel Vetter
2013-07-05 8:57 ` [PATCH 12/35] drm/i915: Add ILK " ville.syrjala
2013-07-05 8:57 ` [PATCH 13/35] drm/i915: Store the watermark latency values in dev_priv ville.syrjala
[not found] ` <CA+gsUGQ0JqEZiEUsONJh7nr6rPYRfTxJM79oc5tGcexEudB2Og@mail.gmail.com>
2013-07-30 21:42 ` Paulo Zanoni
2013-07-31 9:43 ` Ville Syrjälä
2013-07-05 8:57 ` [PATCH 14/35] drm/i915: Use the stored cursor and plane latencies properly ville.syrjala
2013-07-05 8:57 ` [PATCH 15/35] drm/i915: Print the watermark latencies during init ville.syrjala
2013-07-30 21:49 ` Paulo Zanoni
2013-07-31 9:47 ` Ville Syrjälä
2013-07-05 8:57 ` [PATCH 16/35] drm/i915: Disable specific watermark levels when latency is zero ville.syrjala
2013-07-30 21:51 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 17/35] drm/i915: Pull watermark level validity check out ville.syrjala
2013-07-05 8:57 ` [PATCH 18/35] drm/i915: Split watermark level computation from the code ville.syrjala
2013-07-05 8:57 ` [PATCH 19/35] drm/i915: Kill fbc_enable from hsw_lp_wm_results ville.syrjala
2013-07-05 8:57 ` [PATCH 20/35] drm/i915: Rename hsw_data_buf_partitioning to intel_ddb_partitioning ville.syrjala
2013-07-05 8:57 ` [PATCH 21/35] drm/i915: Rename hsw_lp_wm_result to intel_wm_level ville.syrjala
2013-07-05 8:57 ` [PATCH 22/35] drm/i915: Calculate max watermark levels for ILK+ ville.syrjala
2013-07-05 8:57 ` [PATCH 23/35] drm/i915; Pull some watermarks state into a separate structure ville.syrjala
2013-07-05 8:57 ` [PATCH 24/35] drm/i915: Split plane watermark parameters into a separate struct ville.syrjala
2013-07-05 8:57 ` [PATCH 25/35] drm/i915: Pass crtc to our update/disable_plane hooks ville.syrjala
2013-07-05 8:57 ` [PATCH 26/35] drm/i915: Don't try to disable plane if it's already disabled ville.syrjala
2013-07-05 8:57 ` [PATCH 27/35] drm/i915: Pass plane and crtc to intel_update_sprite_watermarks ville.syrjala
2013-07-05 8:57 ` [PATCH 28/35] drm/i915: Always call intel_update_sprite_watermarks() when disabling a plane ville.syrjala
2013-07-05 8:57 ` [PATCH 29/35] drm/i915: Pass crtc to intel_update_watermarks() and call it in one place during modeset ville.syrjala
2013-07-05 9:32 ` Chris Wilson
2013-07-05 8:57 ` [PATCH 30/35] drm/i915: Replace the ILK/SNB/IVB/HSW watermark code ville.syrjala
2013-07-05 9:37 ` Chris Wilson
2013-07-05 10:49 ` Ville Syrjälä
2013-07-05 17:46 ` Paulo Zanoni
2013-07-05 18:00 ` Ville Syrjälä
2013-07-05 17:51 ` Paulo Zanoni
2013-07-05 18:11 ` Ville Syrjälä [this message]
2013-07-05 8:57 ` [PATCH 31/35] drm/i915: Move HSW linetime watermark handling to modeset code ville.syrjala
2013-07-05 17:44 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 32/35] hack: Add debug prints to watermark compute funcs ville.syrjala
2013-07-05 8:57 ` [PATCH 33/35] hack: Don't disable underrun reporting on the first error on ILK/SNB/IVB ville.syrjala
2013-07-05 17:19 ` Paulo Zanoni
2013-07-05 17:34 ` Ville Syrjälä
2013-07-05 8:57 ` [PATCH 34/35] hack: Make fifo underruns DRM_ERROR ville.syrjala
2013-07-05 17:19 ` Paulo Zanoni
2013-07-05 17:39 ` Ville Syrjälä
2013-07-05 8:57 ` [PATCH 35/35] hack: Print watermark programming duration ville.syrjala
2013-07-05 16:54 ` [PATCH 00/35] drm/i915: ILK+ watermark rewrite Paulo Zanoni
2013-07-05 17:22 ` Ville Syrjälä
2013-07-05 17:41 ` Paulo Zanoni
2013-07-05 17:54 ` Ville Syrjälä
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