From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 15/35] drm/i915: Print the watermark latencies during init
Date: Wed, 31 Jul 2013 12:47:54 +0300 [thread overview]
Message-ID: <20130731094754.GZ5004@intel.com> (raw)
In-Reply-To: <CA+gsUGT=_MsR-XToQJ40nPT9hnOU0wzW2qsVAO_QOe8YY6mPag@mail.gmail.com>
On Tue, Jul 30, 2013 at 06:49:27PM -0300, Paulo Zanoni wrote:
> 2013/7/5 <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Seeing the watermark latency values in dmesg might help sometimes.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 25 +++++++++++++++++++++++++
> > 1 file changed, 25 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 37919df..5687957 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -2392,6 +2392,24 @@ static void intel_fixup_cur_wm_latency(struct drm_device *dev, uint16_t wm[5])
> > wm[3] *= 2;
> > }
> >
> > +static void intel_print_wm_latency(struct drm_device *dev, const uint16_t wm[5])
> > +{
> > + int level;
> > +
> > + for (level = 0; level <= 4; level++) {
> > + unsigned int latency = wm[level];
> > +
> > + if (latency == 0)
> > + continue;
>
> One of the cases that should be interesting to print is exactly when a
> latency we expect to be non-zero is zero. Maybe you should do a simple
> "switch" statement to get max_level depending on Gen number and print
> everything from level 0 to max_level? Then if "latency == 0" we could
> even promote the message to a DRM_ERROR?
Yeah could be done. OTOH if it really happens in the wild, we'd probably
be looking at a bunch of new bug reports that we can't do anything
about.
> > +
> > + if (level > 0)
> > + latency *= 5;
> > +
> > + DRM_DEBUG_KMS(" WM%d latency %u (%u.%u usec)\n",
> > + level, wm[level], latency / 10, latency % 10);
> > + }
> > +}
> > +
> > static void intel_setup_wm_latency(struct drm_device *dev)
> > {
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > @@ -2405,6 +2423,13 @@ static void intel_setup_wm_latency(struct drm_device *dev)
> >
> > intel_fixup_spr_wm_latency(dev, dev_priv->wm.spr_latency);
> > intel_fixup_cur_wm_latency(dev, dev_priv->wm.cur_latency);
> > +
> > + DRM_DEBUG_KMS("Primary watermark latencies:\n");
> > + intel_print_wm_latency(dev, dev_priv->wm.pri_latency);
> > + DRM_DEBUG_KMS("Sprite watermark latencies:\n");
> > + intel_print_wm_latency(dev, dev_priv->wm.spr_latency);
> > + DRM_DEBUG_KMS("Cursor watermark latencies:\n");
> > + intel_print_wm_latency(dev, dev_priv->wm.cur_latency);
> > }
> >
> > static void hsw_compute_wm_parameters(struct drm_device *dev,
> > --
> > 1.8.1.5
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
>
>
> --
> Paulo Zanoni
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2013-07-31 9:48 UTC|newest]
Thread overview: 74+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-05 8:57 [PATCH 00/35] drm/i915: ILK+ watermark rewrite ville.syrjala
2013-07-05 8:57 ` [PATCH 01/35] drm/i915: Add scaled paramater to update_sprite_watermarks() ville.syrjala
2013-07-30 18:26 ` Paulo Zanoni
2013-07-30 18:30 ` Ville Syrjälä
2013-07-30 18:49 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 02/35] drm/i915: Pass the actual sprite width to watermarks functions ville.syrjala
2013-07-30 18:32 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 03/35] drm/i915: Calculate the sprite WM based on the source width instead of the destination width ville.syrjala
2013-07-30 19:01 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 04/35] drm/i915: Rename hsw_wm_get_pixel_rate to ilk_pipe_pixel_rate ville.syrjala
2013-07-30 19:20 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 05/35] drm/i915: Rename most wm compute functions to ilk_ prefix ville.syrjala
2013-07-30 19:37 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 06/35] drm/i915: Pass the watermark level to primary WM compute functions ville.syrjala
2013-07-30 19:49 ` Paulo Zanoni
2013-08-01 8:01 ` Ville Syrjälä
2013-07-05 8:57 ` [PATCH 07/35] drm/i915: Don't pass "mem_value" to ilk_compute_fbc_wm ville.syrjala
2013-07-30 19:54 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 08/35] drm/i915: Change the watermark latency type to uint16_t ville.syrjala
2013-07-30 20:01 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 09/35] drm/i915: Split out reading of HSW watermark latency values ville.syrjala
2013-07-05 9:19 ` Chris Wilson
2013-07-05 10:51 ` Ville Syrjälä
2013-07-30 20:09 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 10/35] drm/i915: Don't multiply the watermark latency values too early ville.syrjala
2013-07-30 20:21 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 11/35] drm/i915: Add SNB/IVB support to intel_read_wm_latency ville.syrjala
2013-07-30 21:01 ` Paulo Zanoni
2013-08-05 5:23 ` Daniel Vetter
2013-07-05 8:57 ` [PATCH 12/35] drm/i915: Add ILK " ville.syrjala
2013-07-05 8:57 ` [PATCH 13/35] drm/i915: Store the watermark latency values in dev_priv ville.syrjala
[not found] ` <CA+gsUGQ0JqEZiEUsONJh7nr6rPYRfTxJM79oc5tGcexEudB2Og@mail.gmail.com>
2013-07-30 21:42 ` Paulo Zanoni
2013-07-31 9:43 ` Ville Syrjälä
2013-07-05 8:57 ` [PATCH 14/35] drm/i915: Use the stored cursor and plane latencies properly ville.syrjala
2013-07-05 8:57 ` [PATCH 15/35] drm/i915: Print the watermark latencies during init ville.syrjala
2013-07-30 21:49 ` Paulo Zanoni
2013-07-31 9:47 ` Ville Syrjälä [this message]
2013-07-05 8:57 ` [PATCH 16/35] drm/i915: Disable specific watermark levels when latency is zero ville.syrjala
2013-07-30 21:51 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 17/35] drm/i915: Pull watermark level validity check out ville.syrjala
2013-07-05 8:57 ` [PATCH 18/35] drm/i915: Split watermark level computation from the code ville.syrjala
2013-07-05 8:57 ` [PATCH 19/35] drm/i915: Kill fbc_enable from hsw_lp_wm_results ville.syrjala
2013-07-05 8:57 ` [PATCH 20/35] drm/i915: Rename hsw_data_buf_partitioning to intel_ddb_partitioning ville.syrjala
2013-07-05 8:57 ` [PATCH 21/35] drm/i915: Rename hsw_lp_wm_result to intel_wm_level ville.syrjala
2013-07-05 8:57 ` [PATCH 22/35] drm/i915: Calculate max watermark levels for ILK+ ville.syrjala
2013-07-05 8:57 ` [PATCH 23/35] drm/i915; Pull some watermarks state into a separate structure ville.syrjala
2013-07-05 8:57 ` [PATCH 24/35] drm/i915: Split plane watermark parameters into a separate struct ville.syrjala
2013-07-05 8:57 ` [PATCH 25/35] drm/i915: Pass crtc to our update/disable_plane hooks ville.syrjala
2013-07-05 8:57 ` [PATCH 26/35] drm/i915: Don't try to disable plane if it's already disabled ville.syrjala
2013-07-05 8:57 ` [PATCH 27/35] drm/i915: Pass plane and crtc to intel_update_sprite_watermarks ville.syrjala
2013-07-05 8:57 ` [PATCH 28/35] drm/i915: Always call intel_update_sprite_watermarks() when disabling a plane ville.syrjala
2013-07-05 8:57 ` [PATCH 29/35] drm/i915: Pass crtc to intel_update_watermarks() and call it in one place during modeset ville.syrjala
2013-07-05 9:32 ` Chris Wilson
2013-07-05 8:57 ` [PATCH 30/35] drm/i915: Replace the ILK/SNB/IVB/HSW watermark code ville.syrjala
2013-07-05 9:37 ` Chris Wilson
2013-07-05 10:49 ` Ville Syrjälä
2013-07-05 17:46 ` Paulo Zanoni
2013-07-05 18:00 ` Ville Syrjälä
2013-07-05 17:51 ` Paulo Zanoni
2013-07-05 18:11 ` Ville Syrjälä
2013-07-05 8:57 ` [PATCH 31/35] drm/i915: Move HSW linetime watermark handling to modeset code ville.syrjala
2013-07-05 17:44 ` Paulo Zanoni
2013-07-05 8:57 ` [PATCH 32/35] hack: Add debug prints to watermark compute funcs ville.syrjala
2013-07-05 8:57 ` [PATCH 33/35] hack: Don't disable underrun reporting on the first error on ILK/SNB/IVB ville.syrjala
2013-07-05 17:19 ` Paulo Zanoni
2013-07-05 17:34 ` Ville Syrjälä
2013-07-05 8:57 ` [PATCH 34/35] hack: Make fifo underruns DRM_ERROR ville.syrjala
2013-07-05 17:19 ` Paulo Zanoni
2013-07-05 17:39 ` Ville Syrjälä
2013-07-05 8:57 ` [PATCH 35/35] hack: Print watermark programming duration ville.syrjala
2013-07-05 16:54 ` [PATCH 00/35] drm/i915: ILK+ watermark rewrite Paulo Zanoni
2013-07-05 17:22 ` Ville Syrjälä
2013-07-05 17:41 ` Paulo Zanoni
2013-07-05 17:54 ` Ville Syrjälä
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20130731094754.GZ5004@intel.com \
--to=ville.syrjala@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=przanoni@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox