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From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 1/2] drm/i915: check the power well when redisabling VGA
Date: Mon, 5 Aug 2013 17:46:12 +0200	[thread overview]
Message-ID: <20130805154612.GL22035@phenom.ffwll.local> (raw)
In-Reply-To: <1375471345-10217-1-git-send-email-przanoni@gmail.com>

On Fri, Aug 02, 2013 at 04:22:24PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> If the power well is disabled VGA is guaranteed to be disabled.
> 
> This fixes unclaimed register messages that happen on suspend/resume.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67517
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>

Have you seen my other comment asking whether we could just force-enable
the power well a bit earlier in the resume sequence instead? Imo that
feels a notch more robust, since we didn't sprinkle tons of power well
checks in all the other hw readout paths either.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index e1e50df..3765d0b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10097,6 +10097,17 @@ void i915_redisable_vga(struct drm_device *dev)
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	u32 vga_reg = i915_vgacntrl_reg(dev);
>  
> +	/* This function can be called both from intel_modeset_setup_hw_state or
> +	 * at a very early point in our resume sequence, where the power well
> +	 * structures are not yet restored. Since this function is at a very
> +	 * paranoid "someone might have enabled VGA while we were not looking"
> +	 * level, just check if the power well is enabled instead of trying to
> +	 * follow the "don't touch the power well if we don't need it" policy
> +	 * the rest of the driver uses. */
> +	if (HAS_POWER_WELL(dev) &&
> +	    (I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_STATE) == 0)
> +		return;
> +
>  	if (I915_READ(vga_reg) != VGA_DISP_DISABLE) {
>  		DRM_DEBUG_KMS("Something enabled VGA plane, disabling it\n");
>  		i915_disable_vga(dev);
> -- 
> 1.8.1.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  parent reply	other threads:[~2013-08-05 15:46 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-02 19:22 [PATCH 1/2] drm/i915: check the power well when redisabling VGA Paulo Zanoni
2013-08-02 19:22 ` [PATCH 2/2] drm/i915: clarify Haswell power well bit names Paulo Zanoni
2013-08-05 15:46 ` Daniel Vetter [this message]
2013-08-14 14:51   ` [PATCH 1/2] drm/i915: check the power well when redisabling VGA Daniel Vetter

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